Netname | Condition | Type | Value | Comment |
---|---|---|---|---|
12V_COMP_REF | Default | d | 0.674 | |
4V5_REG_EN | Default | d | 0.288 | |
4V5_REG_IN | Default | d | 0.358 | |
9V_COMP_REF | Default | d | 0.684 | |
ACDC_BURST_EN_L | Default | d | 0.753 | |
AGND_BLC | Default | d | 0.000 | |
AGND_FBVDDQ | Default | d | 0.000 | |
AGND_VCCSAS0 | Default | d | 0.001 | |
AP_CLKREQ_L | Default | d | 0.570 | |
AP_CLKREQ_L_ISO | Default | d | 0.480 | |
AP_CLKREQ_Q_L | Default | d | 0.479 | |
AP_EVENT_L | Default | d | 0.759 | |
AP_PWR_EN | Default | d | 0.571 | |
AP_PWR_EN_ISO | Default | d | 0.470 | |
AP_PWR_EN_R | Default | d | 0.568 | |
AP_RESET_CONN_L | Default | d | 0.480 | |
AP_WAKE_L | Default | d | 1.817 | |
AUD_CODEC_MICBIAS | Default | d | 0.553 | |
AUD_DMIC_CLK | Default | d | 0.736 | |
AUD_DMIC_CLK_CONN | Default | d | 0.744 | |
AUD_DMIC_SDA1 | Default | d | 0.714 | |
AUD_DMIC_SDA1_CONN | Default | d | 0.722 | |
AUD_GPIO_2 | Default | d | 0.608 | |
AUD_GPIO_3 | Default | d | 0.557 | |
AUD_HP_PORT_REF | Default | d | OL | |
AUD_HS_MIC_N | Default | d | OL | |
AUD_HS_MIC_P | Default | d | 1.564 | |
AUD_HS_MIC_RC_N | Default | d | OL | |
AUD_HS_MIC_RC_P | Default | d | OL | |
AUD_I2C_INT_L | Default | d | 0.525 | |
AUD_IPHS_SWITCH_EN | Default | d | 0.550 | |
AUD_IPHS_SWITCH_EN_PCH | Default | d | 0.547 | |
AUD_IPHS_SWITCH_EN_PCH_R | Default | d | 0.548 | |
AUD_IP_PERPH_DET_DB | Default | d | 0.551 | |
AUD_IP_PERPH_DET_R | Default | d | OL | |
AUD_J1_DET_RC | Default | d | OL | |
AUD_J1_GND_ANALOG | Default | d | 0.000 | |
AUD_J1_HP_OUTL | Default | d | OL | |
AUD_J1_HP_OUTR | Default | d | OL | |
AUD_J1_HP_PORT_REF | Default | d | OL | |
AUD_J1_MIC_BIAS | Default | d | 0.571 | |
AUD_J1_MIC_N | Default | d | OL | |
AUD_J1_MIC_P | Default | d | 1.564 | |
AUD_J1_PP3V3_S0 | Default | d | 0.339 | |
AUD_J1_TIPDET1_R | Default | d | OL | |
AUD_J1_TIPDET2_R | Default | d | OL | |
AUD_J1_TYPEDET_R | Default | d | OL | |
AUD_LAMP_LINC_N | Default | d | 0.715 | |
AUD_LAMP_LINC_P | Default | d | 0.719 | |
AUD_LAMP_RINC_N | Default | d | 0.721 | |
AUD_LAMP_RINC_P | Default | d | 0.720 | |
AUD_LI_TIPDET | Default | d | 0.550 | |
AUD_LO1_L_C_N | Default | d | OL | |
AUD_LO1_L_C_P | Default | d | OL | |
AUD_LO1_L_N | Default | d | 0.715 | |
AUD_LO1_L_P | Default | d | 0.719 | |
AUD_LO1_R_C_N | Default | d | OL | |
AUD_LO1_R_C_P | Default | d | OL | |
AUD_LO1_R_N | Default | d | 0.717 | |
AUD_LO1_R_P | Default | d | 0.716 | |
AUD_LO2_L_N | Default | d | 0.720 | |
AUD_LO2_L_P | Default | d | 0.721 | |
AUD_LO2_R_N | Default | d | 0.716 | |
AUD_LO2_R_P | Default | d | 0.720 | |
AUD_MIC_INL_N | Default | d | 0.759 | |
AUD_MIC_INL_P | Default | d | 0.759 | |
AUD_OUTJACK_INSERT | Default | d | 0.615 | |
AUD_OUTJACK_INSERT_L | Default | d | 0.590 | |
AUD_PORTA_DET_L | Default | d | 0.605 | |
AUD_PORTB_DET_L | Default | d | 1.156 | |
AUD_PORTC_DET_L | Default | d | 0.603 | |
AUD_PORTD_DET_L | Default | d | 1.114 | |
AUD_RAMP_AVDD | Default | d | 0.550 | |
AUD_RAMP_BOOTLN | Default | d | 0.597 | |
AUD_RAMP_BOOTRN | Default | d | 0.595 | |
AUD_RAMP_BOOTRP | Default | d | 0.597 | |
AUD_RAMP_GAIN | Default | d | 0.613 | |
AUD_RAMP_LINC_N | Default | d | 0.723 | |
AUD_RAMP_LINC_P | Default | d | 0.723 | |
AUD_RAMP_LIN_N | Default | d | 0.612 | |
AUD_RAMP_LIN_P | Default | d | 0.612 | |
AUD_RAMP_OUTNL | Default | d | 0.572 | |
AUD_RAMP_OUTNR | Default | d | 0.566 | |
AUD_RAMP_OUTPL | Default | d | 0.571 | |
AUD_RAMP_OUTPR | Default | d | 0.569 | |
AUD_RAMP_RINC_N | Default | d | 0.720 | |
AUD_RAMP_RINC_P | Default | d | 0.716 | |
AUD_SDI_R | Default | d | 0.481 | |
AUD_SENSE_A | Default | d | 0.760 | |
AUD_SPDIF_CHIP | Default | d | 0.710 | |
AUD_SPDIF_OUT | Default | d | 0.737 | |
AUD_SPKRAMP_MAC_SHDN_L | Default | d | 0.553 | |
AUD_SPKRAMP_WIN_SHDN_L | Default | d | 0.557 | |
AUD_SPKR_RTWT_OUT_N | Default | d | 0.569 | |
AUD_SPKR_RTWT_OUT_P | Default | d | 0.571 | |
AUD_SPKR_RWFR_OUT_N | Default | d | 0.569 | |
AUD_SPKR_RWFR_OUT_P | Default | d | 0.566 | |
AUD_SPKR_VENDOR_ID_L | Default | d | OL | |
AUD_SPKR_VENDOR_ID_R | Default | d | OL | |
AUD_TIPDET1_R | Default | d | OL | |
AUD_TIPDET2_R | Default | d | OL | |
AUD_TIPDET_INV | Default | d | OL | |
AUD_TYPEDET_OD | Default | d | OL | |
AUD_TYPEDET_R | Default | d | OL | |
BCOMP1 | Default | d | OL | |
BCOMP3 | Default | d | OL | |
BLC_BL | Default | d | 0.608 | |
BLC_BL_GATE | Default | d | 0.750 | |
BLC_BST | Default | d | 0.749 | |
BLC_BST_R | Default | d | 0.721 | |
BLC_BYPASS_GATE | Default | d | 1.100 | |
BLC_DIM_MCU | Default | d | 0.633 | |
BLC_ENA | Default | d | 0.658 | |
BLC_EN_R | Default | d | 0.671 | |
BLC_EXT_BOOT | Default | d | 0.698 | |
BLC_GND_1 | Default | d | 0.000 | |
BLC_GND_2 | Default | d | 0.002 | |
BLC_GND_3 | Default | d | 0.002 | |
BLC_GOOD | Default | d | 0.684 | |
BLC_LED_N_1 | Default | d | 0.547 | |
BLC_LED_N_2 | Default | d | 0.555 | |
BLC_LED_N_3 | Default | d | 0.551 | |
BLC_LED_P_1 | Default | d | 0.778 | |
BLC_LED_P_2 | Default | d | 0.778 | |
BLC_LED_P_3 | Default | d | 0.780 | |
BLC_MCU_AOUT_R | Default | d | 0.615 | |
BLC_MCU_BV | Default | d | 0.539 | |
BLC_MCU_BV_D | Default | d | 0.737 | |
BLC_MCU_BV_R | Default | d | 0.742 | |
BLC_MCU_B_SDA_CONN | Default | d | OL | |
BLC_MCU_PWM5 | Default | d | 0.672 | |
BLC_MCU_PWM5_R | Default | d | 0.675 | |
BLC_MCU_RESET_L | Default | d | 0.597 | |
BLC_MCU_RESET_R_L | Default | d | 0.597 | |
BLC_MCU_RTCK | Default | d | 0.682 | |
BLC_MCU_RXD0 | Default | d | 0.675 | |
BLC_MCU_TCK | Default | d | 0.677 | |
BLC_MCU_TDI | Default | d | 0.676 | |
BLC_MCU_TMS | Default | d | 0.693 | |
BLC_MCU_TRST | Default | d | 0.678 | |
BLC_MCU_TXD0 | Default | d | 0.674 | |
BLC_MCU_UVLO | Default | d | 0.683 | |
BLC_MCU_XTAL_IN | Default | d | 0.635 | |
BLC_MCU_XTAL_OUT | Default | d | 0.634 | |
BLC_MCU_XTAL_OUT_R | Default | d | 0.636 | |
BLC_ON | Default | d | 2.180 | |
BLC_ON_DRAIN | Default | d | 1.235 | |
BLC_P3V3A | Default | d | 0.289 | |
BLC_P3V3S | Default | d | 0.293 | |
BLC_P3V3_REF | Default | d | 0.289 | |
BLC_PWM_1 | Default | d | 0.545 | |
BLC_PWM_1_R | Default | d | 0.671 | |
BLC_PWM_2 | Default | d | 0.560 | |
BLC_PWM_2_R | Default | d | 0.674 | |
BLC_PWM_3 | Default | d | 0.606 | |
BLC_PWM_3_R | Default | d | 0.670 | |
BLC_P_ON | Default | d | 0.615 | |
BLC_P_ON_BYPASS | Default | d | 0.708 | |
BLC_P_ON_DRAIN | Default | d | 0.558 | |
BLC_P_ON_D_R | Default | d | 2.119 | |
BLC_P_ON_GATE | Default | d | 0.759 | |
BLC_P_ON_R | Default | d | 0.700 | |
BLC_SNUB_1 | Default | d | OL | |
BLC_SNUB_2 | Default | d | OL | |
BLC_SNUB_3 | Default | d | OL | |
BLC_UVLO | Default | d | 0.743 | |
BLC_VIN2 | Default | d | 0.490 | |
BLC_VIN2_GATE | Default | d | OL | |
BLC_VIN2_SRC | Default | d | 0.621 | |
BLC_VINP_GATE | Default | d | OL | |
BLC_VIN_SNS | Default | d | 0.733 | |
BLC_VOUT1 | Default | d | 0.776 | |
BLC_VOUT2 | Default | d | 0.773 | |
BLC_VOUT3 | Default | d | 0.778 | |
BLC_VSYNC | Default | d | 1.613 | |
BOOST_BP | Default | d | OL | |
BOOST_BYPASS | Default | d | 0.999 | |
BOOST_BYPASS_GATE | Default | d | OL | |
BOOST_COMP | Default | d | OL | |
BOOST_EN_GATE | Default | d | 0.702 | |
BOOST_EN_L | Default | d | 0.606 | |
BOOST_FB | Default | d | OL | |
BOOST_FET_DRAIN | Default | d | 0.527 | |
BOOST_GDRV | Default | d | OL | |
BOOST_GDRV_R | Default | d | OL | |
BOOST_ISNS | Default | d | OL | |
BOOST_ISNS_R | Default | d | OL | |
BOOST_RC | Default | d | OL | |
BOOST_SS | Default | d | OL | |
BOOST_VDD | Default | d | OL | |
BT_PWR_EN | Default | d | OL | |
BT_PWR_RST_L_Q | Default | d | OL | |
BURSTMODE_EN | Default | d | OL | |
BURSTMODE_EN_L | Default | d | 1.000 | |
CAM_AGND | Default | d | 0.000 | |
CAM_EXT_BOOT | Default | d | 0.535 | |
CAM_P1V2_RST_HOLDOFF | Default | d | 1.379 | |
CAM_P1V2_RST_HOLDOFF_L | Default | d | 1.380 | |
CAM_PROC_RESET_L | Default | d | 0.535 | |
CAM_SF_CLK_R | Default | d | 0.555 | |
CAM_SF_CS_L | Default | d | 0.558 | |
CAM_SF_WP_L | Default | d | 0.556 | |
CAM_XTAL_IN | Default | d | 0.488 | |
CAM_XTAL_OUT_R | Default | d | 0.604 | |
CPU_PROCHOT_L | Default | d | 0.065 | |
CPU_RESET_L | Default | d | 0.091 | |
CPU_THRMTRIP_3V3 | Default | d | 0.748 | |
CPU_THRMTRIP_L | Default | d | 0.320 | |
CPU_THRMTRIP_R_L | Default | d | OL | |
CS4206_DMIC_SCL | Default | d | 0.709 | |
CS4206_FLYC | Default | d | 0.433 | |
CS4206_FLYP | Default | d | 0.631 | |
CS4206_FN | Default | d | 1.936 | |
CS4206_FP | Default | d | 0.450 | |
CS4206_HPREF | Default | d | 0.024 | |
CS4206_VCOM | Default | d | 0.609 | |
CS4206_VREF_ADC | Default | d | 0.766 | |
DP_INTPNL_AUX_N | Default | d | 0.741 | |
DP_INTPNL_AUX_P | Default | d | - | |
DP_INTPNL_HPD | Default | d | 0.550 | |
DP_INTPNL_ML_C_N<0> | Default | d | 0.466 | |
DP_INTPNL_ML_C_N<1> | Default | d | 0.476 | |
DP_INTPNL_ML_C_N<2> | Default | d | 0.464 | |
DP_INTPNL_ML_C_N<3> | Default | d | 0.465 | |
DP_INTPNL_ML_C_P<0> | Default | d | 0.465 | |
DP_INTPNL_ML_C_P<1> | Default | d | 0.476 | |
DP_INTPNL_ML_C_P<2> | Default | d | 0.463 | |
DP_INTPNL_ML_C_P<3> | Default | d | 0.462 | |
DP_INTPNL_ML_N<0> | Default | d | OL | |
DP_INTPNL_ML_N<1> | Default | d | OL | |
DP_INTPNL_ML_N<2> | Default | d | OL | |
DP_INTPNL_ML_N<3> | Default | d | OL | |
DP_INTPNL_ML_P<0> | Default | d | OL | |
DP_INTPNL_ML_P<1> | Default | d | OL | |
DP_INTPNL_ML_P<2> | Default | d | OL | |
DP_INTPNL_ML_P<3> | Default | d | OL | |
DP_INT_SPDIF_AUDIO | Default | d | 0.766 | |
DP_TBTPA_AUXCH_N | Default | d | 0.737 | |
DP_TBTPA_AUXCH_P | Default | d | 0.699 | |
DP_TBTPA_ML_N<1> | Default | d | 0.690 | |
DP_TBTPA_ML_P<1> | Default | d | 0.705 | |
DP_TBTPB_DDC_DATA | Default | d | 0.561 | |
DP_TBTSNK0_AUXCH_C_N | Default | d | 0.651 | |
DP_TBTSNK1_AUXCH_C_P | Default | d | 0.652 | |
DP_TBTSNK1_DDC_CLK | Default | d | 0.531 | |
DP_TBTSRC_AUXCH_N | Default | d | 0.560 | |
DP_TBT_SEL | Default | d | 0.550 | |
ENETCONN_MCT0 | Default | d | OL | |
ENETCONN_MCT1 | Default | d | OL | |
ENETCONN_MCT2 | Default | d | OL | |
ENETCONN_MCT3 | Default | d | OL | |
ENETCONN_MDI_N<0> | Default | d | 0.377 | |
ENETCONN_MDI_N<1> | Default | d | 0.378 | |
ENETCONN_MDI_N<2> | Default | d | 0.377 | |
ENETCONN_MDI_N<3> | Default | d | 0.378 | |
ENETCONN_MDI_P<0> | Default | d | 0.377 | |
ENETCONN_MDI_P<1> | Default | d | 0.378 | |
ENETCONN_MDI_P<2> | Default | d | 0.377 | |
ENETCONN_MDI_P<3> | Default | d | 0.378 | |
ENETCONN_MDI_T_N<0> | Default | d | OL | |
ENETCONN_MDI_T_N<1> | Default | d | OL | |
ENETCONN_MDI_T_N<2> | Default | d | OL | |
ENETCONN_MDI_T_N<3> | Default | d | OL | |
ENETCONN_MDI_T_P<0> | Default | d | OL | |
ENETCONN_MDI_T_P<1> | Default | d | OL | |
ENETCONN_MDI_T_P<2> | Default | d | OL | |
ENETCONN_MDI_T_P<3> | Default | d | OL | |
ENETCONN_TCT | Default | d | 0.378 | |
ENET_ACT | Default | d | 0.765 | |
ENET_CLKREQ_L | Default | d | 0.567 | |
ENET_CLKREQ_L_Q | Default | d | 0.763 | |
ENET_CS_L | Default | d | 0.714 | |
ENET_MISO | Default | d | 0.624 | |
ENET_MOSI | Default | d | 0.735 | |
ENET_PWR_EN_L_R | Default | d | OL | |
ENET_RESET_L | Default | d | 0.472 | |
ENET_SCLK | Default | d | 0.732 | |
ENET_SR_DISABLE | Default | d | 0.573 | |
ENET_SR_LX | Default | d | 0.297 | |
ENET_TRAFFICLED_L | Default | d | 0.765 | |
ENET_VMAIN_PRSNT | Default | d | 0.598 | |
ENET_WAKE_L | Default | d | 0.582 | |
FAN_0_PWM_FET | Default | d | 1.111 | |
FAN_0_PWM_FILT | Default | d | 1.111 | |
FAN_0_TACH_FET | Default | d | OL | |
FAN_0_TACH_FILT | Default | d | OL | |
FET_HDD_SLGSW | Default | d | 0.536 | |
FLAG_V | Default | d | 0.662 | |
FLAG_V_L | Default | d | 0.559 | |
GND | Default | d | - | |
GND_AUDIO_CODEC | Default | d | 0.001 | |
GND_AUDIO_HPAMP | Default | d | 0.000 | |
GPU_GOOD | Default | d | 0.565 | |
GPU_PSI_L | Default | d | 0.544 | |
HDA_BIT_CLK | Default | d | 0.503 | |
HDA_BIT_CLK_R | Default | d | 0.469 | |
HDA_RST_L | Default | d | 0.494 | |
HDA_SDIN0 | Default | d | 0.461 | |
HDA_SDOUT | Default | d | 0.497 | |
HDA_SYNC_R | Default | d | 0.435 | |
HDD5V_RAMP_CAP | Default | d | 0.649 | |
HDD_12V_S0_GATE | Default | d | 0.682 | |
HDD_OOB_1V00_REF | Default | d | 0.710 | |
HDD_PWR_EN | Default | d | 0.514 | |
HDD_PWR_EN_L | Default | d | 0.611 | |
HDD_PWR_EN_R | Default | d | 0.511 | |
HPOUT_JFET_G | Default | d | OL | |
HS_HDET | Default | d | 1.996 | |
HS_MIC_BIAS | Default | d | 0.571 | |
HS_RX_BP | Default | d | 0.594 | |
HS_SW_DET | Default | d | 0.563 | |
I2C_CAMSENSOR_SCL | Default | d | 0.530 | |
I2C_CAMSENSOR_SDA | Default | d | 0.531 | |
I2C_TCON_MAS_SCL | Default | d | 0.636 | |
I2C_TCON_MAS_SDA | Default | d | 0.638 | |
IS1_BLC | Default | d | 0.540 | |
IS1_BLC_F | Default | d | 0.554 | |
IS2_BLC | Default | d | 0.553 | |
IS2_BLC_F | Default | d | 0.553 | |
IS3_BLC | Default | d | 0.553 | |
IS3_BLC_F | Default | d | 0.552 | |
ISNSA_P12VG3H_N | Default | d | 0.568 | |
ISNSA_P12VG3H_P | Default | d | 0.568 | |
ISNSA_P12VS0_CPU_P1V05_N | Default | d | 0.444 | |
ISNSA_P12VS0_CPU_P1V05_N | Default | v | - | |
ISNSA_P12VS0_CPU_P1V05_P | Default | d | 0.444 | |
ISNSA_P12VS0_CPU_P1V05_P | Default | v | - | |
ISNSA_P12VS0_CPU_VCCSA_N | Default | d | 0.444 | |
ISNSA_P12VS0_CPU_VCCSA_P | Default | d | 0.444 | |
ISNSA_P12VS0_FBVDDQ_N | Default | d | 0.444 | |
ISNSA_P12VS0_FBVDDQ_P | Default | d | 0.444 | |
ISNSA_P12VS0_HDD_N | Default | d | 0.444 | |
ISNSA_P12VS0_HDD_P | Default | d | 0.444 | |
ISNSA_P12VS0_P1V05_N | Default | d | 0.444 | |
ISNSA_P12VS0_P1V05_P | Default | d | 0.444 | |
ISNSA_P1V05S0_PCH_N | Default | d | 0.045 | |
ISNSA_P1V05S0_PCH_P | Default | d | 0.045 | |
ISNSA_P1V5S0_CPU_MEM_N | Default | d | 0.130 | |
ISNSA_P1V5S0_CPU_MEM_P | Default | d | 0.130 | |
ISNSA_P3V3S0_SSD_N | Default | d | 0.289 | |
ISNSA_P3V3S0_SSD_P | Default | d | 0.289 | |
ISNSA_P3V3S4_AP_N | Default | d | 0.340 | |
ISNSA_P3V3S4_AP_P | Default | d | 0.340 | |
ISNSA_P5VS0_HDD_N | Default | d | 0.363 | |
ISNSA_P5VS0_HDD_P | Default | d | 0.363 | |
ISNSA_PVDDQS3_DDR_N | Default | d | 0.343 | |
ISNSA_PVDDQS3_DDR_P | Default | d | 0.343 | |
ISNS_CPUAXG_FB | Default | d | 0.702 | |
ISNS_CPUCORE_FB | Default | d | 0.700 | |
ISNS_GPUCORE_FB | Default | d | 0.695 | |
ISNS_GPUCORE_N | Default | d | 0.677 | |
ISNS_GPUCORE_P | Default | d | 0.683 | |
ISNS_P12VG3H_R | Default | d | 0.722 | |
ISNS_P12VS0_CPU_VCCSA_R | Default | d | 0.714 | |
ISNS_P12VS0_FBVDDQ_R | Default | d | 0.719 | |
ISNS_P12VS0_HDD_R | Default | d | 0.717 | |
ISNS_P1V05S0_PCH_R | Default | d | 0.726 | |
ISNS_P3V3S4_AP_R | Default | d | OL | |
ISNS_P5VS0_HDD_R | Default | d | 0.363 | |
JTAG_TBT_TCK_R | Default | d | 0.548 | |
JTAG_TBT_TDO_ISOL | Default | d | 0.660 | |
LED_DRIVER_COMP1 | Default | d | 0.691 | |
LED_DRIVER_COMP2 | Default | d | 0.694 | |
LED_DRIVER_COMP3 | Default | d | 0.687 | |
LED_DRIVER_CS1 | Default | d | 0.220 | |
LED_DRIVER_CS2 | Default | d | 0.220 | |
LED_DRIVER_CS3 | Default | d | 0.220 | |
LED_DRIVER_EN | Default | d | 0.740 | |
LED_DRIVER_EN_L | Default | d | OL | |
LED_DRIVER_EN_L_R | Default | d | 0.556 | |
LED_DRIVER_FDBK1 | Default | d | 0.692 | |
LED_DRIVER_FDBK2 | Default | d | 0.691 | |
LED_DRIVER_FDBK3 | Default | d | 0.692 | |
LED_DRIVER_FDBK_R_1 | Default | d | 0.003 | |
LED_DRIVER_FDBK_R_2 | Default | d | 0.003 | |
LED_DRIVER_FDBK_R_3 | Default | d | 0.003 | |
LED_DRIVER_FLT1 | Default | d | 0.701 | |
LED_DRIVER_FLT2 | Default | d | 0.701 | |
LED_DRIVER_FLT3 | Default | d | 0.701 | |
LED_DRIVER_GATE1 | Default | d | 0.645 | |
LED_DRIVER_GATE1_R | Default | d | 0.655 | |
LED_DRIVER_GATE2 | Default | d | 0.646 | |
LED_DRIVER_GATE2_R | Default | d | 0.646 | |
LED_DRIVER_GATE3 | Default | d | 0.645 | |
LED_DRIVER_GATE3_R | Default | d | 0.645 | |
LED_DRIVER_OVP1 | Default | d | 0.696 | |
LED_DRIVER_OVP1_OUT | Default | d | 0.697 | |
LED_DRIVER_OVP2 | Default | d | 0.692 | |
LED_DRIVER_OVP2P | Default | d | 0.652 | |
LED_DRIVER_OVP2_OUT | Default | d | 0.691 | |
LED_DRIVER_OVP3 | Default | d | 0.695 | |
LED_DRIVER_OVP3_OUT | Default | d | 0.695 | |
LED_DRIVER_REF1 | Default | d | 0.623 | |
LED_DRIVER_REF2 | Default | d | 0.623 | |
LED_DRIVER_REF3 | Default | d | 0.617 | |
LED_DRVR_CLK | Default | d | 0.731 | |
LED_DRVR_CS_C1 | Default | d | 0.221 | |
LED_DRVR_CS_C2 | Default | d | 0.221 | |
LED_DRVR_CS_C3 | Default | d | 0.221 | |
LED_DRVR_CS_RC_1 | Default | d | 0.002 | |
LED_DRVR_CS_RC_2 | Default | d | 0.002 | |
LED_DRVR_CS_RC_3 | Default | d | 0.002 | |
LED_DRVR_DRAIN_1 | Default | d | 0.527 | |
LED_DRVR_DRAIN_2 | Default | d | 0.527 | |
LED_DRVR_DRAIN_3 | Default | d | 0.527 | |
LED_FLT_R_1 | Default | d | 0.726 | |
LED_FLT_R_2 | Default | d | 0.722 | |
LED_FLT_R_3 | Default | d | 0.720 | |
LFRAME_L | Default | d | 0.555 | |
LPCPLUS_GPIO | Default | d | 0.586 | |
LPC_AD<1> | Default | d | 0.590 | |
LPC_CLK33M_LPCPLUS | Default | d | 0.610 | |
LPC_FRAME_L | Default | d | 0.584 | |
LPC_R_AD<3> | Default | d | 0.555 | |
MAX9119_NEG | Default | d | 0.705 | |
MAX9119_OUT | Default | d | 0.710 | |
MAX9119_POS | Default | d | 0.703 | |
MAX97220_BIAS | Default | d | 2.035 | |
MAX97220_C1N | Default | d | 0.871 | |
MAX97220_C1P | Default | d | 0.538 | |
MAX97220_OUTL | Default | d | OL | |
MAX97220_OUTL_ZOBEL | Default | d | 0.035 | |
MAX97220_OUTL_ZOBEL | Default | r | 35.000R | |
MAX97220_OUTR | Default | d | OL | |
MAX97220_OUTR_ZOBEL | Default | d | 0.035 | |
MAX97220_OUTR_ZOBEL | Default | r | 0.350R | |
MAX97220_PVSS | Default | d | 1.477 | |
MAX97220_SHDN_L | Default | d | 0.608 | |
MOJO_RX_L | Default | d | 0.740 | |
MOJO_TX_L | Default | d | 0.738 | |
OCA_FET_DRAIN | Default | d | 0.614 | |
OVP_OREF | Default | d | 0.680 | |
OVP_OUT1_R | Default | d | 0.746 | |
OVP_OUT2 | Default | d | 0.742 | |
OVP_OUT2_R | Default | d | 0.742 | |
OVP_OUT3 | Default | d | 0.742 | |
OVP_OUT3_R | Default | d | 0.742 | |
P1V05_AGND | Default | d | 0.000 | |
P3V3AP_VMON | Default | d | 0.478 | |
P3V42G3H_BOOST | Default | d | 0.630 | |
P3V42G3H_FB | Default | d | 0.726 | |
P3V42G3H_SHDN_L | Default | d | 0.730 | |
P3V42G3H_SW | Default | d | 0.326 | |
PCH_BLC_EXT_BOOT | Default | d | 0.588 | |
PCH_CAM_EXT_BOOT_L | Default | d | 0.578 | |
PCH_CAM_EXT_BOOT_R_L | Default | d | 0.612 | |
PCH_CAM_RESET_R | Default | d | 0.618 | |
PCH_CLK100M_SATAN | Default | d | 0.762 | |
PCH_CLK100M_SATAP | Default | d | 0.769 | |
PCH_DSWVRMEN | Default | d | 0.763 | |
PCH_GPIO32 | Default | d | 0.579 | |
PCH_RCIN_L | Default | d | 0.755 | |
PCH_SMBALERT_L | Default | d | 0.596 | |
PCIE_AP_D2R_N | Default | d | 0.377 | |
PCIE_AP_D2R_P | Default | d | 0.375 | |
PCIE_AP_R2D_N | Default | d | OL | |
PCIE_AP_R2D_P | Default | d | OL | |
PCIE_CLK100M_AP_N | Default | d | 0.391 | |
PCIE_CLK100M_AP_P | Default | d | 0.391 | |
PCIE_CLKREQ5_GPIO44_L | Default | d | 0.556 | |
PCIE_ENET_D2R_C_N | Default | d | 0.485 | |
PCIE_ENET_D2R_C_P | Default | d | 0.486 | |
PCIE_ENET_D2R_N | Default | d | 0.390 | |
PCIE_ENET_D2R_P | Default | d | 0.383 | |
PCIE_WAKE_L | Default | d | 0.524 | |
PGOOD_12V_S0_G1 | Default | d | 0.676 | |
PM_CLKRUN_L | Default | d | OL | |
PM_DSW_PWRGD | Default | d | 0.711 | |
PM_EN_FET_P12V_S0 | Default | d | 0.598 | |
PM_EN_FET_P12V_S0_R | Default | d | 0.560 | |
PM_EN_FET_P3V3_S4 | Default | d | 0.458 | |
PM_EN_REG_CPUCORE_S0 | Default | d | 0.535 | |
PM_EN_REG_GPUCORE_S0_R | Default | d | 0.653 | |
PM_EN_REG_P1V05_S0 | Default | d | 0.509 | |
PM_EN_REG_P3V3_S5 | Default | d | 0.528 | |
PM_PCH_APWROK | Default | d | 0.694 | |
PM_PCH_PWROK_APWROK | Default | d | 0.695 | |
PM_PCH_SYS_PWROK | Default | d | 0.628 | |
PM_PGOOD_REG_FBVDDQ_S0 | Default | d | 0.540 | |
PM_PGOOD_REG_GPUCORE_S0 | Default | d | 0.527 | |
PM_PGOOD_REG_P3V3_S5 | Default | d | 0.551 | |
PM_PGOOD_REG_P5V_S4 | Default | d | 0.453 | |
PM_PGOOD_REG_VCCSA_S0 | Default | d | 0.535 | |
PM_RSMRST_PCH_L | Default | d | 0.544 | |
PM_RSMRST_PCH_L_R | Default | d | 0.546 | |
PM_SLP_S5_L | Default | d | 0.590 | |
PM_SYSRST_L | Default | d | 0.586 | |
PM_THRMTRIP_L | Default | d | 0.062 | |
PP12V_ACDC | Default | d | 0.568 | |
PP12V_G3H | Default | d | 0.568 | |
PP12V_G3H_P3V42 | Default | d | 0.570 | |
PP12V_LCD | Default | d | 0.444 | |
PP12V_LCD_EXT | Default | d | 0.444 | |
PP12V_S0 | Default | d | 0.444 | |
PP12V_S0 | Default | v | - | |
PP12V_S0_BLC | Default | d | 0.545 | |
PP12V_S0_BLC_F | Default | d | 0.545 | |
PP12V_S0_BLC_VIN2 | Default | d | 0.510 | |
PP12V_S0_BLC_VINP | Default | d | 0.527 | |
PP12V_S0_CPUCORE_FLT | Default | d | 0.444 | |
PP12V_S0_CPU_P1V05 | Default | d | 0.444 | |
PP12V_S0_CPU_P1V05 | Default | v | - | |
PP12V_S0_FAN_0_FILT | Default | d | 0.444 | |
PP12V_S0_FBVDDQ | Default | d | 0.444 | |
PP12V_S0_GPUCORE_FLT | Default | d | 0.444 | |
PP12V_S0_HDD | Default | d | 0.444 | |
PP12V_S0_HDD_FET | Default | d | 0.670 | |
PP12V_S0_P1V05 | Default | d | 0.444 | |
PP12V_S0_VCCSA | Default | d | 0.444 | |
PP12V_S5 | Default | d | 0.527 | |
PP1V05_S0 | Default | d | 0.045 | |
PP1V05_S0 | Default | r | 44.000R | |
PP1V05_S0_CPU | Default | d | 0.011 | |
PP1V05_S0_PCH | Default | d | 0.045 | |
PP1V05_TBTCIO | Default | d | 0.166 | |
PP1V05_TBTLC | Default | d | 0.130 | |
PP1V2_ENET_INTREG | Default | d | 0.296 | |
PP1V2_G3H_SMC_VDDC | Default | d | 0.528 | |
PP1V2_S4_CAMERA | Default | d | 0.379 | |
PP1V2_S4_ENET_PHY_AVDDL | Default | d | 0.296 | |
PP1V2_S4_ENET_PHY_GPHYPLL | Default | d | 0.296 | |
PP1V2_S4_ENET_PHY_PCIEPLL | Default | d | 0.296 | |
PP1V5_S0 | Default | d | 0.130 | |
PP1V5_S0_CPU_MEM | Default | d | 0.130 | |
PP1V5_S0_CPU_MEM | Default | r | 128.000R | |
PP1V8_S0 | Default | d | 0.211 | |
PP1V8_S4_CAMERA | Default | d | 0.438 | |
PP1V8_S4_CAMERA_F | Default | d | 0.438 | |
PP3V3R1V8_ENET_LR_OUT_REG | Default | d | 0.560 | |
PP3V3RHV_SW_TBTAPWR | Default | d | 0.569 | |
PP3V3RHV_SW_TBTBPWR | Default | d | 0.569 | |
PP3V3_DMIC_CONN | Default | d | 0.289 | |
PP3V3_G3 | Default | d | 0.568 | |
PP3V3_G3H_AVREF_SMC | Default | d | 0.603 | |
PP3V3_G3H_BT_FET | Default | d | 0.507 | |
PP3V3_G3H_BT_FLT | Default | d | 0.507 | |
PP3V3_G3H_SMC_USBMUX_R | Default | d | 0.318 | |
PP3V3_G3H_SMC_VDDA | Default | d | 0.326 | |
PP3V3_GPU_IFPX_PLLVDD | Default | d | 0.289 | |
PP3V3_S0 | Default | d | 0.289 | |
PP3V3_S0_BLC_R | Default | d | 0.289 | |
PP3V3_S0_SSD | Default | d | 0.289 | |
PP3V3_S0_SSD_FLT | Default | d | 0.289 | |
PP3V3_S0_SW_SD_PWR | Default | d | 0.558 | |
PP3V3_S4 | Default | d | 0.340 | |
PP3V3_S4_ALS_F | Default | d | 0.340 | |
PP3V3_S4_AP | Default | d | 0.340 | |
PP3V3_S4_AP_FET | Default | d | 0.508 | |
PP3V3_S4_AP_FLT | Default | d | 0.508 | |
PP3V3_S4_CAMFILT | Default | d | 0.343 | |
PP3V3_S4_ENET | Default | d | 0.365 | |
PP3V3_S4_ENET_FET_AVDDH | Default | d | 0.365 | |
PP3V3_S4_ENET_FET_BIASVDDH | Default | d | 0.365 | |
PP3V3_S4_ENET_FET_XTALVDDH | Default | d | 0.365 | |
PP3V3_S5 | Default | d | 0.150 | |
PP3V3_S5_XDP_R | Default | d | 0.101 | |
PP3V3_TBTLC | Default | d | 0.417 | |
PP3V42_G3H | Default | d | 0.326 | |
PP3V42_G3H_SMC_SPVSR | Default | d | 0.371 | |
PP4V5_AUDIO_ANALOG | Default | d | 0.500 | |
PP5V_AUDIO_HPAMP | Default | d | 0.358 | |
PP5V_S0 | Default | d | 0.363 | |
PP5V_S0_BLC_R | Default | d | 0.366 | |
PP5V_S0_GPU_VCORE_VCC | Default | d | 0.361 | |
PP5V_S0_HDD | Default | d | 0.363 | |
PP5V_S0_HDD_FET | Default | d | 0.600 | |
PP5V_S0_PCH_V5REF | Default | d | 0.366 | |
PP5V_S4 | Default | d | 0.157 | |
PP5V_S4_CAMERA_F | Default | d | 0.157 | |
PP5V_S4_EXTA | Default | d | 0.526 | |
PP5V_S4_EXTA_F | Default | d | 0.526 | |
PP5V_S4_EXTB | Default | d | 0.527 | |
PP5V_S4_EXTB_F | Default | d | 0.526 | |
PP5V_S4_EXTC | Default | d | 0.529 | |
PP5V_S4_EXTC_F | Default | d | 0.529 | |
PP5V_S4_EXTD | Default | d | 0.528 | |
PP5V_S4_EXTD_F | Default | d | 0.528 | |
PP5V_S5 | Default | d | 0.400 | |
PP5V_S5_PCH_V5REFSUS | Default | d | 0.392 | |
PP8V_BLC | Default | d | 0.676 | |
PPCPUAXG_S0_SENSE | Default | d | 0.002 | |
PPCPUCORE_S0_SENSE_1 | Default | d | 0.002 | |
PPCPUCORE_S0_SENSE_1 | Default | r | 1.100R | |
PPCPUCORE_S0_SENSE_2 | Default | d | 0.002 | |
PPCPUCORE_S0_SENSE_3 | Default | d | 0.002 | |
PPCPUCORE_S0_SENSE_4 | Default | d | 0.002 | |
PPDDRVTT_S0 | Default | d | 0.564 | |
PPFBVDDQ_S0_GPU | Default | d | 0.063 | |
PPFBVDDQ_S0_GPU | Default | r | 62.400R | |
PPGPUCORE_S0_SENSE_1 | Default | d | 0.016 | |
PPGPUCORE_S0_SENSE_2 | Default | d | 0.016 | |
PPGPUCORE_S0_SENSE_3 | Default | d | 0.016 | |
PPGPUCORE_S0_SENSE_3 | Default | r | 16.200R | |
PPGPUCORE_S0_SENSE_4 | Default | d | 0.016 | |
PPHV_SW_TBTAPWR | Default | d | 0.569 | |
PPHV_SW_TBTBPWR | Default | d | 0.569 | |
PPVAXG_S0 | Default | d | 0.002 | |
PPVAXG_S0 | Default | r | 1.600R | |
PPVBATT_G3_RTC | Default | d | OL | |
PPVBATT_G3_RTC_R | Default | d | OL | |
PPVCCSA_S0 | Default | d | 0.007 | |
PPVCCSA_S0 | Default | r | 6.600R | |
PPVCORE_S0_CPU | Default | d | 0.002 | |
PPVCORE_S0_CPU | Default | r | 1.100R | |
PPVCORE_S0_GPU | Default | d | 0.016 | |
PPVCORE_S0_GPU | Default | r | 16.200R | |
PPVDDQ_S3 | Default | d | 334.600 | |
PPVDDQ_S3_DDR | Default | d | 0.343 | |
PPVOUT_G3_PCH_DCPRTC | Default | d | 0.630 | |
PRE_REG_OUT | Default | d | 0.527 | |
PRE_REG_OUT_R | Default | d | OL | |
Q6170_N_G | Default | d | OL | |
Q6170_N_S | Default | d | OL | |
Q6170_P_G | Default | d | OL | |
Q6170_P_S | Default | d | OL | |
Q6171_N_G | Default | d | OL | |
Q6171_N_S | Default | d | OL | |
Q6171_P_G | Default | d | OL | |
Q6171_P_S | Default | d | OL | |
REG_BOOT_FBVDDQ | Default | d | 0.567 | |
REG_BOOT_FBVDDQ_RC | Default | d | 0.567 | |
REG_BOOT_GPUCORE_1 | Default | d | 0.590 | |
REG_BOOT_GPUCORE_4 | Default | d | 0.517 | |
REG_BOOT_GPUCORE_4_RC | Default | d | 0.517 | |
REG_BOOT_P3V3S5 | Default | d | 0.608 | |
REG_BOOT_P3V3S5_RC | Default | d | 0.608 | |
REG_BOOT_P5VS4 | Default | d | 0.610 | |
REG_BOOT_P5VS4_RC | Default | d | 0.610 | |
REG_BOOT_VCCSAS0 | Default | d | 0.536 | |
REG_BOOT_VCCSAS0_RC | Default | d | 0.537 | |
REG_CPU_PHASE_P1V05S0 | Default | d | 0.011 | |
REG_FBVDDQ_FB | Default | d | 0.529 | |
REG_FBVDDQ_FSEL | Default | d | 0.544 | |
REG_FBVDDQ_OCSET | Default | d | 0.535 | |
REG_FBVDDQ_RTN | Default | d | 0.532 | |
REG_FBVDDQ_SET0 | Default | d | 0.544 | |
REG_FBVDDQ_SET1_R | Default | d | 0.542 | |
REG_FBVDDQ_SREF | Default | d | 0.541 | |
REG_FBVDDQ_VO | Default | d | 0.534 | |
REG_GPUCORE_VID2 | Default | d | 0.503 | |
REG_GPUCORE_VID4 | Default | d | 0.621 | |
REG_GPUCORE_VID6 | Default | d | 0.635 | |
REG_ISENAXG_N | Default | d | 0.002 | |
REG_ISENAXG_P | Default | d | 0.002 | |
REG_ISENCORE_1_N | Default | d | 0.002 | |
REG_ISENCORE_1_N | Default | r | 1.100R | |
REG_ISENCORE_1_P | Default | d | 0.002 | |
REG_ISENCORE_1_P | Default | r | 1.100R | |
REG_ISENCORE_2_N | Default | d | 0.002 | |
REG_ISENCORE_2_P | Default | d | 0.002 | |
REG_ISENCORE_3_N | Default | d | 0.002 | |
REG_ISENCORE_3_P | Default | d | 0.002 | |
REG_ISENCORE_4_N | Default | d | 0.002 | |
REG_ISENCORE_4_P | Default | d | 0.002 | |
REG_ISEN_GCORE_1_N | Default | d | 0.016 | |
REG_ISEN_GCORE_1_P | Default | d | 0.016 | |
REG_ISEN_GCORE_2_N | Default | d | 0.016 | |
REG_ISEN_GCORE_2_P | Default | d | 0.016 | |
REG_ISEN_GCORE_3_N | Default | d | 0.016 | |
REG_ISEN_GCORE_3_N | Default | r | 16.200R | |
REG_ISEN_GCORE_3_P | Default | d | 0.016 | |
REG_ISEN_GCORE_3_P | Default | r | 16.200R | |
REG_ISEN_GCORE_4_N | Default | d | 0.016 | |
REG_ISEN_GCORE_4_P | Default | d | 0.016 | |
REG_LGATE_FBVDDQ | Default | d | 0.451 | |
REG_LGATE_P1V05S0 | Default | d | 0.447 | |
REG_LGATE_P3V3S5 | Default | d | 0.464 | |
REG_LGATE_P5VS4 | Default | d | 0.459 | |
REG_LGATE_VCCSAS0 | Default | d | 0.447 | |
REG_LGATE_VDDQS3 | Default | d | 0.466 | |
REG_LVCC_UB530 | Default | d | 0.447 | |
REG_LVCC_UB650 | Default | d | 0.456 | |
REG_P3V3S5_FB | Default | d | 0.550 | |
REG_P3V3S5_FSET | Default | d | 0.556 | |
REG_P3V3S5_ISEN | Default | d | 0.551 | |
REG_P3V3S5_OCSET | Default | d | 0.555 | |
REG_P3V3S5_VOUT | Default | d | 0.146 | |
REG_P3V3S5_VOUT_R | Default | d | 1.131 | |
REG_P5VS4_FB | Default | d | 0.550 | |
REG_P5VS4_FSET | Default | d | 0.556 | |
REG_P5VS4_ISEN | Default | d | 0.551 | |
REG_P5VS4_OCSET | Default | d | 0.553 | |
REG_P5VS4_VOUT | Default | d | 0.157 | |
REG_P5VS4_VOUT_R | Default | d | 1.140 | |
REG_PHASE_CPUAXG | Default | d | 0.002 | |
REG_PHASE_CPUCORE_2 | Default | d | 0.002 | |
REG_PHASE_CPUCORE_3 | Default | d | 0.002 | |
REG_PHASE_CPUCORE_4 | Default | d | 0.002 | |
REG_PHASE_FBVDDQ | Default | d | 0.063 | |
REG_PHASE_GPUCORE_1 | Default | d | 0.016 | |
REG_PHASE_GPUCORE_2 | Default | d | 0.016 | |
REG_PHASE_GPUCORE_3 | Default | d | 0.016 | |
REG_PHASE_GPUCORE_4 | Default | d | 0.016 | |
REG_PHASE_P1V05S0 | Default | d | 0.038 | |
REG_PHASE_P1V05S0_L | Default | d | 0.045 | |
REG_PHASE_P1V8S0 | Default | d | 0.211 | |
REG_PHASE_P3V3S5 | Default | d | 0.151 | |
REG_PHASE_P5VS4 | Default | d | 0.157 | |
REG_PHASE_VCCSAS0 | Default | d | 0.007 | |
REG_PHASE_VDDQS3 | Default | d | 0.342 | |
REG_PHASE_VDDQS3_L | Default | d | 0.343 | |
REG_PVCC_U7500 | Default | d | 0.361 | |
REG_PVCC_UB750 | Default | d | 0.362 | |
REG_PWM_GPUCORE_1 | Default | d | 0.677 | |
REG_PWM_GPUCORE_3 | Default | d | 0.681 | |
REG_SNUBBER_FBVDDQ | Default | d | OL | |
REG_SNUBBER_GPUCORE_4 | Default | d | OL | |
REG_SNUBBER_P3V3S5 | Default | d | OL | |
REG_SNUBBER_P5VS4 | Default | d | OL | |
REG_SNUBBER_VDDQS3 | Default | d | OL | |
REG_U7600_FCCM | Default | d | 0.560 | |
REG_U7600_FCCM_R | Default | d | OL | |
REG_UGATE_FBVDDQ | Default | d | 0.535 | |
REG_UGATE_GPUCORE_4 | Default | d | 0.621 | |
REG_UGATE_P1V05S0 | Default | d | 0.532 | |
REG_UGATE_P5VS4 | Default | d | 0.599 | |
REG_UGATE_VCCSAS0 | Default | d | 0.570 | |
REG_UGATE_VDDQS3 | Default | d | 0.830 | |
REG_VCC1_U7600 | Default | d | 0.521 | |
REG_VCC2_U7600 | Default | d | 0.408 | |
REG_VCCSAS0_FB | Default | d | 0.512 | |
REG_VCCSAS0_FSEL | Default | d | 0.002 | |
REG_VCC_U7500 | Default | d | 0.367 | |
REG_VCC_UB750 | Default | d | 0.370 | |
REG_VDDQS3_REFIN | Default | d | 0.700 | |
REG_VDDQS3_VDDQSNS | Default | d | 0.332 | |
REG_VDDQS3_VREF | Default | d | 0.648 | |
REG_VIN_U7600 | Default | d | 0.528 | |
RTC_RESET_L | Default | d | 0.750 | |
RTC_RESET_L_R | Default | d | 0.616 | |
SATALED_R_L | Default | d | OL | |
SATA_HDD_D2R_C_N | Default | d | OL | |
SATA_HDD_D2R_C_P | Default | d | OL | |
SATA_HDD_R2D_C_N | Default | d | 0.350 | |
SATA_HDD_R2D_C_P | Default | d | 0.350 | |
SATA_HDD_R2D_N | Default | d | OL | |
SATA_HDD_R2D_P | Default | d | OL | |
SATA_SSD_D2R_N | Default | d | 0.381 | |
SATA_SSD_D2R_P | Default | d | 0.378 | |
SATA_SSD_R2D_N | Default | d | 0.347 | |
SATA_SSD_R2D_P | Default | d | 0.348 | |
SDCONN_CLK | Default | d | 0.582 | |
SDCONN_CLK_R | Default | d | 0.582 | |
SDCONN_CMD_R | Default | d | 0.576 | |
SDCONN_DATA<0> | Default | d | 0.577 | |
SDCONN_DATA<1> | Default | d | 0.576 | |
SDCONN_DATA<4> | Default | d | 0.790 | |
SDCONN_DATA<5> | Default | d | 0.795 | |
SDCONN_DATA<6> | Default | d | 0.789 | |
SDCONN_DATA<7> | Default | d | 0.788 | |
SDCONN_DATA_R<0> | Default | d | 0.576 | |
SDCONN_DATA_R<1> | Default | d | 0.576 | |
SDCONN_DATA_R<2> | Default | d | 0.577 | |
SDCONN_DATA_R<3> | Default | d | 0.582 | |
SDCONN_DATA_R<4> | Default | d | 0.788 | |
SDCONN_DATA_R<5> | Default | d | 0.787 | |
SDCONN_DATA_R<6> | Default | d | 0.788 | |
SDCONN_DATA_R<7> | Default | d | 0.788 | |
SDCONN_DETECT | Default | d | 0.475 | |
SDCONN_STATE_CHANGE | Default | d | 0.464 | |
SDCONN_WP | Default | d | 0.757 | |
SLG_ENET_RESET_L | Default | d | 0.433 | |
SMBUS_PCH_CLK | Default | d | 0.504 | |
SMBUS_PCH_CLK_R | Default | d | OL | |
SMBUS_PCH_DATA | Default | d | 0.512 | |
SMBUS_SMC_1_S0_SCL | Default | d | 0.720 | |
SMBUS_SMC_1_S0_SDA | Default | d | 0.721 | |
SMBUS_SMC_2_S4_SCL | Default | d | 0.755 | |
SMBUS_SMC_2_S4_SDA | Default | d | 0.750 | |
SMBUS_SMC_3_SCL | Default | d | 0.753 | |
SMBUS_SMC_3_SDA | Default | d | 0.753 | |
SMB_ALS_F_SCL | Default | d | 0.777 | |
SMB_ALS_F_SDA | Default | d | 0.755 | |
SMB_ENET_SDA | Default | d | 0.735 | |
SMB_PCH_BLC_SDA | Default | d | 0.511 | |
SMB_TCON_BLC_SCL | Default | d | 0.636 | |
SMB_TCON_BLC_SDA | Default | d | 0.633 | |
SMCISNS_GPUCORE | Default | d | 0.746 | |
SMCISNS_P12VG3H | Default | d | 0.750 | |
SMCISNS_P12VS0_CPU_VCCSA | Default | d | 0.758 | |
SMCISNS_P12VS0_P1V05 | Default | d | 0.756 | |
SMCISNS_P1V05S0_PCH | Default | d | 0.747 | |
SMCISNS_P1V5S0_CPU_MEM | Default | d | 0.756 | |
SMCISNS_P3V3S0_SSD | Default | d | 0.759 | |
SMCISNS_PVDDQS3_DDR | Default | d | 0.758 | |
SMCVSNS_CPUCORE | Default | d | 0.751 | |
SMCVSNS_P12VG3H | Default | d | 0.740 | |
SMCVSNS_P3V3S0 | Default | d | 0.745 | |
SMCVSNS_P5VS0_HDD | Default | d | 0.751 | |
SMC_ASSERT_RTCRST | Default | d | 0.757 | |
SMC_BLC_FAULT | Default | d | 0.761 | |
SMC_CPU_PECI | Default | d | 0.331 | |
SMC_DELAYED_PWRGD | Default | d | 0.686 | |
SMC_EXTAL | Default | d | 0.780 | |
SMC_FAN_0_CTL | Default | d | 0.760 | |
SMC_FAN_0_TACH | Default | d | 0.763 | |
SMC_GFX_OVERTEMP | Default | d | 0.756 | |
SMC_GFX_THROTTLE_L | Default | d | 0.544 | |
SMC_MANUAL_RST_L | Default | d | 0.674 | |
SMC_OOB1_RX_CN | Default | d | 0.608 | |
SMC_OOB1_RX_FILT | Default | d | 0.608 | |
SMC_OOB1_RX_L | Default | d | 0.664 | |
SMC_OOB1_RX_R | Default | d | 0.711 | |
SMC_OOB2_RX_L | Default | d | 0.753 | |
SMC_OOB2_TX_L | Default | d | 0.753 | |
SMC_PECI_L | Default | d | 0.744 | |
SMC_PECI_L_R | Default | d | 0.745 | |
SMC_PME_S4_WAKE_L | Default | d | 0.596 | |
SMC_PM_G2_EN | Default | d | 0.582 | |
SMC_PROCHOT | Default | d | 0.753 | |
SMC_RESET_L | Default | d | 0.552 | |
SMC_ROMBOOT | Default | d | 1.738 | |
SMC_RX_L | Default | d | 0.763 | |
SMC_S4_WAKESRC_EN | Default | d | 0.760 | |
SMC_S5_PWRGD_VIN | Default | d | 0.750 | |
SMC_TCK | Default | d | 0.758 | |
SMC_TDI | Default | d | 0.760 | |
SMC_TDO | Default | d | 0.760 | |
SMC_THRMTRIP | Default | d | 0.757 | |
SMC_TMS | Default | d | 0.758 | |
SMC_TX_L | Default | d | 0.761 | |
SMC_WAKE_SCI_L | Default | d | 0.562 | |
SMC_XTAL | Default | d | 0.768 | |
SMC_XTAL_R | Default | d | 0.800 | |
SMIA_CLK_N | Default | d | 0.481 | |
SMIA_CLK_P | Default | d | 0.487 | |
SMIA_DATA_N | Default | d | 0.470 | |
SMIA_DATA_P | Default | d | 0.475 | |
SML_PCH_0_CLK | Default | d | 0.584 | |
SML_PCH_0_DATA | Default | d | 0.588 | |
SNS_FBVDDQ_XW_N | Default | d | 0.001 | |
SNS_FBVDDQ_XW_P | Default | d | 0.064 | |
SNS_VCCSAS0_XW_P | Default | d | 0.008 | |
SPI_ALT_CLK | Default | d | 0.621 | |
SPI_ALT_CS_L | Default | d | 0.612 | |
SPI_ALT_MISO | Default | d | 0.544 | |
SPI_ALT_MOSI | Default | d | 0.593 | |
SPI_CLK_R | Default | d | 0.555 | |
SPI_CS0_L | Default | d | 0.563 | |
SPI_DESCRIPTOR_OVERRIDE_L | Default | d | 0.758 | |
SPI_DESCRIPTOR_OVERRIDE_R | Default | d | 0.796 | |
SPI_MISO | Default | d | 0.520 | |
SPI_MLB_CLK | Default | d | 0.618 | |
SPI_MLB_CS_L | Default | d | 0.602 | |
SPI_MLB_MISO | Default | d | 0.527 | |
SPI_MLB_MOSI | Default | d | 0.538 | |
SPI_MOSI_R | Default | d | 0.525 | |
SPI_SMC_CLK | Default | d | 0.626 | |
SPI_SMC_MISO | Default | d | 0.547 | |
SPI_SMC_MOSI | Default | d | 0.548 | |
SPI_WP_L | Default | d | 0.644 | |
SPKR_MATCH_DRV | Default | d | 0.743 | |
SPKR_MATCH_DRV_R | Default | d | 0.743 | |
STRCLK_R1 | Default | d | 0.670 | |
SYS_PWROK_R | Default | d | 0.552 | |
TBTACONN_20_RC | Default | d | 0.580 | |
TBTAPWRSW_ISET_S0 | Default | d | 0.476 | |
TBTAPWRSW_ISET_S0_R | Default | d | OL | |
TBTAPWRSW_ISET_S3 | Default | d | 0.476 | |
TBTAPWRSW_ISET_S3_R | Default | d | OL | |
TBTAPWRSW_ISET_V3P3 | Default | d | 0.477 | |
TBTBCONN_20_RC | Default | d | 0.581 | |
TBTBPWRSW_ISET_S0 | Default | d | 0.477 | |
TBTBPWRSW_ISET_S0_R | Default | d | OL | |
TBTBPWRSW_ISET_S3 | Default | d | 0.476 | |
TBTBPWRSW_ISET_S3_R | Default | d | OL | |
TBTBPWRSW_ISET_V3P3 | Default | d | 0.479 | |
TBTROM_WP_L | Default | d | 0.739 | |
TBT_A_HPD | Default | d | 0.843 | |
TBT_A_LSRX_UNBUF | Default | d | 0.692 | |
TBT_A_LSTX | Default | d | 0.580 | |
TBT_B_CIO_SEL | Default | d | 0.571 | |
TBT_B_HPD | Default | d | 0.844 | |
TBT_B_LSTX | Default | d | 0.586 | |
TBT_CLKREQ_L | Default | d | 0.473 | |
TBT_DDC_XBAR_EN_L | Default | d | 0.534 | |
TBT_EN_LC_ISOL | Default | d | 0.466 | |
TBT_EN_LC_PWR | Default | d | 0.560 | |
TBT_EN_LC_RC1V05 | Default | d | 0.466 | |
TBT_MONOBSN | Default | d | 0.194 | |
TBT_PCH_CLKREQ_L | Default | d | 0.559 | |
TBT_PWR_ON_POC_RST_L | Default | d | 0.556 | |
TBT_RBIAS | Default | d | 0.799 | |
TBT_SPI_CLK | Default | d | 0.575 | |
TBT_SPI_CS_L | Default | d | 0.672 | |
TBT_TEST_PWR_GOOD | Default | d | 0.004 | |
TP_PCH_GPIO6_TACH2 | Default | d | 0.682 | |
TP_PCH_STRP_ESI_L | Default | d | 0.555 | |
TP_SMC_MD1 | Default | d | OL | |
TP_SMC_TRST_L | Default | d | OL | |
TP_TBT_MONDC0 | Default | d | 0.370 | |
TP_TBT_MONDC1 | Default | d | 0.669 | |
TP_TBT_THERM_DP | Default | d | 0.736 | |
TP_TBT_XTAL25OUT | Default | d | 0.284 | |
TSNS_2_2_P | Default | d | 0.769 | |
TSNS_2_3_N | Default | d | 0.765 | |
TSNS_2_3_P | Default | d | 0.775 | |
TSNS_2_6_N | Default | d | 0.778 | |
U9800_PIN20 | Default | d | 0.001 | |
U9800_SC | Default | d | 0.740 | |
USB2_EXTA_MUXED_F_N | Default | d | 0.791 | |
USB2_EXTA_MUXED_F_P | Default | d | 0.791 | |
USB2_EXTA_MUXED_N | Default | d | 0.791 | |
USB2_EXTA_MUXED_P | Default | d | 0.791 | |
USB2_EXTB_MUXED_F_N | Default | d | 0.606 | |
USB2_EXTB_MUXED_F_P | Default | d | 0.596 | |
USB2_EXTB_MUXED_N | Default | d | 0.606 | |
USB2_EXTB_MUXED_P | Default | d | 0.596 | |
USB2_EXTC_F_N | Default | d | 0.558 | |
USB2_EXTC_F_P | Default | d | 0.558 | |
USB2_EXTD_MUXED_F_N | Default | d | 0.606 | |
USB2_EXTD_MUXED_F_P | Default | d | 0.598 | |
USB3_EXTA_RX_N | Default | d | 0.379 | |
USB3_EXTA_RX_P | Default | d | 0.378 | |
USB3_EXTA_TX_C_N | Default | d | OL | |
USB3_EXTA_TX_C_P | Default | d | OL | |
USB3_EXTA_TX_F_N | Default | d | OL | |
USB3_EXTA_TX_F_P | Default | d | OL | |
USB3_EXTB_RX_N | Default | d | 0.378 | |
USB3_EXTB_RX_P | Default | d | 0.375 | |
USB3_EXTB_TX_C_N | Default | d | OL | |
USB3_EXTB_TX_C_P | Default | d | OL | |
USB3_EXTB_TX_F_N | Default | d | OL | |
USB3_EXTB_TX_F_P | Default | d | OL | |
USB3_EXTB_TX_N | Default | d | 0.355 | |
USB3_EXTC_RX_N | Default | d | 0.382 | |
USB3_EXTC_RX_P | Default | d | 0.376 | |
USB3_EXTC_TX_C_N | Default | d | OL | |
USB3_EXTC_TX_C_P | Default | d | OL | |
USB3_EXTC_TX_F_N | Default | d | OL | |
USB3_EXTC_TX_F_P | Default | d | OL | |
USB3_EXTC_TX_P | Default | d | 0.355 | |
USB3_EXTD_RX_N | Default | d | 0.373 | |
USB3_EXTD_RX_P | Default | d | 0.377 | |
USB3_EXTD_TX_C_N | Default | d | OL | |
USB3_EXTD_TX_C_P | Default | d | OL | |
USB3_EXTD_TX_F_N | Default | d | OL | |
USB3_EXTD_TX_F_P | Default | d | OL | |
USB3_EXTD_TX_P | Default | d | 0.355 | |
USB_ACT_DET | Default | d | 0.795 | |
USB_BT_MUX_P | Default | d | 0.793 | |
USB_BT_N | Default | d | 0.734 | |
USB_DEBUGPRT_EN_L | Default | d | 0.744 | |
USB_EXTAB_ILIM | Default | d | 0.520 | |
USB_EXTAB_ILIM_R | Default | d | OL | |
USB_EXTA_OC_L | Default | d | 0.485 | |
USB_EXTB_OC_L | Default | d | 0.484 | |
USB_EXTB_SEL_XHCI | Default | d | 0.603 | |
USB_EXTC_OC_L | Default | d | 0.487 | |
USB_EXTD_SEL_XHCI | Default | d | 0.605 | |
USB_HUB_XTAL1 | Default | d | 0.787 | |
USB_HUB_XTAL2_R | Default | d | 0.744 | |
USB_PCH_10_N | Default | d | 0.545 | |
USB_PCH_3_P | Default | d | 0.539 | |
UVP_IN_1 | Default | d | 0.745 | |
UVP_IN_1_REF | Default | d | 0.748 | |
UVP_IN_2 | Default | d | 0.747 | |
UVP_IN_3 | Default | d | 0.737 | |
UVP_IN_4 | Default | d | 0.742 | |
UVP_REF | Default | d | 0.706 | |
VBIAS_DAC | Default | d | 0.747 | |
VIDEO_ON | Default | d | 0.814 | |
VR_GPU_COMP_RC | Default | d | OL | |
VR_GPU_IMON_R | Default | d | 0.732 | |
VR_GPU_ISNS2_R_N | Default | d | 0.710 | |
VR_GPU_ISNS3_RR_2 | Default | d | 0.014 | |
VR_GPU_PWM1_R | Default | d | 0.678 | |
VR_GPU_PWM2_R | Default | d | 0.675 | |
VR_GPU_PWM3_R | Default | d | 0.680 | |
VR_GPU_VSEN | Default | d | 0.015 | |
XDP_CPU_PLTRST_L | Default | d | 1.562 | |
XDP_DA0_USB_EXTA_OC_L | Default | d | 0.523 | |
XDP_DA1_USB_EXTB_OC_L | Default | d | 0.517 | |
XDP_DA2_USB_EXTC_OC_L | Default | d | 0.530 | |
XDP_DA3_USB_EXTD_OC_L | Default | d | 0.518 | |
XDP_DB0_USB_EXTB_OC_EHCI_L | Default | d | 0.588 | |
XDP_DB1_USB_EXTD_OC_EHCI_L | Default | d | 0.588 | |
XDP_DB2_AP_PWR_EN | Default | d | 0.596 | |
XDP_DB3_SDCONN_STATE_CHANGE | Default | d | 0.491 | |
XDP_DC3_SATARDRVR_EN | Default | d | 0.586 | |
XDP_DD0_DP_TBT_SEL | Default | d | 0.580 | |
XDP_DD2_AUD_IPHS_SWITCH_EN_PCH | Default | d | 0.580 | |
XDP_PCH_PWRBTN_L | Default | d | 0.595 | |
XDP_PCH_PWRGD | Default | d | 1.155 | |
XDP_PCH_TCK | Default | d | 0.052 | |
XDP_PCH_TDO | Default | d | 0.079 | |
XDP_PIN03 | Default | d | 0.556 |
Component | Type | Value |
---|