Netname | Condition | Type | Value | Comment |
---|---|---|---|---|
12V_COMP_REF | Default | d | 0.667 | |
9V_COMP_REF | Default | d | 0.677 | |
AGND_BLC | Default | d | 0.000 | |
AUD_GPIO_3 | Default | d | 0.555 | |
AUD_HP_PORT_REF | Default | d | OL | |
AUD_I2C_INT_L | Default | d | 0.524 | |
AUD_IPHS_SWITCH_EN | Default | d | 0.540 | |
AUD_IPHS_SWITCH_EN_PCH | Default | d | 0.640 | |
AUD_LAMP_BOOTLN | Default | d | 0.584 | |
AUD_LAMP_BOOTLP | Default | d | 0.587 | |
AUD_LAMP_BOOTRN | Default | d | 0.584 | |
AUD_LAMP_BOOTRP | Default | d | 0.587 | |
AUD_LAMP_LINC_N | Default | d | 0.712 | |
AUD_LAMP_LINC_P | Default | d | 0.717 | |
AUD_LAMP_OUTNL | Default | d | 0.546 | |
AUD_LAMP_OUTNR | Default | d | 0.545 | |
AUD_LAMP_OUTPL | Default | d | 0.546 | |
AUD_LAMP_OUTPR | Default | d | 0.545 | |
AUD_LAMP_RINC_N | Default | d | 0.656 | |
AUD_LAMP_RINC_P | Default | d | 0.714 | |
AUD_LO1_L_C_N | Default | d | OL | |
AUD_LO1_L_C_P | Default | d | OL | |
AUD_LO1_L_N | Default | d | 0.712 | |
AUD_LO1_L_P | Default | d | 0.717 | |
AUD_LO1_R_C_N | Default | d | OL | |
AUD_LO1_R_C_P | Default | d | OL | |
AUD_LO1_R_N | Default | d | 0.715 | |
AUD_LO1_R_P | Default | d | 0.713 | |
AUD_LO2_L_N | Default | d | 0.714 | |
AUD_LO2_L_P | Default | d | 0.656 | |
AUD_LO2_R_N | Default | d | 0.714 | |
AUD_LO2_R_P | Default | d | 0.715 | |
AUD_PORTD_DET_L | Default | d | 1.109 | |
AUD_RAMP_LINC_N | Default | d | 0.715 | |
AUD_RAMP_LINC_P | Default | d | 0.713 | |
AUD_RAMP_OUTNL | Default | d | 0.560 | |
AUD_RAMP_OUTNR | Default | d | 0.559 | |
AUD_RAMP_OUTPL | Default | d | 0.562 | |
AUD_RAMP_OUTPR | Default | d | 0.562 | |
AUD_RAMP_RINC_N | Default | d | 0.715 | |
AUD_RAMP_RINC_P | Default | d | 0.714 | |
AUD_SPKRAMP_WIN_SHDN_L | Default | d | 0.555 | |
AUD_SPKR_LTWT_OUT_N | Default | d | 0.546 | |
AUD_SPKR_LTWT_OUT_P | Default | d | 0.545 | |
AUD_SPKR_LWFR_OUT_N | Default | d | 0.546 | |
AUD_SPKR_LWFR_OUT_P | Default | d | 0.545 | |
AUD_SPKR_RTWT_OUT_N | Default | d | 0.560 | |
AUD_SPKR_RTWT_OUT_P | Default | d | 0.562 | |
AUD_SPKR_RWFR_OUT_N | Default | d | 0.562 | |
AUD_SPKR_RWFR_OUT_P | Default | d | 0.559 | |
AUD_SPKR_VENDOR_ID_R | Default | d | OL | |
BLC_BL_GATE | Default | d | 0.741 | |
BLC_BST | Default | d | 0.739 | |
BLC_BYPASS_GATE | Default | d | 0.746 | |
BLC_EN | Default | d | 0.779 | |
BLC_ENA1 | Default | d | 0.694 | |
BLC_GND_1 | Default | d | 0.000 | |
BLC_GND_2 | Default | d | 0.000 | |
BLC_GND_3 | Default | d | 0.000 | |
BLC_LED_N_1 | Default | d | 0.542 | |
BLC_LED_N_2 | Default | d | 0.544 | |
BLC_LED_N_3 | Default | d | 0.544 | |
BLC_LED_P_1 | Default | d | 0.759 | |
BLC_LED_P_2 | Default | d | 0.759 | |
BLC_LED_P_3 | Default | d | 0.761 | |
BLC_MCU_BV | Default | d | 0.532 | |
BLC_MCU_BV_D | Default | d | 0.734 | |
BLC_MCU_BV_R | Default | d | 0.739 | |
BLC_MCU_RXD0 | Default | d | 0.667 | |
BLC_MCU_TXD0 | Default | d | 0.672 | |
BLC_ON | Default | d | 1.680 | |
BLC_ON_DRAIN | Default | d | 0.551 | |
BLC_ON_R | Default | d | 0.697 | |
BLC_P3V3S | Default | d | 0.287 | |
BLC_P3V3_REF | Default | d | 0.605 | |
BLC_PWM_1 | Default | d | 0.540 | |
BLC_PWM_2 | Default | d | 0.561 | |
BLC_PWM_3 | Default | d | 0.580 | |
BLC_P_ON | Default | d | 0.600 | |
BLC_P_ON_BYPASS | Default | d | 0.697 | |
BLC_P_ON_D | Default | d | 1.308 | |
BLC_P_ON_DRAIN | Default | d | 0.556 | |
BLC_P_ON_D_R | Default | d | 2.106 | |
BLC_P_ON_GATE | Default | d | 0.746 | |
BLC_P_ON_R | Default | d | 0.698 | |
BLC_SNUB_1 | Default | d | OL | |
BLC_SNUB_2 | Default | d | OL | |
BLC_SNUB_3 | Default | d | OL | |
BLC_UVLO | Default | d | 0.734 | |
BLC_VIN2_GATE | Default | d | OL | |
BLC_VIN2_SRC | Default | d | 0.614 | |
BLC_VINP_GATE | Default | d | OL | |
BLC_VOUT1 | Default | d | 0.759 | |
BLC_VOUT2 | Default | d | 0.759 | |
BLC_VOUT3 | Default | d | 0.760 | |
BOOST_BYPASS | Default | d | 0.606 | |
BOOST_FET_DRAIN | Default | d | OL | |
BOOST_GDRV_R | Default | d | OL | |
BOOST_ISNS_R | Default | d | OL | |
BURSTMODE_EN_R_L | Default | d | 1.964 | |
CAM_P1V2_RST_HOLDOFF | Default | d | 1.376 | |
CAM_P1V2_RST_HOLDOFF_L | Default | d | 1.356 | |
CAM_PROC_RESET_L | Default | d | 0.530 | |
CORE_VOLTAGES_ON | Default | d | 0.591 | |
CORE_VOLTAGES_ON_R | Default | d | 1.341 | |
CPU_PROCHOT_L | Default | d | 0.065 | |
CPU_PROCHOT_L | Default | r | 63.900R | |
CS4206_FN | Default | d | 1.934 | |
CS4206_FP | Default | d | 0.449 | |
CS4206_VCOM | Default | d | 0.606 | |
DP_TBTSNK0_HPD | Default | d | 0.513 | |
DP_TBTSNK1_ML_C_N<3> | Default | d | 0.388 | |
ENETCONN_MCT0 | Default | d | OL | |
ENETCONN_MCT1 | Default | d | OL | |
ENETCONN_MCT2 | Default | d | OL | |
ENETCONN_MCT3 | Default | d | OL | |
ENETCONN_MCT_BS | Default | d | OL | |
ENETCONN_MDI_N<0> | Default | d | 0.375 | |
ENETCONN_MDI_N<1> | Default | d | 0.375 | |
ENETCONN_MDI_N<2> | Default | d | 0.374 | |
ENETCONN_MDI_N<3> | Default | d | 0.374 | |
ENETCONN_MDI_P<0> | Default | d | 0.374 | |
ENETCONN_MDI_P<1> | Default | d | 0.374 | |
ENETCONN_MDI_P<2> | Default | d | 0.374 | |
ENETCONN_MDI_P<3> | Default | d | 0.374 | |
ENETCONN_MDI_T_N<0> | Default | d | OL | |
ENETCONN_MDI_T_N<1> | Default | d | OL | |
ENETCONN_MDI_T_N<2> | Default | d | OL | |
ENETCONN_MDI_T_N<3> | Default | d | OL | |
ENETCONN_MDI_T_P<0> | Default | d | OL | |
ENETCONN_MDI_T_P<1> | Default | d | OL | |
ENETCONN_MDI_T_P<2> | Default | d | OL | |
ENETCONN_MDI_T_P<3> | Default | d | OL | |
ENETCONN_TCT | Default | d | 0.374 | |
ENET_ACT | Default | d | OL | |
ENET_CS_L | Default | d | 0.708 | |
ENET_MISO | Default | d | 0.620 | |
ENET_MOSI | Default | d | 0.733 | |
ENET_SCLK | Default | d | 0.731 | |
ENET_SR_LX | Default | d | 0.290 | |
ENET_TRAFFICLED_L | Default | d | 0.753 | |
ENET_VMAIN_PRSNT | Default | d | 0.596 | |
FAN_0_PWM_FET | Default | d | 1.102 | |
FAN_0_PWM_FILT | Default | d | 1.102 | |
FAN_0_TACH_FET | Default | d | OL | |
FAN_0_TACH_FILT | Default | d | OL | |
FET_EN_P12V_S0_R | Default | d | 0.676 | |
FET_EN_P12V_S5_R | Default | d | 0.678 | |
FET_HDD_SLGSW | Default | d | 0.529 | |
FET_VCC_U8480 | Default | d | 0.600 | |
FLAG_V_L | Default | d | 0.553 | |
GND | Default | d | 0.000 | |
GPU_PRESENT_DRAIN | Default | d | 0.589 | |
GPU_PRESENT_R | Default | d | 1.289 | |
HDD5V_RAMP_CAP | Default | d | 0.646 | |
HDD_12V_S0_GATE | Default | d | 0.676 | |
HDD_OOB_1V00_REF | Default | d | 0.704 | |
HDD_PWR_EN | Default | d | 0.288 | |
HDD_PWR_EN_L | Default | d | 0.603 | |
HDD_PWR_EN_R | Default | d | 0.507 | |
HS_HDET | Default | d | 1.995 | |
HS_RX_BP | Default | d | 0.594 | |
I2C_TBTRTR_SDA | Default | d | 0.416 | |
IS1_BLC | Default | d | 0.544 | |
IS1_BLC_F | Default | d | 0.546 | |
IS2_BLC | Default | d | 0.544 | |
IS2_BLC_F | Default | d | 0.544 | |
IS3_BLC | Default | d | 0.543 | |
IS3_BLC_F | Default | d | 0.544 | |
ISNS_P12VS0_HDD_R | Default | d | 0.710 | |
ITS_PLUGGED_IN | Default | d | 1.146 | |
LCD_BKL_ON_DLY | Default | d | 0.747 | |
LCD_SHOULD_ON_R | Default | d | 1.297 | |
LED_DRIVER_FDBK1 | Default | d | 0.682 | |
LED_DRIVER_FDBK_R_1 | Default | d | 0.003 | |
LED_DRIVER_FDBK_R_2 | Default | d | 0.002 | |
LED_DRIVER_FDBK_R_3 | Default | d | 0.002 | |
LED_DRIVER_FLT1 | Default | d | 0.689 | |
LED_DRIVER_FLT2 | Default | d | 0.690 | |
LED_DRIVER_FLT3 | Default | d | 0.692 | |
LED_DRIVER_GATE1 | Default | d | 0.638 | |
LED_DRIVER_GATE1_R | Default | d | 0.638 | |
LED_DRIVER_GATE2 | Default | d | 0.637 | |
LED_DRIVER_GATE2_R | Default | d | 0.637 | |
LED_DRIVER_GATE3 | Default | d | 0.639 | |
LED_DRIVER_GATE3_R | Default | d | 0.639 | |
LED_DRIVER_OVP1 | Default | d | 0.687 | |
LED_DRIVER_OVP2 | Default | d | 0.688 | |
LED_DRIVER_OVP3 | Default | d | 0.688 | |
LED_DRVR_CS_RC_1 | Default | d | 0.000 | |
LED_DRVR_CS_RC_2 | Default | d | 0.000 | |
LED_DRVR_CS_RC_3 | Default | d | 0.000 | |
LED_DRVR_DRAIN_1 | Default | d | 0.508 | |
LED_DRVR_DRAIN_2 | Default | d | 0.508 | |
LED_DRVR_DRAIN_3 | Default | d | 0.508 | |
LED_FLT_R_1 | Default | d | 0.689 | |
LED_FLT_R_2 | Default | d | 0.712 | |
LED_FLT_R_3 | Default | d | 0.712 | |
MAX97220_BIAS | Default | d | 2.070 | |
MAX97220_C1N | Default | d | 0.870 | |
MAX97220_C1P | Default | d | 0.538 | |
MAX97220_INL_N | Default | d | OL | |
MAX97220_INL_P | Default | d | OL | |
MAX97220_INR_N | Default | d | OL | |
MAX97220_INR_P | Default | d | OL | |
MAX97220_OUTL | Default | d | 1.350 | |
MAX97220_OUTR | Default | d | 1.362 | |
MAX97220_PVSS | Default | d | 1.465 | |
OVP_OREF | Default | d | 0.675 | |
OVP_OUT1 | Default | d | 0.742 | |
OVP_OUT1_R | Default | d | 0.742 | |
OVP_OUT2 | Default | d | 0.739 | |
OVP_OUT2_R | Default | d | 0.739 | |
OVP_OUT3 | Default | d | 0.740 | |
OVP_OUT3_R | Default | d | 0.741 | |
P3V3ENET_SS | Default | d | OL | |
P3V42G3H_SW | Default | d | 0.316 | |
PCH_CLK32K_RTCX1 | Default | d | 0.762 | |
PCH_CLK32K_RTCX2_R | Default | d | 0.755 | |
PCIE_WAKE_L | Default | d | 0.514 | |
PGOOD_12V_S0_G1 | Default | d | 0.668 | |
PGOOD_12V_S0_G2 | Default | d | 0.611 | |
PGOOD_P12V_S0_R | Default | d | 0.605 | |
PLT_RST_BUF_L | Default | d | 0.699 | |
PM_EN_ENET_L | Default | d | 0.578 | |
PM_EN_FET_P12V_S0 | Default | d | 0.591 | |
PM_EN_FET_P12V_S0_R | Default | d | 0.558 | |
PM_EN_REG_P3V3_S5 | Default | d | 0.527 | |
PM_PCH_PWROK | Default | d | 0.546 | |
PM_PGOOD_FET_P12V_S0 | Default | d | 0.608 | |
PP12V_ACDC | Default | d | 0.557 | |
PP12V_G3H | Default | d | 0.557 | |
PP12V_G3H_P3V42 | Default | d | 0.557 | |
PP12V_LCD | Default | d | 0.434 | |
PP12V_S0 | Default | d | 0.434 | |
PP12V_S0_BLC | Default | d | 0.499 | |
PP12V_S0_BLC_F | Default | d | 0.499 | |
PP12V_S0_BLC_VIN2 | Default | d | 0.497 | |
PP12V_S0_BLC_VINP | Default | d | 0.507 | |
PP12V_S0_CPUVCC_FLT | Default | d | 0.435 | |
PP12V_S0_FAN_0_FILT | Default | d | 0.434 | |
PP12V_S0_FBVDDQ | Default | d | 0.435 | |
PP12V_S0_GPUCORE | Default | d | 0.434 | |
PP12V_S0_GPUCORE_FLT | Default | d | 0.434 | |
PP12V_S0_GPUCORE_FLT | Default | r | 0.000R | |
PP12V_S0_HDD | Default | d | 0.434 | |
PP12V_S5 | Default | d | 0.524 | |
PP1V05_S0 | Default | d | 0.037 | |
PP1V05_S0 | Default | r | 36.400R | |
PP1V05_TBTCIO | Default | d | 0.157 | |
PP1V05_TBTLC | Default | d | 0.132 | |
PP1V2_ENET_INTREG | Default | d | 0.290 | |
PP1V2_ENET_PHY_PCIEPLL | Default | d | 0.290 | |
PP1V2_G3H_SMC_VDDC | Default | d | 0.514 | |
PP1V5_S0 | Default | d | 0.121 | |
PP1V5_S0_PCH | Default | d | 0.121 | |
PP1V8_S4_CAMERA | Default | d | 0.434 | |
PP1V8_S4_CAMERA_F | Default | d | 0.435 | |
PP3V3RHV_SW_TBTAPWR | Default | d | 0.565 | |
PP3V3RHV_SW_TBTBPWR | Default | d | 0.565 | |
PP3V3_DMIC_CONN | Default | d | 0.287 | |
PP3V3_ENET | Default | d | 0.359 | |
PP3V3_ENET_PHY_AVDDH | Default | d | 0.359 | |
PP3V3_S0 | Default | d | 0.290 | |
PP3V3_S0_SW_SD_PWR | Default | d | 0.558 | |
PP3V3_S4 | Default | d | 0.338 | |
PP3V3_S4_ALS_F | Default | d | 0.338 | |
PP3V3_S4_CAMFILT | Default | d | 0.338 | |
PP3V3_S5 | Default | d | 0.146 | |
PP3V3_TBTLC | Default | d | 0.418 | |
PP3V42_G3H | Default | d | 0.316 | |
PP4V5_AUDIO_ANALOG | Default | d | 0.498 | |
PP5V_AUDIO_HPAMP | Default | d | 0.359 | |
PP5V_S0 | Default | d | 0.353 | |
PP5V_S0_BLC_R | Default | d | 0.355 | |
PP5V_S0_HDD | Default | d | 0.597 | |
PP5V_S4 | Default | d | 0.155 | |
PP5V_S4_CAMERA_F | Default | d | 0.154 | |
PP5V_S4_EXTA_F | Default | d | 0.526 | |
PP5V_S4_EXTA_ILIM | Default | d | 0.526 | |
PP5V_S4_EXTB_F | Default | d | 0.526 | |
PP5V_S4_EXTB_ILIM | Default | d | 0.526 | |
PP5V_S4_EXTC_F | Default | d | 0.528 | |
PP5V_S4_EXTC_ILIM | Default | d | 0.528 | |
PP5V_S4_EXTD_F | Default | d | 0.527 | |
PP5V_S4_EXTD_ILIM | Default | d | 0.527 | |
PP5V_S5 | Default | d | 0.396 | |
PP8V_BLC | Default | d | 0.666 | |
PPCPUVCC_S0_CPU | Default | d | 0.001 | |
PPCPUVCC_S0_CPU | Default | r | 1.100R | |
PPDDRVTT_S0 | Default | d | 0.573 | |
PPFBVDDQ_S0_GPU | Default | d | 0.062 | |
PPFBVDDQ_S0_GPU | Default | r | 62.100R | |
PPGPUCORE_S0_SENSE_1 | Default | d | 0.012 | |
PPGPUCORE_S0_SENSE_2 | Default | d | 0.012 | |
PPGPUCORE_S0_SENSE_3 | Default | d | 0.012 | |
PPGPUCORE_S0_SENSE_3 | Default | r | 11.600R | |
PPGPUCORE_S0_SENSE_4 | Default | d | 0.012 | |
PPGPUCORE_S0_SENSE_4 | Default | r | 11.600R | |
PPHDD12_S0 | Default | d | 0.434 | |
PPHV_SW_TBTAPWR | Default | d | 0.565 | |
PPHV_SW_TBTBPWR | Default | d | 0.565 | |
PPSSD_S0 | Default | d | 0.290 | |
PPVBATT_G3_RTC | Default | d | OL | |
PPVCORE_S0_GPU | Default | d | 0.012 | |
PPVDDQ_S3 | Default | d | 0.327 | |
PPVDDQ_S3_DDR | Default | d | 0.327 | |
PRE_REG_OUT | Default | d | 0.508 | |
PWR_BTN_R | Default | d | 1.738 | |
REG_BOOT_FBVDDQ | Default | d | 0.565 | |
REG_BOOT_FBVDDQ_RC | Default | d | 0.565 | |
REG_LGATE_P5VS4 | Default | d | 0.457 | |
REG_PHASE_FBVDDQ | Default | d | 0.062 | |
REG_PHASE_GPUCORE_1 | Default | d | 0.012 | |
REG_PHASE_GPUCORE_1 | Default | r | 11.600R | |
REG_PHASE_GPUCORE_2 | Default | d | 0.012 | |
REG_PHASE_GPUCORE_2 | Default | r | 11.600R | |
REG_PHASE_GPUCORE_3 | Default | d | 0.012 | |
REG_PHASE_GPUCORE_4 | Default | d | 0.012 | |
REG_PHASE_P1V05S0_L | Default | d | 0.037 | |
REG_PHASE_P3V3S5 | Default | d | 0.146 | |
REG_PHASE_P5VS4 | Default | d | 0.155 | |
REG_PHASE_VDDQS3_L | Default | d | 0.327 | |
REG_PVCC_U7750 | Default | d | 0.355 | |
REG_UGATE_P5VS4 | Default | d | 0.595 | |
REG_VCC_U7000 | Default | d | 0.560 | |
REG_VCC_U7750 | Default | d | 0.363 | |
REG_VIN_U7600 | Default | d | 0.254 | |
SATA_HDD_D2R_C_N | Default | d | OL | |
SATA_HDD_D2R_C_P | Default | d | OL | |
SATA_HDD_R2D_C_N | Default | d | 0.345 | |
SATA_HDD_R2D_C_P | Default | d | 0.347 | |
SATA_HDD_R2D_N | Default | d | OL | |
SATA_HDD_R2D_P | Default | d | OL | |
SMC_ACDC_ID_R | Default | d | 1.600 | |
SMC_EXTAL | Default | d | 0.777 | |
SMC_FAN_0_CTL | Default | d | 0.752 | |
SMC_ONOFF_L | Default | d | 0.755 | |
SMC_OOB1_D2R_L | Default | d | 0.657 | |
SMC_OOB1_D2R_R | Default | d | 0.704 | |
SMC_OOB1_RX_CN | Default | d | 0.604 | |
SMC_OOB1_RX_FILT | Default | d | 0.602 | |
SMC_XTAL_R | Default | d | 0.766 | |
SNS_ACDC_N | Default | d | 0.757 | |
SNS_ACDC_P | Default | d | 0.757 | |
SNS_P12VG3H_N | Default | d | 0.557 | |
SNS_P12VG3H_P | Default | d | 0.557 | |
SNS_P12VS0_GPUCORE_N | Default | d | 0.434 | |
SNS_P12VS0_GPUCORE_P | Default | d | 0.434 | |
SNS_P12VS0_HDD_N | Default | d | 0.434 | |
SNS_P12VS0_HDD_P | Default | d | 0.434 | |
SNS_P1V5S0_N | Default | d | 0.121 | |
SNS_P1V5S0_P | Default | d | 0.121 | |
SNS_SSD_N | Default | d | 0.290 | |
SNS_SSD_P | Default | d | 0.290 | |
SPIROM_USE_MLB | Default | d | 0.527 | |
SPI_MLB_CLK | Default | d | 0.612 | |
SPI_MLB_CS_L | Default | d | 0.599 | |
SPI_MLB_MISO | Default | d | 0.516 | |
SPI_MLB_MOSI | Default | d | 0.527 | |
SPI_WP_L | Default | d | 0.640 | |
TBTPOCRST_CT | Default | d | 0.639 | |
TBTPOCRST_MR_L | Default | d | 0.612 | |
TBTROM_HOLD_L | Default | d | 0.738 | |
TBTROM_WP_L | Default | d | 0.738 | |
TBT_CLKREQ_ISOL_L | Default | d | 0.468 | |
TBT_DDC_XBAR_EN_L | Default | d | 0.524 | |
TBT_EN_LC_ISOL | Default | d | 0.466 | |
TBT_EN_LC_PWR | Default | d | 0.558 | |
TBT_EN_LC_RC1V05 | Default | d | 0.466 | |
TBT_MONOBSN | Default | d | 0.185 | |
TBT_MONOBSP | Default | d | 0.184 | |
TBT_SPI_CS_L | Default | d | 0.670 | |
TBT_SPI_MISO | Default | d | 0.617 | |
TBT_TEST_EN | Default | d | 0.000 | |
TBT_TEST_PWR_GOOD | Default | d | 0.001 | |
TBT_TMU_CLK_OUT | Default | d | 0.559 | |
TSNS_2_1_N | Default | d | 0.771 | |
TSNS_2_1_P | Default | d | 0.777 | |
TSNS_2_2_N | Default | d | 0.773 | |
TSNS_2_2_P | Default | d | 0.763 | |
TSNS_2_3_N | Default | d | 0.762 | |
TSNS_2_3_P | Default | d | 0.772 | |
UNCONNECTED_1 | Default | d | OL | |
UNCONNECTED_2 | Default | d | OL | |
UNCONNECTED_413 | Default | d | 0.744 | |
USB_ILIM1_R | Default | d | OL | |
USB_ILIM2_R | Default | d | OL | |
UVP_IN_1 | Default | d | 0.736 | |
UVP_IN_1_REF | Default | d | 0.739 | |
UVP_IN_2 | Default | d | 0.738 | |
UVP_IN_3 | Default | d | 0.734 | |
UVP_IN_4 | Default | d | 0.739 | |
UVP_REF | Default | d | 0.696 | |
VIDEO_ON | Default | d | 0.810 | |
VIDEO_ON_J17_L | Default | d | 0.751 | |
VIDEO_ON_L | Default | d | 0.757 | |
VIDEO_ON_L_DLY | Default | d | 0.794 |
Component | Type | Value |
---|---|---|
C7185 | r | 2.5V |
C7185 | v | 270UF |