Netname | Condition | Type | Value | Comment |
---|---|---|---|---|
BKL_EN | Default | d | 0.574 | |
BKL_FAULT | Default | d | - | |
BKL_FLTR | Default | d | 0.572 | |
BKL_FSET | Default | d | 0.574 | |
BKL_ISEN1 | Default | d | 0.646 | |
BKL_ISEN2 | Default | d | 0.646 | |
BKL_ISEN3 | Default | d | 0.646 | |
BKL_ISEN4 | Default | d | 0.643 | |
BKL_ISEN5 | Default | d | 0.643 | |
BKL_ISEN6 | Default | d | 0.644 | |
BKL_ISET | Default | d | 0.573 | |
BKL_PWM | Default | d | 0.547 | |
BKL_SCL | Default | d | 0.495 | |
BKL_SDA | Default | d | 0.496 | |
BKL_VSYNC_R | Default | d | 0.572 | |
CAM_PWR_SEL | Default | d | 0.824 | |
CAM_SENSOR_WAKE_L | Default | d | 0.818 | |
CAM_SENSOR_WAKE_L_CONN | Default | d | 0.002 | |
CAM_TEST_OUT | Default | d | 0.823 | |
CHGR_AGATE_DIV | Default | v | 6.000 | |
CHGR_CSI_R_N | Default | d | 0.620 | |
CHGR_CSI_R_P | Default | d | 0.620 | |
CHGR_PHASE | Default | d | 0.113 | |
CHGR_PHASE | Default | v | 8.600 | |
CHGR_SGATE_DIV | Default | v | 5.600 | |
CPUVR_PHASE1 | Default | d | 0.006 | |
CPUVR_PHASE2 | Default | d | 0.006 | |
EDP_BKLT_PWM | Default | d | 0.554 | |
FAN_RT_PWM | Default | d | 0.718 | |
FAN_RT_TACH | Default | d | 0.647 | |
FAN_RT_TACH | Default | v | 1.600 | |
GND | Default | d | 0.000 | |
GND_BKL_SGND | Default | d | - | |
I2C_CAM_SCK | Default | d | 0.423 | |
ISNS_AIRPORT_N | Default | d | 0.518 | |
ISNS_AIRPORT_P | Default | d | 0.518 | |
KBDLED_SW | Default | d | 0.414 | |
LCDBKLT_BOOST | Default | d | 0.390 | |
LCDBKLT_EN_L | Default | d | 0.923 | |
LED_RETURN_1 | Default | d | 0.646 | |
LED_RETURN_2 | Default | d | 0.646 | |
LED_RETURN_3 | Default | d | 0.647 | |
LED_RETURN_4 | Default | d | 0.643 | |
LED_RETURN_5 | Default | d | 0.643 | |
LED_RETURN_6 | Default | d | 0.645 | |
MEM_CAM_ZQ_S2 | Default | d | 0.292 | |
MIPI_CLK_CONN_N | Default | d | 0.391 | |
MIPI_CLK_CONN_P | Default | d | 0.391 | |
MIPI_CLK_N | Default | d | 0.389 | |
MIPI_CLK_P | Default | d | 0.389 | |
MIPI_DATA_CONN_N | Default | d | 0.390 | |
MIPI_DATA_CONN_P | Default | d | 0.390 | |
MIPI_DATA_N | Default | d | 0.388 | |
MIPI_DATA_P | Default | d | 0.388 | |
P1V05S0_LL | Default | d | 0.072 | |
P1V2_CAM_SRVLXC_PHASE | Default | d | 0.272 | |
P1V35_CAM_SRVLXD_PHASE | Default | d | 0.215 | |
P1V8S3_SW | Default | d | 0.344 | |
P3V3_S5_REG_L | Default | d | 0.330 | |
P3V42G3H_SW | Default | d | 0.295 | |
P5VS0_FET_RAMP | Default | d | 0.720 | |
P5V_S4RS3_REG_L | Default | d | 0.390 | |
PCIE_CAMERA_D2R_C_N | Default | d | 0.391 | |
PCIE_CAMERA_D2R_C_P | Default | d | 0.390 | |
PCIE_CAMERA_R2D_N | Default | d | 0.437 | |
PCIE_CAMERA_R2D_P | Default | d | 0.437 | |
PDDR_S3_REG_L | Default | d | 0.202 | |
PP18V5_DCIN_ISOL_R | Default | d | OL | |
PP1V05_S0_REG_R | Default | d | 0.072 | |
PP1V2_CAM | Default | d | 0.272 | |
PP1V2_CAM_PCIE_PVDD_FLT | Default | d | 0.348 | |
PP1V2_CAM_PCIE_VDD_FLT | Default | d | 0.348 | |
PP1V2_CAM_XTALPCIEVDD | Default | d | 0.319 | |
PP1V2_S3 | Default | d | 0.202 | |
PP1V35_CAM | Default | d | 0.265 | |
PP1V35_DDR_CLK | Default | d | 0.265 | |
PP1V8_CAM | Default | d | 0.473 | |
PP1V8_S3_REG_R | Default | d | 0.344 | |
PP3V3_S0 | Default | d | 0.363 | |
PP3V3_S0 | Default | v | 3.300 | |
PP3V3_S0SW_LCD | Default | d | 0.537 | |
PP3V3_S0SW_LCD_UF | Default | d | 0.537 | |
PP3V3_S0SW_SSD | Default | d | 0.480 | |
PP3V3_S0SW_SSD_FLT | Default | d | 0.480 | |
PP3V3_S0_FAN | Default | d | 0.350 | |
PP3V3_S0_FAN | Default | v | 3.300 | |
PP3V3_S3RS0_CAMERA | Default | d | 0.355 | |
PP3V3_S3RS0_CAMERA | Default | v | 3.300 | |
PP3V3_S3RS0_CAMERA_R | Default | v | 3.300 | |
PP3V3_S4SW_SNS | Default | v | 3.300 | |
PP3V3_S5_REG_R | Default | d | 0.330 | |
PP3V3_WLAN | Default | d | 0.518 | |
PP3V3_WLAN_R | Default | d | 0.518 | |
PP3V42_G3H | Default | d | 0.295 | |
PP5V_S0 | Default | d | 0.440 | |
PP5V_S0 | Default | v | 5.100 | |
PP5V_S3RS0_ALSCAM_F | Default | d | 0.440 | |
PP5V_S4RS3 | Default | d | 0.436 | |
PPBUS_G3H | Default | d | 0.114 | |
PPBUS_G3H_R | Default | d | 0.114 | |
PPBUS_S5_HS_COMPUTING_ISNS | Default | d | 0.111 | |
PPDCIN_G3H | Default | d | OL | |
PPDCIN_G3H | Default | v | 14.800 | |
PPDCIN_G3H_CHGR | Default | d | 0.620 | |
PPDCIN_G3H_CHGR | Default | v | 14.800 | |
PPDCIN_G3H_INRUSH | Default | d | 0.620 | |
PPDCIN_G3H_INRUSH | Default | v | 14.800 | |
PPDCIN_G3H_ISOL | Default | d | OL | |
PPDDR_S3_REG_R | Default | d | 0.202 | |
PPHV_S0SW_LCDBKLT | Default | d | 0.538 | |
PPVBAT_G3H_CHGR_REG | Default | d | 0.111 | |
PPVBAT_G3H_CHGR_REG | Default | v | 8.600 | |
PPVCC_S0_CPU_PH1 | Default | d | 0.006 | |
PPVCC_S0_CPU_PH2 | Default | d | 0.006 | |
PPVIN_G3H_P3V42G3H | Default | d | 0.306 | |
PPVIN_S0SW_LCDBKLT | Default | d | 0.390 | |
PPVIN_S0SW_LCDBKLTFET | Default | d | 0.131 | |
PPVIN_S4SW_TBTBST_FET | Default | d | 0.468 | |
PPVMEMIO_S0_CPU | Default | d | 0.202 | |
PPVOUT_SW_LCDBKLT_FB | Default | d | - | |
SMBUS_PCH_CLK | Default | d | 0.495 | |
SMBUS_PCH_DATA | Default | d | 0.496 | |
SMBUS_SMC_1_S0_SCL | Default | d | 0.547 | |
SMBUS_SMC_1_S0_SDA | Default | d | 0.517 | |
SMC_FAN_0_CTL | Default | d | 0.737 | |
SMC_FAN_0_TACH | Default | d | 0.745 | |
SMC_FAN_0_TACH | Default | v | 1.600 | |
TBTBST_BOOST | Default | d | 0.468 | |
TP_CAM_PLL_BYPASS | Default | d | 0.698 | |
UNCONNECTED_196 | Default | d | OL | |
UNCONNECTED_197 | Default | d | OL | |
UNCONNECTED_198 | Default | d | OL | |
UNCONNECTED_199 | Default | d | OL |
Component | Type | Value |
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