Netname | Condition | Type | Value | Comment |
---|---|---|---|---|
ALL_SYS_PWRGD | Default | d | 0.465 | |
ANI01_VREF | Default | d | 0.409 | |
ANI23_VREF | Default | d | 0.409 | |
AP_CLKREQ_L | Default | d | 0.489 | |
AP_DEV_WAKE | Default | d | 0.554 | |
AP_PCIE_WAKE_L | Default | d | 0.510 | |
AP_RESET_L | Default | d | 0.555 | |
AP_S0IX_WAKE_L | Default | d | 0.646 | |
AP_S0IX_WAKE_SEL | Default | d | 0.665 | |
AUD_LRCLK_A | Default | d | 0.524 | |
AUD_LRCLK_LEFT1 | Default | d | 0.530 | |
AUD_LRCLK_LEFT2 | Default | d | 0.530 | |
AUD_PWR_EN | Default | d | 0.770 | |
AUD_SCLKA_LEFT1 | Default | d | 0.571 | |
AUD_SCLKA_LEFT2 | Default | d | 0.571 | |
AUD_SCLK_A | Default | d | 0.562 | |
AUD_SDOUT_A | Default | d | 0.525 | |
AUD_SDOUT_LEFT1 | Default | d | 0.530 | |
AUD_SDOUT_LEFT2 | Default | d | 0.530 | |
AUD_SPKRAMP_MODE | Default | d | 0.530 | |
AUD_SPKRAMP_MODE_LEFT1 | Default | d | 0.541 | |
AUD_SPKRAMP_MODE_LEFT2 | Default | d | 0.541 | |
BKLT_EN_R | Default | d | 0.548 | |
BKLT_SCL_R | Default | d | 0.542 | |
BKLT_SD | Default | d | 0.596 | |
BKLT_SDA_R | Default | d | 0.542 | |
BKLT_SENSE_OUT | Default | d | 0.731 | |
BKL_FB | Default | d | 0.365 | |
BTROM_HOLD_L | Default | d | 0.725 | |
BTROM_WP_L | Default | d | 0.715 | |
BT_SPI_CLK | Default | d | 0.591 | |
BT_SPI_CS_L | Default | d | 0.681 | |
BT_SPI_MISO | Default | d | 0.706 | |
BT_SPI_MOSI | Default | d | 0.697 | |
BT_UART_RTS_L | Default | d | 0.431 | |
CAMERA_PWR_EN | Default | d | 0.584 | |
CAMERA_RESET_L | Default | d | 0.526 | |
CAM_TEST_MODE | Default | d | 0.768 | |
CHGR_ACIN | Default | d | 0.62 | |
CHGR_AMON | Default | d | 0.627 | |
CHGR_BGATE | Default | d | 0.66 | |
CHGR_BMON | Default | d | 0.628 | |
CHGR_BOOST_DH | Default | d | 0.716 | |
CHGR_BOOST_DL | Default | d | 0.464 | |
CHGR_BOOST_SW | Default | d | 0.45 | |
CHGR_BOOT1 | Default | d | 0.58 | |
CHGR_BOOT1_RC | Default | d | 0.58 | |
CHGR_BOOT2 | Default | d | 0.59 | |
CHGR_BOOT2_RC | Default | d | 0.59 | |
CHGR_BUCK_DH | Default | d | 0.932 | |
CHGR_BUCK_DL | Default | d | 0.463 | |
CHGR_COMP | Default | d | 0.61 | |
CHGR_CSI_N | Default | d | 0.56 | |
CHGR_CSI_N | Default | r | 2.500R | |
CHGR_CSI_P | Default | d | 0.56 | |
CHGR_CSI_P | Default | r | 2.500R | |
CHGR_CSI_R_N | Default | d | 0.560 | |
CHGR_CSI_R_P | Default | d | 0.560 | |
CHGR_CSO_N | Default | d | 0.357 | |
CHGR_CSO_N | Default | r | 2.300R | |
CHGR_CSO_P | Default | d | 0.357 | |
CHGR_CSO_P | Default | r | 2.300R | |
CHGR_CSO_R_N | Default | d | 0.360 | |
CHGR_CSO_R_P | Default | d | 0.360 | |
CHGR_LDO_P3V0 | Default | d | 0.61 | |
CHGR_LDO_P5V0 | Default | d | 0.42 | |
CHGR_LDO_VDDA | Default | d | 0.43 | |
CHGR_LDO_VDDP | Default | d | 0.43 | |
CHGR_PHASE | Default | d | 0.470 | |
CHGR_PHASE2 | Default | d | 0.470 | |
CPUCORE_BOOT1 | Default | d | 0.601 | |
CPUCORE_BOOT1_RC | Default | d | 0.016 | |
CPUCORE_BOOT2 | Default | d | 0.602 | |
CPUCORE_BOOT2_RC | Default | d | 0.016 | |
CPUCORE_FB | Default | d | 0.424 | |
CPUCORE_FCCM | Default | d | 0.605 | |
CPUCORE_GL1 | Default | d | 0.432 | |
CPUCORE_GL2 | Default | d | 0.433 | |
CPUCORE_IMON | Default | d | 0.630 | |
CPUCORE_ISEN1 | Default | d | 0.633 | |
CPUCORE_ISEN2 | Default | d | 0.633 | |
CPUCORE_ISNS1_N | Default | d | 0.019 | |
CPUCORE_ISNS1_P | Default | d | 0.019 | |
CPUCORE_ISNS2_N | Default | d | 0.190 | |
CPUCORE_ISNS2_P | Default | d | 0.019 | |
CPUCORE_ISUMN_R | Default | d | 0.269 | |
CPUCORE_ISUMP | Default | d | 0.498 | |
CPUCORE_PHASE1 | Default | d | 0.019 | |
CPUCORE_PHASE1 | Default | r | 15.600R | |
CPUCORE_PHASE2 | Default | d | 0.019 | |
CPUCORE_PHASE2 | Default | r | 15.600R | |
CPUCORE_PWM1 | Default | d | 0.613 | |
CPUCORE_PWM2 | Default | d | 0.613 | |
CPUGT_BOOT1 | Default | d | 0.602 | |
CPUGT_BOOT1_RC | Default | d | 0.012 | |
CPUGT_BOOT2 | Default | d | 0.601 | |
CPUGT_BOOT2_RC | Default | d | 0.012 | |
CPUGT_COMP | Default | d | 0.630 | |
CPUGT_FB | Default | d | 0.606 | |
CPUGT_FCCM | Default | d | 0.606 | |
CPUGT_GL2 | Default | d | 0.462 | |
CPUGT_IMON | Default | d | 0.631 | |
CPUGT_ISEN1 | Default | d | 0.632 | |
CPUGT_ISEN2 | Default | d | 0.631 | |
CPUGT_ISNS1_N | Default | d | 0.013 | |
CPUGT_ISNS1_P | Default | d | 0.013 | |
CPUGT_ISNS2_N | Default | d | 0.013 | |
CPUGT_ISNS2_P | Default | d | 0.013 | |
CPUGT_ISUMN_R | Default | d | 0.265 | |
CPUGT_ISUMP | Default | d | 0.488 | |
CPUGT_NTC | Default | d | 0.632 | |
CPUGT_PHASE1 | Default | d | 0.013 | |
CPUGT_PHASE1 | Default | r | 13.200R | |
CPUGT_PHASE2 | Default | d | 0.013 | |
CPUGT_PHASE2 | Default | r | 13.200R | |
CPUGT_PWM1 | Default | d | 0.612 | |
CPUGT_PWM2 | Default | d | 0.611 | |
CPUGT_RTN | Default | d | 0.001 | |
CPUSA_BOOT | Default | d | 0.602 | |
CPUSA_COMP | Default | d | 0.630 | |
CPUSA_FB | Default | d | 0.587 | |
CPUSA_FCCM | Default | d | 0.615 | |
CPUSA_IMON | Default | d | 0.631 | |
CPUSA_ISNS_N | Default | d | 0.040 | |
CPUSA_ISNS_P | Default | d | 0.040 | |
CPUSA_ISUMN_R | Default | d | 0.297 | |
CPUSA_ISUMP | Default | d | 0.581 | |
CPUSA_LGATE | Default | d | 0.430 | |
CPUSA_PHASE | Default | d | 0.039 | |
CPUSA_PWM | Default | d | 0.609 | |
CPUSA_SW_LL | Default | d | 0.040 | |
CPUSA_SW_LL | Default | r | 26.400R | |
CPUSA_UGATE | Default | d | 0.570 | |
CPUTHMSNS_D2_N | Default | d | 0.656 | |
CPUTHMSNS_D2_P | Default | d | 0.655 | |
CPUVR_PROG1 | Default | d | 0.628 | |
CPUVR_PROG2 | Default | d | 0.623 | |
CPUVR_PROG3 | Default | d | 0.605 | |
CPUVR_PROG4 | Default | d | 0.632 | |
CPUVR_PROG5 | Default | d | 0.631 | |
CPUVR_VIDSCLK | Default | d | 0.342 | |
CPUVR_VIDSOUT | Default | d | 0.309 | |
CPU_CATERR_L | Default | d | 0.295 | |
CPU_CFG<4> | Default | d | 0.316 | |
CPU_CFG_RCOMP | Default | d | 0.052 | |
CPU_PECI_R | Default | d | 0.315 | |
CPU_PROCHOT_L | Default | d | 0.488 | |
CPU_VCCGTSENSE_N | Default | d | 0.004 | |
CPU_VCCGTSENSE_P | Default | d | 0.014 | |
CPU_VCCSASENSE_P | Default | d | 0.040 | |
CPU_VCCSENSE_P | Default | d | 0.018 | |
CPU_VCCST_PWRGD | Default | d | 0.443 | |
CPU_VIDALERT_R_L | Default | d | 0.544 | |
CPU_VIDSCLK_R | Default | d | 0.293 | |
CPU_VIDSOUT_R | Default | d | 0.299 | |
CPU_VR_PROCHOT_L | Default | d | 0.526 | |
CPU_VR_READY | Default | d | 0.515 | |
DCINVSENS_EN_L | Default | d | 0.508 | |
DCIN_S5_VSENSE | Default | d | OL | |
DP_INT_AUX_N | Default | d | OL | |
DP_INT_AUX_P | Default | d | OL | |
DP_INT_HPD | Default | d | 0.770 | |
DP_INT_ML_N<0> | Default | d | OL | |
DP_INT_ML_N<1> | Default | d | OL | |
DP_INT_ML_N<2> | Default | d | OL | |
DP_INT_ML_N<3> | Default | d | OL | |
DP_INT_ML_P<0> | Default | d | OL | |
DP_INT_ML_P<1> | Default | d | OL | |
DP_INT_ML_P<2> | Default | d | OL | |
DP_INT_ML_P<3> | Default | d | OL | |
DP_XA_AUXCH_N | Default | d | 0.792 | |
DP_XA_AUXCH_P | Default | d | 0.792 | |
DP_XA_HPD | Default | d | 0.471 | |
DP_XA_ML_N<0> | Default | d | OL | |
DP_XA_ML_N<1> | Default | d | OL | |
DP_XA_ML_N<2> | Default | d | OL | |
DP_XA_ML_N<3> | Default | d | OL | |
DP_XA_ML_P<0> | Default | d | OL | |
DP_XA_ML_P<1> | Default | d | OL | |
DP_XA_ML_P<2> | Default | d | OL | |
DP_XA_ML_P<3> | Default | d | OL | |
EDP_BKLT_EN | Default | d | 0.549 | |
EDP_BKLT_PWM | Default | d | 0.762 | |
EDP_PANEL_PWR | Default | d | 0.779 | |
HDA_BIT_CLK | Default | d | 0.791 | |
HDA_RST_L | Default | d | 0.791 | |
HDA_SDIN0 | Default | d | 0.771 | |
HDA_SDOUT | Default | d | 0.791 | |
HDA_SYNC | Default | d | 0.791 | |
HIPWR_EN | Default | d | 0.637 | |
I2C_BKLT_SCL | Default | d | 0.512 | |
I2C_BKLT_SDA | Default | d | 0.546 | |
I2C_CAM_SCK | Default | d | 0.736 | |
I2C_CAM_SDA | Default | d | 0.735 | |
I2C_UPC_SCL | Default | d | 0.730 | |
I2C_UPC_SDA | Default | d | 0.726 | |
I2C_UPC_XA_DBG_CTL_SCL | Default | d | 0.653 | |
I2C_UPC_XA_DBG_CTL_SDA | Default | d | 0.753 | |
INLET_THMSNS_D1_N | Default | d | 0.656 | |
INLET_THMSNS_D1_P | Default | d | 0.657 | |
ISNS_HS_COMPUTING_IOUT | Default | d | 0.705 | |
ISNS_HS_COMPUTING_N | Default | d | 0.360 | |
ISNS_HS_COMPUTING_P | Default | d | 0.360 | |
ISNS_HS_GAIN_N | Default | d | 0.369 | |
ISNS_HS_GAIN_OUT | Default | d | OL | |
JTAG_WLAN_SEL | Default | d | 0.780 | |
JTAG_WLAN_TDI | Default | d | 0.784 | |
LCDBKLT_EN_L | Default | d | OL | |
LCD_IRQ_L | Default | d | 0.770 | |
LCD_PWR_SLEW | Default | d | 0.625 | |
LPC_PWRDWN_L | Default | d | 0.574 | |
LPC_SERIRQ | Default | d | 0.565 | |
L_AMP1_GAIN | Default | d | 0.346 | |
L_AMP2_GAIN | Default | d | 0.001 | |
MEM_A_CAA<0> | Default | d | 0.285 | |
MEM_A_CLK_N<0> | Default | d | 0.300 | |
MEM_A_CLK_P<0> | Default | d | 0.302 | |
MEM_A_CS_L<0> | Default | d | 0.284 | |
MEM_A_DQS_N<1> | Default | d | 0.294 | |
MEM_A_DQS_P<1> | Default | d | 0.295 | |
MEM_CAM_A<8> | Default | d | 0.441 | |
MEM_CAM_CS_L | Default | d | 0.440 | |
MIPI_CLK_CONN_N | Default | d | 0.407 | |
MIPI_CLK_CONN_P | Default | d | 0.409 | |
MIPI_CLK_N | Default | d | 0.405 | |
MIPI_DATA_CONN_N | Default | d | 0.411 | |
MIPI_DATA_CONN_P | Default | d | 0.412 | |
MIPI_DATA_N | Default | d | 0.407 | |
MIPI_DATA_P | Default | d | 0.413 | |
MLB_RAMCFG0 | Default | d | 0.786 | |
NAND_OVERTMP_ALERT_L | Default | d | 0.575 | |
P0V9_FIXED_SW | Default | d | 0.290 | |
P0V9_REG_SW0 | Default | d | 0.225 | |
P0V9_REG_SW1 | Default | d | 0.225 | |
P1V2S5SW_FB | Default | d | 0.775 | |
P1V2S5SW_HSMUX_EN | Default | d | 0.355 | |
P1V2S5SW_HSMUX_EN_R | Default | d | 0.762 | |
P1V2S5SW_PGOOD | Default | d | 0.768 | |
P1V2S5SW_SW | Default | d | 0.585 | |
P1V2_CAM_SRVLXC_PHASE | Default | d | 0.300 | |
P1V2_DRVH | Default | d | 0.760 | |
P1V2_DRVL | Default | d | 0.470 | |
P1V2_HOT_SW | Default | d | 0.323 | |
P1V2_SW | Default | d | 0.150 | |
P1V2_SW_LL | Default | d | 0.235 | |
P1V35_CAM_SRVLXD_PHASE | Default | d | 0.260 | |
P1V8S3_EN | Default | d | 0.495 | |
P1V8SUS_PGOOD | Default | d | 0.451 | |
P1V8_HOT_SW | Default | d | 0.371 | |
P1VS0_RAMP | Default | d | 0.723 | |
P1VS3_RAMP | Default | d | 0.359 | |
P1VSUS_SW_LL | Default | d | 0.235 | |
P1VSUS_SW_LL | Default | r | 104.600R | |
P2V7NAND_AGND | Default | d | 0.000 | |
P2V7NAND_DRVH | Default | d | 0.834 | |
P2V7NAND_DRVH_R | Default | d | 0.839 | |
P2V7NAND_DRVL | Default | d | 0.450 | |
P2V7NAND_LL | Default | d | 0.373 | |
P2V7NAND_N | Default | d | 0.375 | |
P2V7NAND_OCSET | Default | d | 0.540 | |
P2V7NAND_P | Default | d | 0.375 | |
P2V7NAND_R | Default | d | 0.375 | |
P2V7NAND_RTN_DIV | Default | d | 0.539 | |
P2V7NAND_SENSE_DIV | Default | d | 0.540 | |
P2V7NAND_SET0 | Default | d | 0.545 | |
P2V7NAND_SET1 | Default | d | 0.545 | |
P2V7NAND_SREF | Default | d | 0.544 | |
P2V7NAND_SW_LL | Default | d | 0.375 | |
P3V3G3H_BOOT | Default | d | 0.584 | |
P3V3G3H_SW | Default | d | 0.35 | |
P3V3S5_COMP2 | Default | d | 0.743 | |
P3V3S5_CSN2 | Default | d | 0.382 | |
P3V3S5_CSP2 | Default | d | 1.414 | |
P3V3S5_DRVH | Default | d | 0.936 | |
P3V3S5_DRVL | Default | d | 0.559 | |
P3V3S5_EN | Default | d | 0.521 | |
P3V3S5_RF | Default | d | 0.597 | |
P3V3S5_SW2 | Default | d | 0.380 | |
P3V3S5_TG | Default | d | 0.933 | |
P3V3S5_VBST | Default | d | 0.566 | |
P3V3S5_VFB2 | Default | d | 0.585 | |
P3V3S5_VSW | Default | d | 0.390 | |
P3V3_G3H_REG_FB | Default | d | 0.374 | |
P5VP3V3_VREF2 | Default | d | 0.492 | |
P5VP3V3_VREG3 | Default | d | 0.565 | |
P5VS4_COMP1 | Default | d | 0.750 | |
P5VS4_CSN1 | Default | d | 0.351 | |
P5VS4_CSP1 | Default | d | 1.418 | |
P5VS4_DRVH | Default | d | 0.900 | |
P5VS4_DRVL | Default | d | 0.552 | |
P5VS4_EN | Default | d | 0.593 | |
P5VS4_PGOOD | Default | d | 0.451 | |
P5VS4_VBST | Default | d | 0.629 | |
P5VS4_VFB1 | Default | d | 0.593 | |
P5VS4_VSW | Default | d | 0.350 | |
PANEL_P5V_EN | Default | d | 0.577 | |
PBUSVSENS_EN_L | Default | d | 0.482 | |
PBUSVSENS_EN_L_DIV | Default | d | OL | |
PBUS_S0_VSENSE | Default | d | OL | |
PCH_BSSB_CLK | Default | d | 0.776 | |
PCH_BSSB_DATA | Default | d | 0.775 | |
PCH_BT_UART_CTS_L | Default | d | 0.498 | |
PCH_BT_UART_D2R | Default | d | 0.500 | |
PCH_BT_UART_R2D | Default | d | 0.429 | |
PCH_BT_UART_RTS_L | Default | d | 0.429 | |
PCH_HSIO_PWR_EN | Default | d | 0.573 | |
PCH_INTRUDER_L | Default | d | 0.815 | |
PCH_RTCRST_L | Default | d | 0.814 | |
PCH_SRTCRST_L | Default | d | 0.816 | |
PCH_STRP_TOPBLK_SWP_L | Default | d | 0.561 | |
PCH_UPC_XA_SWD_DATA | Default | d | 0.818 | |
PCIE_CAMERA_D2R_N | Default | d | 0.380 | |
PCIE_CAMERA_D2R_P | Default | d | 0.379 | |
PCIE_CLK100M_SSD_N | Default | d | 0.347 | |
PCIE_CLK100M_SSD_P | Default | d | 0.350 | |
PCIE_CLK100M_TEST_N | Default | d | 0.355 | |
PCIE_CLK100M_TEST_P | Default | d | 0.353 | |
PCIE_SSD_D2R_N<0> | Default | d | 0.381 | |
PCIE_SSD_D2R_P<0> | Default | d | 0.384 | |
PCIE_TEST_D2R_N | Default | d | 0.381 | |
PCIE_TEST_D2R_P | Default | d | 0.390 | |
PCIE_TEST_R2D_N | Default | d | 0.359 | |
PCIE_TEST_R2D_P | Default | d | 0.356 | |
PDCINVSENS_EN_L_DIV | Default | d | OL | |
PD_L | Default | d | 0.497 | |
PICCOLO_IUVD | Default | d | 0.558 | |
PICCOLO_NOR_CS_L | Default | d | 0.377 | |
PICCOLO_PID1 | Default | d | 0.556 | |
PICCOLO_POK1 | Default | d | 0.510 | |
PICCOLO_POK2 | Default | d | 0.568 | |
PICCOLO_VEN1 | Default | d | 0.519 | |
PICCOLO_VREF | Default | d | 0.559 | |
PLT_RST_L | Default | d | 0.377 | |
PMIC_SYS_PWROK | Default | d | 0.448 | |
PM_BATLOW_L | Default | d | 0.613 | |
PM_CLK32K_SUSCLK_R | Default | d | 0.576 | |
PM_DSW_PWRGD | Default | d | 0.747 | |
PM_PCH_PWROK | Default | d | 0.443 | |
PM_PWRBTN_L | Default | d | 0.715 | |
PM_RSMRST_L | Default | d | 0.462 | |
PM_SLP_S0S3_L | Default | d | 0.491 | |
PM_SLP_S3_L | Default | d | 0.461 | |
PM_SLP_S4_L | Default | d | 0.455 | |
PM_SLP_S5_L | Default | d | 0.543 | |
PM_SLP_SUS_L | Default | d | 0.454 | |
PM_SYSRST_L | Default | d | 0.555 | |
PM_THRMTRIP_L | Default | d | 0.336 | |
POWER_GATE_EN | Default | d | 0.633 | |
PP0V675_CAM_VREF | Default | d | 0.651 | |
PP0V675_MEM_CAM_VREFCA | Default | d | 0.528 | |
PP0V9_PLL_DVDD811 | Default | d | 0.220 | |
PP0V9_S0SW_SSD_CORE | Default | d | 0.225 | |
PP0V9_S0SW_SSD_FIXED | Default | d | 0.290 | |
PP1V1_UPC_XA_LDO_BMC | Default | d | 0.487 | |
PP1V2_CAM | Default | d | 0.300 | |
PP1V2_CAM_PCIE_PVDD_FLT | Default | d | 0.348 | |
PP1V2_CAM_PCIE_VDD_FLT | Default | d | 0.348 | |
PP1V2_CAM_XTALPCIEVDD | Default | d | 0.348 | |
PP1V2_S0SW | Default | d | 0.236 | |
PP1V2_S0SW_SSD_COLD | Default | d | 0.273 | |
PP1V2_S3 | Default | d | 0.235 | |
PP1V2_S4SW_SSD_HOT | Default | d | 0.325 | |
PP1V2_S5SW | Default | d | 0.585 | |
PP1V2_S5_SMC_VDDC | Default | d | 0.515 | |
PP1V35_CAM | Default | d | 0.260 | |
PP1V5_S0 | Default | d | 0.423 | |
PP1V8A_UPC_XA_LDO | Default | d | 0.496 | |
PP1V8D_UPC_XA_LDO | Default | d | 0.458 | |
PP1V8_CAM | Default | d | 0.502 | |
PP1V8_PLL_AVDD47 | Default | d | 0.314 | |
PP1V8_PLL_AVDD811 | Default | d | 0.314 | |
PP1V8_PLL_C_AVDD | Default | d | 0.314 | |
PP1V8_S0SW_SSD_COLD | Default | d | 0.290 | |
PP1V8_S3 | Default | d | 0.450 | |
PP1V8_S4SW_SSD_HOT | Default | d | 0.371 | |
PP1V8_SUS | Default | d | 0.420 | |
PP1V_S0SW | Default | d | 0.002 | |
PP1V_S0SW_PCHCLK | Default | d | 0.929 | |
PP1V_S3 | Default | d | 0.265 | |
PP1V_S5_PCH_DCPDSW | Default | d | 0.360 | |
PP1V_SUS | Default | d | 0.235 | |
PP1V_SUS | Default | r | 104.600R | |
PP1V_SUSRS0SW_PCHCLK | Default | d | 0.225 | |
PP1V_SUSSW_HSIO | Default | d | 0.226 | |
PP1V_SUSSW_PCH_VCCAMPHYPLL | Default | d | 0.226 | |
PP1V_SUS_PCH_VCCCLK4 | Default | d | 0.226 | |
PP1V_SUS_PCH_VCCCLK5 | Default | d | 0.226 | |
PP20V_USBC_XA_VBUS_F | Default | d | 0.572 | |
PP2V7_NAND_PVCC | Default | d | 0.441 | |
PP2V7_NAND_VCC | Default | d | 0.441 | |
PP2V9_SYSCLK | Default | d | 0.461 | |
PP3V0_S5_AVREF_SMC | Default | d | 0.592 | |
PP3V3R2V7_NAND_VCC | Default | d | 0.375 | |
PP3V3R3V0_AON | Default | d | 0.571 | |
PP3V3_G3H | Default | d | 0.35 | |
PP3V3_G3H_KBD_F | Default | d | 0.354 | |
PP3V3_PMICLDO | Default | d | 0.419 | |
PP3V3_S0 | Default | d | 0.360 | |
PP3V3_S0SW_LCD | Default | d | 0.612 | |
PP3V3_S0_CPUTHMSNS_R | Default | d | 0.404 | |
PP3V3_S4 | Default | d | 0.478 | |
PP3V3_S4_TPAD_F | Default | d | 0.416 | |
PP3V3_S5 | Default | d | 0.390 | |
PP3V3_S5_SMC_VDDA | Default | d | 0.360 | |
PP3V3_SUS | Default | d | 0.360 | |
PP3V3_UPC_VIN | Default | d | 0.569 | |
PP3V3_UPC_XA_LDO | Default | d | 0.512 | |
PP5V_G3H | Default | d | 0.453 | |
PP5V_S0 | Default | d | 0.466 | |
PP5V_S0SW_LCD | Default | d | 0.577 | |
PP5V_S0_ALSCAM_F | Default | d | 0.466 | |
PP5V_S0_CPUCORE1 | Default | d | 0.483 | |
PP5V_S0_CPUCORE2 | Default | d | 0.483 | |
PP5V_S0_CPUGT1 | Default | d | 0.484 | |
PP5V_S0_CPUGT2 | Default | d | 0.483 | |
PP5V_S0_KBD_F | Default | d | 0.466 | |
PP5V_S3_CPUVR_VCC | Default | d | 0.346 | |
PP5V_S4 | Default | d | 0.350 | |
PP5V_S4RS0 | Default | d | 0.483 | |
PP5V_S4_TPAD_F | Default | d | 0.164 | |
PP5V_S5 | Default | d | 0.441 | |
PPBUS_G3H | Default | d | 0.360 | |
PPBUS_G3H_TPAD_FLT | Default | d | 0.360 | |
PPBUS_S0_LCDBKLT_FUSED | Default | d | 0.360 | |
PPBUS_S0_LCDBKLT_PWR_SW | Default | d | 0.440 | |
PPBUS_S5_HS_COMPUTING_ISNS | Default | d | 0.360 | |
PPBUS_SW_BKL | Default | d | 0.440 | |
PPBUS_SW_LCDBKLT_PWR | Default | d | 0.356 | |
PPDCIN_G3H | Default | d | 0.560 | |
PPDCIN_G3H_CHGR | Default | d | 0.560 | |
PPLCDBKLT_VDDA | Default | d | 0.481 | |
PPLCDBKLT_VDDD | Default | d | 0.481 | |
PPVBAT_G3H_CHGR_R | Default | d | 0.360 | |
PPVBAT_G3H_CHGR_REG | Default | d | 0.360 | |
PPVBAT_G3H_CONN | Default | d | 0.689 | |
PPVBUS_LIO | Default | d | 0.572 | |
PPVCCG0_S0_CPU | Default | d | 0.020 | |
PPVCCG1_S0_CPU | Default | d | 0.021 | |
PPVCCGT_S0_CPU_PH1 | Default | d | 0.013 | |
PPVCCGT_S0_CPU_PH1 | Default | r | 13.200R | |
PPVCCGT_S0_CPU_PH2 | Default | d | 0.013 | |
PPVCCGT_S0_CPU_PH2 | Default | r | 13.200R | |
PPVCCIO_S0 | Default | d | 0.180 | |
PPVCCSA_DDR_S0 | Default | d | 0.047 | |
PPVCCSA_S0 | Default | d | 0.040 | |
PPVCCSA_S0_CPU | Default | d | 0.040 | |
PPVCCSA_S0_CPU | Default | r | 26.400R | |
PPVCORE_S0_CPU | Default | d | 0.019 | |
PPVCORE_S0_CPU_PH1 | Default | d | 0.019 | |
PPVCORE_S0_CPU_PH1 | Default | r | 15.600R | |
PPVCORE_S0_CPU_PH2 | Default | d | 0.019 | |
PPVCORE_S0_CPU_PH2 | Default | r | 15.600R | |
PPVCORE_S0_GT | Default | d | 0.013 | |
PPVCORE_SUS_PCH | Default | d | 0.250 | |
PPVCORE_SUS_PCH | Default | r | 66.700R | |
PPVIN_G3H_P3V3G3H | Default | d | 0.537 | |
PPVIN_S0_CPUVR_VIN | Default | d | 0.369 | |
PPVOUT_S0_LCDBKLT | Default | d | 0.635 | |
PPVREF_S3_MEM_VREFCA | Default | d | 0.727 | |
PPVREF_S3_MEM_VREFDQ_A | Default | d | 0.762 | |
PPVREF_S3_MEM_VREFDQ_B | Default | d | 0.769 | |
PPVRTC_G3H | Default | d | 0.440 | |
PVCCIO_DRVH | Default | d | 0.706 | |
PVCCIO_DRVL | Default | d | 0.471 | |
PVCCIO_EN | Default | d | 0.427 | |
PVCCIO_SW | Default | d | 0.175 | |
PVCCIO_SW_LL | Default | d | 0.180 | |
PVCCPCORE_EN | Default | d | 0.451 | |
PVCCPCORE_PGOOD | Default | d | 0.437 | |
PVCC_SW_LL | Default | d | 0.250 | |
PVCC_SW_LL | Default | r | 66.700R | |
PWM_KEYB | Default | d | 0.544 | |
RF_0_ANT | Default | d | OL | |
RF_1_ANT | Default | d | OL | |
S3X_COLD_BOOT_L | Default | d | 0.426 | |
S3X_DDR_CKE1 | Default | d | 0.476 | |
S3X_HOLD_RESET | Default | d | 0.424 | |
S3X_I2C_SCL | Default | d | 0.420 | |
S3X_I2C_SDA | Default | d | 0.417 | |
S3X_JTAG_SEL | Default | d | 0.425 | |
S3X_JTAG_TCK | Default | d | 0.427 | |
S3X_JTAG_TMS | Default | d | 0.425 | |
S3X_PERST_L | Default | d | 0.424 | |
S3X_PFN | Default | d | 0.425 | |
S3X_PMIC_CTRL0 | Default | d | 0.425 | |
S3X_PMIC_LOW_PWR | Default | d | 0.428 | |
S3X_RESET_L | Default | d | 0.426 | |
S3X_VDDR12_CK_PLANE | Default | d | 0.276 | |
S5_PWRGD | Default | d | 0.495 | |
S5_PWR_EN | Default | d | 0.654 | |
SMBUS_PCH_CLK | Default | d | 0.762 | |
SMBUS_PCH_DATA | Default | d | 0.759 | |
SMBUS_SMC_0_S0_SCL | Default | d | 0.723 | |
SMBUS_SMC_0_S0_SDA | Default | d | 0.723 | |
SMBUS_SMC_1_S0_SCL | Default | d | 0.552 | |
SMBUS_SMC_1_S0_SDA | Default | d | 0.553 | |
SMBUS_SMC_3_SCL | Default | d | 0.720 | |
SMBUS_SMC_3_SDA | Default | d | 0.720 | |
SMBUS_SMC_4_G3_SCL | Default | d | 0.713 | |
SMBUS_SMC_4_G3_SDA | Default | d | 0.713 | |
SMBUS_SMC_5_G3_SCL_R | Default | d | 0.430 | |
SMBUS_SMC_5_G3_SDA_R | Default | d | 0.430 | |
SMC_ACTUATOR_DISABLE_L | Default | d | 0.732 | |
SMC_BC_ACOK | Default | d | 0.61 | |
SMC_CBC_ON | Default | d | 0.617 | |
SMC_CHGR_INT_L | Default | d | 0.617 | |
SMC_CLK12M_EN | Default | d | 0.463 | |
SMC_DEBUGPRT_RX_L | Default | d | 0.728 | |
SMC_DEBUGPRT_TX_L | Default | d | 0.727 | |
SMC_DEV_SUPPLY_L | Default | d | 0.749 | |
SMC_LID | Default | d | 0.752 | |
SMC_LSOC_RST | Default | d | 0.637 | |
SMC_ONOFF_L | Default | d | 0.747 | |
SMC_OOB1_R2D_L | Default | d | 0.554 | |
SMC_PCH_SUSACK_L | Default | d | 0.571 | |
SMC_PCH_SUSWARN_L | Default | d | 0.573 | |
SMC_PME_S4_WAKE_L | Default | d | 0.732 | |
SMC_PM_G2_EN | Default | d | 0.521 | |
SMC_PROCHOT | Default | d | 0.778 | |
SMC_PROCHOT_L | Default | d | 0.600 | |
SMC_RESET_L | Default | d | 0.731 | |
SMC_RST_L | Default | d | 0.611 | |
SMC_SENSOR_PWR_EN | Default | d | 0.752 | |
SMC_TCK | Default | d | 0.728 | |
SMC_TDI | Default | d | 0.745 | |
SMC_TDO | Default | d | 0.745 | |
SMC_THRMTRIP | Default | d | 0.833 | |
SMC_THRMTRIP_L | Default | d | 0.455 | |
SMC_TMS | Default | d | 0.728 | |
SMC_USBC_INT_L | Default | d | 0.714 | |
SMC_VIBE_L | Default | d | 0.732 | |
SMC_WAKE_SCI_L | Default | d | 0.571 | |
SMC_WIFI_PWR_EN | Default | d | 0.447 | |
SPIROM_USE_MLB | Default | d | 0.561 | |
SPI_ALT_CLK | Default | d | 0.692 | |
SPI_ALT_CS_L | Default | d | 0.561 | |
SPI_ALT_IO<2> | Default | d | 0.564 | |
SPI_ALT_IO<3> | Default | d | 0.558 | |
SPI_ALT_MISO | Default | d | 0.554 | |
SPI_ALT_MOSI | Default | d | 0.563 | |
SPI_IO<2> | Default | d | 0.552 | |
SPI_IO<3> | Default | d | 0.553 | |
SPI_MISO | Default | d | 0.549 | |
SPI_MLBROM_CS_L | Default | d | 0.665 | |
SPI_MLB_CLK | Default | d | 0.590 | |
SPI_MLB_CS_L | Default | d | 0.668 | |
SPI_MLB_IO<2> | Default | d | 0.557 | |
SPI_MLB_IO<3> | Default | d | 0.557 | |
SPI_MLB_MISO | Default | d | 0.554 | |
SPI_MLB_MOSI | Default | d | 0.562 | |
SPKRAMP_LOUT1_N | Default | d | 0.470 | |
SPKRAMP_LOUT1_P | Default | d | 0.470 | |
SPKRAMP_LOUT2_N | Default | d | 0.470 | |
SPKRAMP_LOUT2_P | Default | d | 0.470 | |
SPKRAMP_ROUT1_N | Default | d | 0.475 | |
SPKRAMP_ROUT1_P | Default | d | 0.472 | |
SPKRAMP_ROUT2_N | Default | d | 0.478 | |
SPKRAMP_ROUT2_P | Default | d | 0.473 | |
SPKRVNDR_L_ID | Default | d | OL | |
SPKRVNDR_R_ID | Default | d | OL | |
SSD_BOOT_L | Default | d | 0.422 | |
SSD_DEBUG_UART_D2R | Default | d | 0.521 | |
SSD_DEBUG_UART_R2D | Default | d | 0.522 | |
SSD_PWR_EN_L | Default | d | 0.785 | |
SSD_RESET_L | Default | d | 0.492 | |
SSD_SR_EN_L | Default | d | 0.529 | |
STORAGE_EN | Default | d | 0.567 | |
SYSCLK_CLK12M_SMC | Default | d | 0.444 | |
SYSCLK_CLK24M_CAMERA | Default | d | 0.441 | |
SYSCLK_CLK24M_SSD | Default | d | 0.407 | |
SYSCLK_CLK24M_X1 | Default | d | 0.458 | |
SYSCLK_CLK24M_X2 | Default | d | 0.461 | |
SYSCLK_CLK24M_X2_R | Default | d | 0.463 | |
SYSCLK_CLK32K_CAMERA_BT_AP | Default | d | 0.423 | |
SYS_DETECT | Default | d | OL | |
SYS_DETECT_L | Default | d | 0.526 | |
TBT_X_RTD3_CIO_PWR_EN | Default | d | 0.001 | |
TEST_CLKREQ_L | Default | d | 0.793 | |
TPAD_SPI_CLK_R | Default | d | 0.781 | |
TPAD_SPI_CS_L | Default | d | 0.773 | |
TPAD_SPI_IF_EN | Default | d | 0.772 | |
TPAD_SPI_INT_L | Default | d | 0.772 | |
TPAD_SPI_MISO_R | Default | d | 0.782 | |
TPAD_SPI_MOSI_R | Default | d | 0.782 | |
TP_CPU_CFG3 | Default | d | 0.334 | |
TP_CPU_PWRGD | Default | d | 0.424 | |
TP_ITP_PMODE | Default | d | 0.460 | |
TP_JTAG_WLAN_TCK | Default | d | 0.784 | |
TP_JTAG_WLAN_TDO | Default | d | 0.615 | |
TP_JTAG_WLAN_TMS | Default | d | 0.784 | |
TP_JTAG_WLAN_TRST | Default | d | 0.785 | |
TP_MCP_DC_A5 | Default | d | 0.003 | |
TP_MCP_DC_A64 | Default | d | 0.017 | |
TP_MCP_DC_B64 | Default | d | 0.017 | |
TP_MCP_DC_BN64 | Default | d | 0.231 | |
TP_MCP_DC_BP1 | Default | d | 0.003 | |
TP_MCP_DC_BP62 | Default | d | 0.003 | |
TP_MCP_DC_BP64 | Default | d | 0.231 | |
TP_MCP_DC_D1 | Default | d | 0.003 | |
TP_MCP_RSVD_AY18 | Default | d | 0.379 | |
TP_MCP_RSVD_AY22 | Default | d | 0.391 | |
TP_MCP_RSVD_BA17 | Default | d | 0.378 | |
TP_MCP_RSVD_BA23 | Default | d | 0.394 | |
TP_MCP_RSVD_BG47 | Default | d | 0.379 | |
TP_MCP_RSVD_BJ15 | Default | d | 0.803 | |
TP_MCP_RSVD_BJ17 | Default | d | 0.802 | |
TP_MCP_RSVD_BL64 | Default | d | 0.383 | |
TP_MCP_RSVD_BN1 | Default | d | 0.802 | |
TP_PCH_SLP_LAN_L | Default | d | 0.573 | |
TP_PCH_SLP_WLAN_L | Default | d | 0.572 | |
TP_PM_SLP_A_L | Default | d | 0.571 | |
TP_S3X_JTAG_TDI | Default | d | 0.428 | |
TP_S3X_JTAG_TDO | Default | d | 0.427 | |
TP_S3X_JTAG_TRST_L | Default | d | 0.426 | |
TP_S3X_VSS_S | Default | d | 0.003 | |
TP_XDP_BPM_L<0> | Default | d | 0.335 | |
TP_XDP_CPU_PRDY_L | Default | d | 0.303 | |
TP_XDP_CPU_PREQ_L | Default | d | 0.321 | |
TP_XDP_PCH_TCK | Default | d | 0.380 | |
TS_HOST_RST | Default | d | 0.631 | |
UPC_I2C_INT_L | Default | d | 0.722 | |
UPC_XA_5V_EN | Default | d | 0.772 | |
UPC_XA_HPD_RX | Default | d | 0.773 | |
UPC_XA_I2C_ADDR | Default | d | 0.001 | |
UPC_XA_ROM_HOLD_L | Default | d | 0.664 | |
UPC_XA_ROM_WP_L | Default | d | 0.661 | |
UPC_XA_R_OSC | Default | d | 0.506 | |
UPC_XA_SPI_CLK | Default | d | 0.715 | |
UPC_XA_SPI_CLK_R | Default | d | 0.710 | |
UPC_XA_SPI_CS_L | Default | d | 0.707 | |
UPC_XA_SPI_CS_R_L | Default | d | 0.689 | |
UPC_XA_SPI_MISO | Default | d | 0.679 | |
UPC_XA_SPI_MISO_R | Default | d | 0.654 | |
UPC_XA_SPI_MOSI | Default | d | 0.688 | |
UPC_XA_SPI_MOSI_R | Default | d | 0.665 | |
UPC_XA_SWD_CLK | Default | d | 0.769 | |
UPC_XA_SWD_DATA | Default | d | 0.802 | |
UPC_XA_UART_RXTX | Default | d | 0.765 | |
USB3_EXTA_D2R_C_N | Default | d | OL | |
USB3_EXTA_D2R_C_P | Default | d | OL | |
USB3_EXTA_D2R_N | Default | d | 0.380 | |
USB3_EXTA_D2R_P | Default | d | 0.379 | |
USB3_EXTA_R2D_N | Default | d | OL | |
USB3_EXTA_R2D_P | Default | d | OL | |
USBC_XA_CC1 | Default | d | 0.610 | |
USBC_XA_CC2 | Default | d | 0.315 | |
USBC_XA_I2C_EN | Default | d | 0.755 | |
USBC_XA_SBU1 | Default | d | OL | |
USBC_XA_SBU2 | Default | d | OL | |
USBC_XA_USB_BOT_N | Default | d | OL | |
USBC_XA_USB_BOT_P | Default | d | OL | |
USBC_XA_USB_TOP_N | Default | d | OL | |
USBC_XA_USB_TOP_P | Default | d | OL | |
USBC_X_POC_RESET | Default | d | 0.773 | |
USB_EXTA_N | Default | d | 0.578 | |
USB_EXTA_OC_L | Default | d | 0.753 | |
USB_EXTA_P | Default | d | 0.574 | |
USB_TEST_N | Default | d | 0.569 | |
USB_TEST_P | Default | d | 0.568 | |
USB_UPC_XA_F_N | Default | d | 0.578 | |
USB_UPC_XA_F_P | Default | d | 0.574 | |
WLAN_ROM_CLK | Default | d | 0.701 | |
WLAN_ROM_CS | Default | d | 0.688 | |
WLAN_ROM_MISO | Default | d | 0.674 | |
WLAN_ROM_MOSI | Default | d | 0.702 | |
WLAN_ROM_ORG | Default | d | 0.715 | |
XDP_CPUPCH_TCK | Default | d | 0.057 | |
XDP_CPUPCH_TDI | Default | d | 0.321 | |
XDP_CPUPCH_TDO | Default | d | 0.282 | |
XDP_CPUPCH_TMS | Default | d | 0.320 | |
XDP_CPUPCH_TRST_L | Default | d | 0.327 | |
CPUBMONSNS_ALERT_L | LIKE ON BRD PROBLEM | d | 0.059 | |
CPUTHMSNS_ADDR_SEL | LIKE ON BRD PROBLEM | d | 0.655 | |
CPUTHMSNS_ALERT_L | LIKE ON BRD PROBLEM | d | 0.000 | |
CPUTHMSNS_D2_N | LIKE ON BRD PROBLEM | d | 0.655 | |
CPUTHMSNS_D2_P | LIKE ON BRD PROBLEM | d | 0.662 | |
CPUTHMSNS_DUR_SEL | LIKE ON BRD PROBLEM | d | 0.368 | |
CPUTHMSNS_TH_SEL | LIKE ON BRD PROBLEM | d | 0.367 | |
INLET_THMSNS_D1_N | LIKE ON BRD PROBLEM | d | 0.664 | |
INLET_THMSNS_D1_P | LIKE ON BRD PROBLEM | d | 0.666 | |
ISNS_HS_GAIN_N | LIKE ON BRD PROBLEM | d | 0.534 | |
ISNS_HS_GAIN_P | LIKE ON BRD PROBLEM | d | 0.542 | |
PP3V3_S0_CPUTHMSNS_R | LIKE ON BRD PROBLEM | d | 0.011 | |
SMBUS_SMC_1_S0_SCL | LIKE ON BRD PROBLEM | d | 0.402 | |
SMBUS_SMC_1_S0_SDA | LIKE ON BRD PROBLEM | d | 0.439 | |
UNCONNECTED_340 | LIKE ON BRD PROBLEM | d | 0.651 |
Component | Type | Value |
---|