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This data released under the ODbL licence.
laptops/apple/820-00281
Diagnostic solutions
- CD3215 Repeat checks for each unit, U3100,3200, UB300, 400
- UB300
0V6 diode mode on [n:USBC_TA_CC1] at [p:CB313:1]
0V6 diode mode on [n:USBC_TA_CC2] at [p:CB314:1]
5V on [p:FB200:1]
3V3 on [p:CB308:1]
1V8 on [p:CB305:1]
1V8 on [p:CB306:1]
1V1 on [p:CB304:1]
~26V on [p:QB300:1] and [p:QB300:4]
Check [n:PPDCIN_G3H] on [p:QB300:8]
- UB400
0V6 diode mode on [n:USBC_TB_CC1] at [p:CB413:1]
0V6 diode mode on [n:USBC_TB_CC2] at [p:CB414:1]
5V on [p:FB201:1]
3V3 on [p:CB408:1]
1V8 on [p:CB405:1]
1V8 on [p:CB406:1]
1V1 on [p:CB404:1]
~26V on [p:QB400:1] and [p:QB400:4]
Check [n:PPDCIN_G3H] on [p:QB400:8]
- U3100
0V6 diode mode on [n:USBC_XA_CC1] at [p:C3113:1]
0V6 diode mode on [n:USBC_XA_CC2] at [p:C3114:1]
5V on [p:F3000:1]
3V3 on [p:C3108:1]
1V8 on [p:C3105:1]
1V8 on [p:C3106:1]
1V1 on [p:C3104:1]
Check 26V on [p:Q3100:1] and [p:Q3100:4]
Check [n:PPDCIN_G3H] on [p:Q3100:8]
- U3200
0V6 diode mode on [n:USBC_XB_CC1] at [p:C3213:1]
0V6 diode mode on [n:USBC_XB_CC2] at [p:C3214:1]
5V on [p:F3001:1]
3V3 on [p:C3208:1]
1V8 on [p:C3205:1]
1V8 on [p:C3206:1]
1V1 on [p:C3204:1]
Check 26V on [p:Q3200:1] and [p:Q3200:4]
Check [n:PPDCIN_G3H] on [p:Q3200:8]
- CD3215 Full Sequence 5V to 20V
Data comms for USB-C PD (CC1/2)...
0V6 diode mode on [n:USBC_XA_CC1] at [p:C3113:1]
0V6 diode mode on [n:USBC_XA_CC2] at [p:C3114:1]
Power getting to the CD3215...
5V on [n:PP20V_USBC_XA_VBUS] at [p:F3000:1]
Basic CD3215 voltages + LDOs...
3V3 on [n:PP3V3_UPC_XA_LDO] at [p:C3108:1]
1V8 on [n:PP1V8_UPC_XA_LDOA] at [p:C3106:1]
1V8 on [n:PP1V8_UPC_XA_LDOD] at [p:C3105:1]
1V1 on [n:PP1V1_UPC_XA_LDO_BMC] at [p:C3104:1]
Open [p:Q3100] so power goes through to [n:PPDCIN_G3H]...
>5V on [n:UPC_XA_GATE1] at [p:Q3100:1]
>5V on [n:UPC_XA_GATE2] at [p:Q3100:4]
5V on [n:PPDCIN_G3H] at [p:CC773:1]
Power to the ISL [p:U7000] ...
(in) 5V on [n:TBA_VDDA] at [p:C7075:1]
(out) >=3V3 on [n:PM_EN_P3V3_G3H] at [p:R6921:1]
Getting [n:PP3V3_G3H] ...
3V3 on [n:PP3V3_G3H] at [p:L6900:1]
SMC rails...
1V2 on [n:PP1V2_S5_SMC_VDDC] at [p:C5012:1]
3V0 on [n:PP3V0_S5_AVREF_SMC] at [p:C5020:1]
~3V3 on [n:SMBUS_SMC_4_G3H_SCL at [p:R5321:2] (0V66 DM)
~3V3 on [n:SMBUS_SMC_4_G3H_SDA at [p:R5320:2] (0V66 DM)
USBC CC1/2...
0V8 on [n:USB_XA_CC1] at [p:C3113:1]
0V8 on [n:USB_XA_CC2] at [p:C3114:1]
20V switch over...
20V on [n:PP20V_USBC_XA_VBUS] at [p:F3000:1]
>20V on [n:UPC_XA_GATE1] at [p:Q3100:1]
>20V on [n:UPC_XA_GATE2] at [p:Q3100:4]
20V on [n:PPDCIN_G3H] at [p:CC773:1]
Final steps...
5V on [n:TBA_AUX_DET] at [p:C7016:1]
3V3 on [n:SMC_RST_L] at [p:R7090:1]
MOSFETS [p:Q7030] and [p:Q7040] should now be open and [p:U7000] should be generating [n:PPBUS_G3H]
Network Diode/Volt/Res values
Netname | Condition | Type | Value | Comment |
50_0_ANT | Default | d | 0.005 | |
50_1_ANT | Default | d | 0.005 | |
50_2_ANT | Default | d | 0.005 | |
5VS4_VFB1_RR | Default | d | 0.623 | |
8409_ASP1_LRCLK | Default | d | 0.364 | |
8409_ASP1_SCLK | Default | d | 0.363 | |
8409_ASP1_SCLK_R | Default | d | 0.363 | |
8409_ASP1_SDOUT | Default | d | 0.364 | |
8409_ASP1_SDOUT_R | Default | d | 0.364 | |
8409_ASP2_LRCLK | Default | d | 0.671 | |
8409_ASP2_LRCLK_R | Default | d | 0.671 | |
8409_ASP2_SCLK | Default | d | 0.527 | |
8409_ASP2_SCLK_R | Default | d | 0.525 | |
8409_ASP2_SDOUT | Default | d | 0.517 | |
8409_HDA_SDIN0_R | Default | d | 0.524 | |
8409_I2C_SCL | Default | d | 0.361 | |
8409_I2C_SDA | Default | d | 0.440 | |
8409_VA_PLL | Default | d | 0.610 | |
ACT_GND | Default | d | 0.000 | |
ADC1_REFCOMP | Default | d | OL | |
ADC2_REFCOMP | Default | d | OL | |
ALL_SYS_PWRGD | Default | d | 0.455 | |
ALS_SCL_I2C_1V8 | Default | d | 0.457 | |
ALS_SDA_I2C_1V8 | Default | d | 0.458 | |
ALS_SOC_UART_D2R | Default | d | 0.514 | |
ALS_SOC_UART_R2D | Default | d | 0.515 | |
AP_CLKREQ_L | Default | d | 0.574 | |
AP_PCIE_WAKE_L | Default | d | 0.486 | |
AP_RESET_L | Default | d | 0.589 | |
AP_S0IX_WAKE_L | Default | d | 0.509 | |
AP_S0IX_WAKE_SEL | Default | d | 0.725 | |
AUD_ASP1A_LRCLK | Default | d | 0.376 | |
AUD_ASP1A_SCLK | Default | d | 0.376 | |
AUD_ASP1A_SDOUT | Default | d | 0.356 | |
AUD_ASP1B_LRCLK | Default | d | 0.355 | |
AUD_ASP1B_SCLK | Default | d | 0.356 | |
AUD_ASP1B_SDOUT | Default | d | 0.357 | |
AUD_ASP2_SDIN | Default | d | 0.672 | |
AUD_CODEC_INT_L | Default | d | 0.709 | |
AUD_CODEC_RESET_L | Default | d | 0.718 | |
AUD_CODEC_WAKE_L | Default | d | 0.809 | |
AUD_CONN_HP_LEFT | Default | d | 0.680 | |
AUD_CONN_HP_RIGHT | Default | d | 0.680 | |
AUD_CONN_HP_SENSE_L | Default | d | 1.550 | |
AUD_CONN_HP_SENSE_R | Default | d | 1.550 | |
AUD_CONN_RING2 | Default | d | 0.020 | |
AUD_CONN_RING2_XW | Default | d | 0.649 | |
AUD_CONN_SLEEVE | Default | d | 0.020 | |
AUD_CONN_SLEEVE_XW | Default | d | 0.654 | |
AUD_CONN_TIP_SENSE | Default | d | OL | |
AUD_HP_PORT_CH_GND | Default | d | 0.020 | |
AUD_HP_PORT_L | Default | d | 0.680 | |
AUD_HP_PORT_R | Default | d | 0.680 | |
AUD_HP_PORT_US_GND | Default | d | 0.020 | |
AUD_HP_SENSE_L | Default | d | 0.155 | |
AUD_HP_SENSE_R | Default | d | 1.550 | |
AUD_HS_MIC_N | Default | d | 0.649 | |
AUD_HS_MIC_P | Default | d | 0.654 | |
AUD_I2C_1A_SCL | Default | d | 0.354 | |
AUD_I2C_1A_SDA | Default | d | 0.435 | |
AUD_I2C_1B_SCL | Default | d | 0.357 | |
AUD_I2C_1B_SDA | Default | d | 0.435 | |
AUD_PWR_EN | Default | d | 0.530 | |
AUD_SPI_MOSI | Default | d | 0.556 | |
AUD_SPKRAMP_INT_L | Default | d | 0.402 | |
AUD_SPKRAMP_RESET_L | Default | d | 0.363 | |
AUD_TIP_SENSE | Default | d | 1.415 | |
BKLT_PWM_MLB2TCON | Default | d | 0.654 | |
BKLT_PWM_TCON2MLB | Default | d | 0.764 | |
BKLT_SD | Default | d | 0.600 | |
BMON_IOUT_D | Default | d | OL | |
BT_I2S_CLK | Default | d | 0.565 | |
BT_I2S_D2R_R | Default | d | 0.551 | |
BT_I2S_R2D | Default | d | 0.580 | |
BT_I2S_SYNC | Default | d | 0.576 | |
BT_LOW_PWR_L | Default | d | 0.548 | |
BT_TIMESTAMP | Default | d | 0.567 | |
BT_UART_CTS_R2D_L | Default | d | 0.493 | |
BT_UART_D2R | Default | d | 0.418 | |
BT_UART_R2D | Default | d | 0.495 | |
BUF_EDP_PANEL_PWR_EN | Default | d | 0.717 | |
BUF_SMC_RESET_L | Default | d | 0.701 | |
CAMERA_PWR_EN | Default | d | 0.792 | |
CHGR_AMON | Default | d | 0.615 | |
CHGR_BMON | Default | d | 0.616 | |
COMP_A_CPUCORE | Default | d | 0.628 | |
COMP_A_CPUCORE_L | Default | d | OL | |
COMP_B_CPUGT | Default | d | 0.628 | |
COMP_B_CPUGT_L | Default | d | OL | |
CORE2_5G_CTL2_WLAN_JTAG_TDO | Default | d | 0.605 | |
CPUCORE_ISEN1 | Default | d | 0.629 | |
CPUCORE_ISEN3 | Default | d | 0.629 | |
CPUCORE_ISNS1_N | Default | d | 0.003 | |
CPUCORE_ISNS1_N | Default | r | 3.000R | |
CPUCORE_ISNS1_P | Default | d | 0.003 | |
CPUCORE_ISNS1_P | Default | r | 3.000R | |
CPUCORE_ISNS2_N | Default | d | 0.003 | |
CPUCORE_ISNS2_N | Default | r | 3.000R | |
CPUCORE_ISNS2_P | Default | d | 0.003 | |
CPUCORE_ISNS2_P | Default | r | 3.000R | |
CPUCORE_ISNS3_N | Default | d | 0.003 | |
CPUCORE_ISNS3_N | Default | r | 3.000R | |
CPUCORE_ISNS3_P | Default | d | 0.003 | |
CPUCORE_ISNS3_P | Default | r | 3.000R | |
CPUCORE_PSYS | Default | d | 0.625 | |
CPUCORE_PWM2 | Default | d | 0.610 | |
CPUCORE_SW1 | Default | d | 0.003 | |
CPUCORE_SW2 | Default | d | 0.003 | |
CPUCORE_SW2 | Default | r | 3.000R | |
CPUCORE_SW3 | Default | d | 0.003 | |
CPUCORE_SW3 | Default | r | 3.000R | |
CPUGTVSENSE_IN | Default | d | 0.008 | |
CPUGT_BOOT1 | Default | d | 0.608 | |
CPUGT_BP1 | Default | d | 0.608 | |
CPUGT_ISEN2 | Default | d | 0.629 | |
CPUGT_ISNS1_N | Default | d | 0.005 | |
CPUGT_ISNS1_N | Default | r | 4.800R | |
CPUGT_ISNS1_P | Default | d | 0.005 | |
CPUGT_ISNS1_P | Default | r | 4.800R | |
CPUGT_ISNS2_N | Default | d | 0.005 | |
CPUGT_ISNS2_N | Default | r | 4.800R | |
CPUGT_ISNS2_P | Default | d | 0.005 | |
CPUGT_ISNS2_P | Default | r | 4.800R | |
CPUGT_ISUMN | Default | d | 0.007 | |
CPUGT_ISUM_IOUT | Default | d | OL | |
CPUGT_PHASE1 | Default | d | 0.008 | |
CPUGT_SW1 | Default | d | 0.005 | |
CPUGT_SW1 | Default | r | 4.800R | |
CPUGT_SW2 | Default | d | 0.005 | |
CPUGT_SW2 | Default | r | 4.800R | |
CPUHI_COMP_FB | Default | d | OL | |
CPUHI_COMP_OUT | Default | d | OL | |
CPUHI_COMP_VREF | Default | d | OL | |
CPUHI_IOUT | Default | d | 0.709 | |
CPUHI_IOUT_R | Default | d | OL | |
CPUSAVSENSE_IN | Default | d | 0.014 | |
CPUSA_FCCM | Default | d | 0.613 | |
CPUSA_ISUMN | Default | d | 0.015 | |
CPUSA_ISUMN | Default | r | 35.500R | |
CPUSA_ISUMN_R | Default | d | 0.487 | |
CPUTHMSNS_ALERT_L | Default | d | 0.596 | |
CPUTHMSNS_THM_L | Default | d | 0.639 | |
CPUVR_ISUM_IOUT | Default | d | OL | |
CPUVR_PGOOD | Default | d | 0.516 | |
CPUVR_SWSA | Default | d | 0.014 | |
CPUVR_SWSA | Default | r | 13.500R | |
CPUVSENSE_IN | Default | d | 0.005 | |
CPU_CATERR_L | Default | d | 0.232 | |
CPU_CFG<0> | Default | d | 0.288 | |
CPU_CFG<10> | Default | d | 0.287 | |
CPU_CFG<11> | Default | d | 0.288 | |
CPU_CFG<12> | Default | d | 0.290 | |
CPU_CFG<16> | Default | d | 0.291 | |
CPU_CFG<17> | Default | d | 0.293 | |
CPU_CFG<18> | Default | d | 0.289 | |
CPU_CFG<19> | Default | d | 0.291 | |
CPU_CFG<1> | Default | d | 0.288 | |
CPU_CFG<2> | Default | d | 0.288 | |
CPU_CFG<3> | Default | d | 0.285 | |
CPU_CFG<8> | Default | d | 0.286 | |
CPU_CFG<9> | Default | d | 0.280 | |
CPU_CFG_RCOMP | Default | d | 0.054 | |
CPU_CFG_RCOMP | Default | r | 52.900R | |
CPU_DC_B2_C1 | Default | d | OL | |
CPU_DC_B38_C38 | Default | d | OL | |
CPU_DC_BR1_BR2 | Default | d | 0.346 | |
CPU_DC_BR2_BR1 | Default | d | OL | |
CPU_DC_BR38_BT36 | Default | d | 0.002 | |
CPU_DC_BT36_BR38 | Default | d | 0.002 | |
CPU_DC_C1_B2 | Default | d | OL | |
CPU_DC_C38_B38 | Default | d | OL | |
CPU_DIMMA_VREFDQ | Default | d | 0.756 | |
CPU_DIMMB_VREFDQ | Default | d | 0.756 | |
CPU_DIMM_VREFCA | Default | d | 0.693 | |
CPU_EDP_RCOMP | Default | d | 0.066 | |
CPU_EOPIO_RCOMP | Default | d | 0.001 | |
CPU_OPC_OPIO_RCOMP | Default | d | 0.004 | |
CPU_OPC_OPIO_RCOMP | Default | r | 2.900R | |
CPU_OPC_OPIO_RCOMP_ED2 | Default | d | 0.003 | |
CPU_OPC_OPIO_RCOMP_ED2 | Default | r | 2.200R | |
CPU_PCH_PM_DOWN | Default | d | 0.310 | |
CPU_PCH_PM_DOWN_R | Default | d | 0.287 | |
CPU_PCH_TRIGGER | Default | d | 0.322 | |
CPU_PCH_TRIGGER_R | Default | d | 0.287 | |
CPU_PECI | Default | d | 0.299 | |
CPU_PECI_R | Default | d | 0.275 | |
CPU_PROCHOT_L | Default | d | 0.501 | |
CPU_PROCHOT_R_L | Default | d | 0.287 | |
CPU_PWRGD | Default | d | 0.474 | |
CPU_RESET_L | Default | d | 0.479 | |
CPU_VCCSASENSE_N | Default | d | 0.003 | |
CPU_VCCSASENSE_N | Default | r | 25.300R | |
CPU_VCCSASENSE_P | Default | d | 0.016 | |
CPU_VCCSASENSE_P | Default | r | 16.200R | |
CPU_VCCST_PWRGD | Default | d | 0.447 | |
CPU_VIDALERT_L | Default | d | 0.272 | |
CPU_VIDALERT_R_L | Default | d | 0.492 | |
CPU_VIDSCLK | Default | d | 0.229 | |
CPU_VIDSCLK_R | Default | d | 0.228 | |
CPU_VIDSOUT | Default | d | 0.230 | |
CPU_VIDSOUT_R | Default | d | 0.230 | |
CPU_VR_EN_R | Default | d | 0.472 | |
DBGLED_GPU | Default | d | OL | |
DBGLED_GPU_D | Default | d | OL | |
DBGLED_S0 | Default | d | OL | |
DBGLED_S0I3 | Default | d | OL | |
DBGLED_S0I3_D | Default | d | OL | |
DBGLED_S0_D | Default | d | OL | |
DBGLED_S3 | Default | d | OL | |
DBGLED_S3_D | Default | d | OL | |
DBGLED_S4 | Default | d | OL | |
DBGLED_S4_D | Default | d | OL | |
DBGLED_S5 | Default | d | OL | |
DCINVSENS_EN_L | Default | d | 0.490 | |
DCIN_S5_VSENSE | Default | d | OL | |
DEBUGUART_SEL_SOC | Default | d | 0.574 | |
DFRDRV_I2C_SCL | Default | d | 0.472 | |
DFRDRV_I2C_SDA | Default | d | 0.472 | |
DFR_CLKIN_RESET_L | Default | d | 0.479 | |
DFR_DISP_INT | Default | d | 0.474 | |
DFR_DISP_PWR_EN | Default | d | 0.527 | |
DFR_DISP_RESET_L | Default | d | 0.703 | |
DFR_DISP_RST_L | Default | d | 0.464 | |
DFR_DISP_SMC_RST_L | Default | d | 0.532 | |
DFR_DISP_VSYNC | Default | d | 0.480 | |
DFR_TOUCH_GPIO2 | Default | d | 0.479 | |
DFR_TOUCH_INT_L | Default | d | 0.476 | |
DFR_TOUCH_LID | Default | d | 0.511 | |
DFR_TOUCH_PANEL_DETECT | Default | d | 0.477 | |
DFR_TOUCH_RESET_L | Default | d | 0.475 | |
DFR_TOUCH_ROM_I2C_SCL | Default | d | 0.474 | |
DFR_TOUCH_ROM_I2C_SDA | Default | d | OL | |
DFR_TOUCH_ROM_WC | Default | d | OL | |
DFR_TOUCH_SPI_CLK_R | Default | d | 0.477 | |
DFR_TOUCH_SPI_CS_L | Default | d | 0.474 | |
DFR_TOUCH_SPI_MISO | Default | d | 0.475 | |
DFR_TOUCH_SPI_MISO_R | Default | d | 0.477 | |
DFR_TOUCH_SPI_MOSI_R | Default | d | 0.476 | |
DFU_SPI_STATUS | Default | d | 0.477 | |
DFU_STATUS | Default | d | 0.477 | |
DMIC1_CLK | Default | d | 0.793 | |
DMIC1_DATA | Default | d | 0.760 | |
DMIC2_CLK | Default | d | 0.793 | |
DMIC2_DATA | Default | d | 0.760 | |
DPMUX_LRESET_L | Default | d | 0.587 | |
DPMUX_UC_IRQ | Default | d | 0.611 | |
DPMUX_UC_MD1 | Default | d | 0.618 | |
DPMUX_UC_MD2 | Default | d | 0.576 | |
DPMUX_UC_MD2_R | Default | d | 0.576 | |
DPMUX_UC_RESET_L | Default | d | 0.512 | |
DPMUX_UC_RX | Default | d | 0.599 | |
DPMUX_UC_TCK | Default | d | 0.646 | |
DPMUX_UC_TDI | Default | d | 0.649 | |
DPMUX_UC_TDO | Default | d | 0.649 | |
DPMUX_UC_TMS | Default | d | 0.647 | |
DPMUX_UC_TRST_L | Default | d | 0.648 | |
DPMUX_UC_TX | Default | d | 0.603 | |
DPMUX_UC_VCL | Default | d | 0.465 | |
DP_INT_EG_HPD | Default | d | 0.350 | |
DP_INT_HPD | Default | d | 0.624 | |
DP_INT_IG_HPD | Default | d | OL | |
DP_TB_HPD | Default | d | 0.595 | |
DP_T_SNK0_DDC_CLK | Default | d | 0.602 | |
DP_T_SNK0_HPD | Default | d | 0.579 | |
DP_T_SNK0_HPD_EG | Default | d | 0.356 | |
DP_T_SNK0_HPD_IG | Default | d | 0.553 | |
DP_T_SNK1_DDC_CLK | Default | d | 0.619 | |
DP_T_SNK1_HPD | Default | d | 0.581 | |
DP_T_SNK1_HPD_EG | Default | d | 0.356 | |
DP_T_SNK1_HPD_IG | Default | d | 0.623 | |
DP_T_SRC_HPD | Default | d | 0.599 | |
DP_XA_HPD | Default | d | 0.572 | |
DP_X_SNK0_DDC_CLK | Default | d | 0.575 | |
DP_X_SNK0_DDC_DATA | Default | d | 0.574 | |
DP_X_SNK0_HPD | Default | d | 0.560 | |
DP_X_SNK0_HPD_EG | Default | d | 0.358 | |
DP_X_SNK0_HPD_IG | Default | d | 0.555 | |
DP_X_SNK1_DDC_CLK | Default | d | 0.576 | |
DP_X_SNK1_DDC_DATA | Default | d | 0.575 | |
DP_X_SNK1_HPD | Default | d | 0.560 | |
DP_X_SNK1_HPD_EG | Default | d | 0.356 | |
DP_X_SNK1_HPD_IG | Default | d | 0.553 | |
DP_X_SNK_RBIAS | Default | d | 0.781 | |
DP_X_SRC_HPD | Default | d | 0.575 | |
DP_X_SRC_RBIAS | Default | d | 0.801 | |
EADC1_LCDBKLT_ISENSE | Default | d | OL | |
EADC1_OTHER5V_HI_ISENSE | Default | d | OL | |
EADC1_PP3V3S4_WLAN_ISENSE | Default | d | OL | |
EADC1_PP5V_T139_ISENSE | Default | d | OL | |
EADC1_TBT_T_ISENSE | Default | d | OL | |
EADC2_AD0 | Default | d | OL | |
EADC2_BT_ISENSE | Default | d | OL | |
EADC2_CAMERA_ISENSE | Default | d | OL | |
EADC2_KBBLT_ISENSE | Default | d | OL | |
EADC2_LCDPANEL_ISENSE | Default | d | OL | |
EADC2_OTHER3V3_HI_ISENSE | Default | d | OL | |
EADC2_PP3V3_TPAD_ISENSE | Default | d | OL | |
EADC2_T151_ISENSE | Default | d | OL | |
EDP_AUXCH_C_N | Default | d | 0.445 | |
EDP_AUXCH_C_P | Default | d | 0.448 | |
EDP_BKLT_EN | Default | d | 0.531 | |
EDP_IG_BKLT_EN | Default | d | 0.640 | |
EDP_IG_PANEL_PWR_EN | Default | d | 0.690 | |
EDP_INT_ML_N<0> | Default | d | 0.401 | |
EDP_INT_ML_N<1> | Default | d | 0.399 | |
EDP_INT_ML_N<2> | Default | d | 0.399 | |
EDP_INT_ML_N<3> | Default | d | 0.433 | |
EDP_INT_ML_P<0> | Default | d | 0.399 | |
EDP_INT_ML_P<1> | Default | d | 0.399 | |
EDP_INT_ML_P<2> | Default | d | 0.399 | |
EDP_INT_ML_P<3> | Default | d | 0.407 | |
EDP_PANEL_PWR_EN | Default | d | 0.558 | |
EG_BKLT_EN | Default | d | 0.357 | |
EG_CLKREQ_OUT_L | Default | d | 0.551 | |
EG_CLKREQ_PU | Default | d | 0.600 | |
EG_CLKREQ_SEL_L | Default | d | 0.639 | |
EG_LCD_PWR_EN | Default | d | 0.357 | |
EG_PEG_CLK100M_N | Default | d | 0.403 | |
EG_PEG_CLK100M_P | Default | d | 0.415 | |
EG_RAIL1_EN | Default | d | 0.564 | |
EG_RAIL2_EN | Default | d | 0.688 | |
EG_RAIL4_EN | Default | d | 0.634 | |
EG_RAIL5_EN | Default | d | 0.585 | |
EG_RESET_L | Default | d | 0.530 | |
FAN_LT_PWM | Default | d | 0.944 | |
FAN_RT_PWM | Default | d | 0.953 | |
FAN_RT_TACH | Default | d | OL | |
FBVDD_ALTVO | Default | d | 0.544 | |
FB_A0_MF | Default | d | 0.122 | |
FB_A0_SEN | Default | d | 0.122 | |
FB_A0_VREFC | Default | d | 0.310 | |
FB_A0_VREFD | Default | d | 0.593 | |
FB_A0_ZQ | Default | d | 0.121 | |
FB_A1_MF | Default | d | 0.122 | |
FB_A1_SEN | Default | d | 0.121 | |
FB_A1_VREFC | Default | d | 0.312 | |
FB_A1_VREFD | Default | d | 0.588 | |
FB_A1_ZQ | Default | d | 0.122 | |
FB_B0_MF | Default | d | 0.121 | |
FB_B0_SEN | Default | d | 0.121 | |
FB_B0_VREFC | Default | d | 0.313 | |
FB_B0_VREFD | Default | d | 0.592 | |
FB_B0_ZQ | Default | d | 0.122 | |
FB_B1_MF | Default | d | 0.121 | |
FB_B1_SEN | Default | d | 0.122 | |
FB_B1_VREFC | Default | d | 0.311 | |
FB_B1_VREFD | Default | d | 0.590 | |
FB_B1_ZQ | Default | d | 0.122 | |
GFXIMVP_ISNS1_N | Default | d | 0.003 | |
GFXIMVP_ISNS1_N | Default | r | 2.700R | |
GFXIMVP_ISNS1_P | Default | d | 0.003 | |
GFXIMVP_ISNS1_P | Default | r | 2.700R | |
GFXIMVP_ISNS2_N | Default | d | 0.003 | |
GFXIMVP_ISNS2_N | Default | r | 2.700R | |
GFXIMVP_ISNS2_P | Default | d | 0.003 | |
GFXIMVP_ISNS2_P | Default | r | 2.700R | |
GFXIMVP_ISUMN | Default | d | 0.004 | |
GFXIMVP_ISUMP_C | Default | d | OL | |
GFXIMVP_ISUM_IOUT | Default | d | OL | |
GFXIMVP_PHASE1 | Default | d | 0.003 | |
GFXIMVP_PHASE1 | Default | r | 2.000R | |
GFXIMVP_PHASE2 | Default | d | 0.003 | |
GFXIMVP_PHASE2 | Default | r | 2.700R | |
GFX_SELF_THROTTLE | Default | d | 0.358 | |
GFX_SELF_THROTTLE_R | Default | d | 0.358 | |
GMUX_SLP_S3_BUF_L | Default | d | 0.512 | |
GND | Default | d | - | |
GPUCOREVSENSE_IN | Default | d | 0.005 | |
GPUFB_AGND | Default | d | 0.001 | |
GPUFB_BOOT_RC | Default | d | 0.564 | |
GPUFB_CS_N | Default | d | 0.053 | |
GPUFB_CS_N | Default | r | 52.400R | |
GPUFB_CS_P | Default | d | 0.053 | |
GPUFB_CS_P | Default | r | 52.400R | |
GPUFB_DRVH | Default | d | 0.539 | |
GPUFB_DRVL | Default | d | 0.472 | |
GPUFB_FSEL | Default | d | 0.546 | |
GPUFB_GPU_VO_R | Default | d | 0.053 | |
GPUFB_LL | Default | d | 0.053 | |
GPUFB_OCSET | Default | d | 0.542 | |
GPUFB_PGOOD | Default | d | 0.527 | |
GPUFB_RTN_DIV | Default | d | 0.526 | |
GPUFB_SENSE_DIV | Default | d | 0.528 | |
GPUFB_SET0 | Default | d | 0.546 | |
GPUFB_SET_R | Default | d | 0.545 | |
GPUFB_SREF | Default | d | 0.545 | |
GPUFB_VO | Default | d | 0.541 | |
GPUTHMSNS_D1_P | Default | d | 0.713 | |
GPUTHMSNS_D2_N | Default | d | 0.711 | |
GPUVCORE_COMP | Default | d | 0.600 | |
GPUVCORE_FB_R | Default | d | OL | |
GPUVCORE_NTC | Default | d | 0.625 | |
GPUVCORE_PGOOD | Default | d | 0.575 | |
GPUVCORE_SVC | Default | d | 0.441 | |
GPUVCORE_SVT | Default | d | 0.544 | |
GPUVDDCIVSENSE_IN | Default | d | 0.037 | |
GPU_ANALOGIO | Default | d | 0.721 | |
GPU_AUD<0> | Default | d | 0.353 | |
GPU_AUD_PORT_CONN<0> | Default | d | 0.389 | |
GPU_AUD_PORT_CONN<1> | Default | d | 0.389 | |
GPU_AUD_PORT_CONN<2> | Default | d | 0.390 | |
GPU_AUX_ZVSS | Default | d | 0.152 | |
GPU_BP_1 | Default | d | 0.396 | |
GPU_BRD_CFG<0> | Default | d | 0.391 | |
GPU_BRD_CFG<1> | Default | d | 0.390 | |
GPU_BRD_CFG<2> | Default | d | 0.390 | |
GPU_CLKREQ_L | Default | d | 0.433 | |
GPU_DBG_10 | Default | d | 0.397 | |
GPU_DBG_11 | Default | d | 0.398 | |
GPU_DBG_8 | Default | d | 0.397 | |
GPU_DBG_9 | Default | d | 0.396 | |
GPU_DIECRACKMON | Default | d | 0.001 | |
GPU_FB_SNS_COMMON_NEG | Default | d | 0.001 | |
GPU_GFX_OVERTEMP | Default | d | 0.597 | |
GPU_GFX_PWR_LEVEL_L | Default | d | 0.367 | |
GPU_GFX_PWR_LEVEL_R_L | Default | d | 0.367 | |
GPU_GPIO_SVC_R | Default | d | 0.400 | |
GPU_GPIO_SVD_R | Default | d | 0.396 | |
GPU_JTAG_TCK | Default | d | 0.359 | |
GPU_JTAG_TDI | Default | d | 0.358 | |
GPU_JTAG_TDO | Default | d | 0.359 | |
GPU_JTAG_TMS | Default | d | 0.358 | |
GPU_JTAG_TRST_L | Default | d | 0.360 | |
GPU_MPLS_PS_0 | Default | d | 0.397 | |
GPU_MPLS_PS_1 | Default | d | 0.397 | |
GPU_MPLS_PS_2 | Default | d | 0.395 | |
GPU_MPLS_PS_3 | Default | d | 0.397 | |
GPU_PCIE_ZVSS | Default | d | 0.202 | |
GPU_PLLCHARZ_H | Default | d | 0.308 | |
GPU_PLLCHARZ_RC_H | Default | d | OL | |
GPU_ROM_CONFIG<0> | Default | d | 0.366 | |
GPU_ROM_CONFIG<1> | Default | d | 0.354 | |
GPU_ROM_CONFIG<2> | Default | d | 0.352 | |
GPU_ROM_CS_L | Default | d | 0.384 | |
GPU_ROM_CS_L_R | Default | d | 0.351 | |
GPU_ROM_SI_R | Default | d | 0.352 | |
GPU_ROM_WP_L | Default | d | 0.490 | |
GPU_SMBUS_ADDR<0> | Default | d | 0.392 | |
GPU_SMBUS_ADDR<1> | Default | d | 0.390 | |
GPU_SMB_CLK | Default | d | 0.431 | |
GPU_SMB_DAT | Default | d | 0.431 | |
GPU_TEST_EN | Default | d | 0.809 | |
GPU_TEST_PG | Default | d | 0.788 | |
GPU_TEST_PG_BACON | Default | d | 0.806 | |
GPU_TX_DEEMPH_EN | Default | d | 0.367 | |
GPU_TX_HALF_SWING | Default | d | 0.354 | |
GPU_VCORE_LOAD | Default | d | 0.053 | |
GPU_VCORE_PCC | Default | d | 0.407 | |
GPU_VCORE_SOURCE | Default | d | 0.051 | |
GPU_VGA_DIS | Default | d | 0.354 | |
GPU_VRAM_STRAP | Default | d | 0.358 | |
GT_ISUMN_R | Default | d | 1.018 | |
HALL_SENSOR_LEFT | Default | d | 0.479 | |
HALL_SENSOR_RIGHT | Default | d | 0.484 | |
HDA_BIT_CLK | Default | d | 0.741 | |
HDA_RST_L | Default | d | 0.741 | |
HDA_SDIN0 | Default | d | 0.524 | |
HDA_SDOUT | Default | d | 0.741 | |
HDA_SYNC | Default | d | 0.742 | |
HPWR_EN_L | Default | d | 0.625 | |
HS_OTHER3V3_IOUT | Default | d | OL | |
I2C_ALS_SCL | Default | d | 0.571 | |
I2C_ALS_SDA | Default | d | 0.586 | |
I2C_BKLT_SCL | Default | d | 0.538 | |
I2C_BKLT_SDA | Default | d | 0.622 | |
I2C_CAM_SCL | Default | d | 0.472 | |
I2C_CAM_SDA | Default | d | 0.472 | |
I2C_DPMUX_UC_SCL | Default | d | 0.609 | |
I2C_DPMUX_UC_SDA | Default | d | 0.610 | |
I2C_GPU_PCC_SCL | Default | d | 0.430 | |
I2C_GPU_PCC_SDA | Default | d | 0.430 | |
I2C_SSD_SCL | Default | d | 0.671 | |
I2C_SSD_SDA | Default | d | 0.669 | |
I2C_TBT_TA_INT_L | Default | d | 0.591 | |
I2C_TBT_TB_INT_L | Default | d | 0.590 | |
I2C_TBT_T_SCL | Default | d | 0.594 | |
I2C_TBT_T_SDA | Default | d | 0.593 | |
I2C_TBT_XA_INT_L | Default | d | 0.570 | |
I2C_TBT_XB_INT_L | Default | d | 0.572 | |
I2C_TBT_X_SCL | Default | d | 0.570 | |
I2C_TBT_X_SDA | Default | d | 0.569 | |
I2C_UPC_TB_DBG_CTL_SDA | Default | d | 0.778 | |
I2C_UPC_T_SCL2 | Default | d | 0.676 | |
I2C_UPC_T_SDA2 | Default | d | 0.676 | |
I2C_UPC_XA_DBG_CTL_SDA | Default | d | 0.776 | |
I2C_UPC_XB_DBG_CTL_SCL | Default | d | 0.776 | |
I2C_UPC_XB_DBG_CTL_SDA | Default | d | 0.777 | |
I2C_UPC_X_SCL2 | Default | d | 0.694 | |
I2C_UPC_X_SDA2 | Default | d | 0.694 | |
IAPC_OPA_OUT | Default | d | OL | |
IMON_A_CPUCORE | Default | d | 0.629 | |
IMON_B_CPUGT | Default | d | 0.628 | |
IMON_C_CPUSA | Default | d | 0.628 | |
ISNS_1V0_N | Default | d | 0.056 | |
ISNS_1V0_N | Default | r | 55.000R | |
ISNS_1V0_P | Default | d | 0.056 | |
ISNS_1V0_P | Default | r | 55.000R | |
ISNS_1V8_SUS_N | Default | d | OL | |
ISNS_1V8_SUS_P | Default | d | OL | |
ISNS_BT_N | Default | d | OL | |
ISNS_BT_P | Default | d | OL | |
ISNS_CAMERA_IOUT | Default | d | OL | |
ISNS_CPUDDR_IOUT | Default | d | OL | |
ISNS_CPUDDR_N | Default | d | OL | |
ISNS_CPUDDR_P | Default | d | OL | |
ISNS_CPUHIGAIN_OUT | Default | d | OL | |
ISNS_CPUSA_IOUT | Default | d | OL | |
ISNS_DDR_IOUT | Default | d | OL | |
ISNS_GPU1V8_IOUT | Default | d | OL | |
ISNS_GPUFBIC_IOUT | Default | d | OL | |
ISNS_GPUFBIC_N | Default | d | OL | |
ISNS_GPUFBIC_P | Default | d | OL | |
ISNS_GPUFB_IOUT | Default | d | 0.000 | |
ISNS_GPUVDDCI_IOUT | Default | d | OL | |
ISNS_GPU_HS_IOUT | Default | d | 0.711 | |
ISNS_GPU_HS_N | Default | d | 0.450 | |
ISNS_GPU_HS_N | Default | r | 0.115R | |
ISNS_GPU_HS_N | Default | v | 12.600 | |
ISNS_GPU_HS_P | Default | d | 0.450 | |
ISNS_GPU_HS_P | Default | r | 0.115R | |
ISNS_GPU_HS_P | Default | v | 12.600 | |
ISNS_HS_COMPUTING_N | Default | d | 0.450 | |
ISNS_HS_COMPUTING_N | Default | r | 0.115R | |
ISNS_HS_COMPUTING_N | Default | v | 12.600 | |
ISNS_HS_COMPUTING_P | Default | d | 0.450 | |
ISNS_HS_COMPUTING_P | Default | r | 0.115R | |
ISNS_HS_COMPUTING_P | Default | v | 12.600 | |
ISNS_KBBLT_IOUT | Default | d | OL | |
ISNS_KBBLT_N | Default | d | OL | |
ISNS_KBBLT_P | Default | d | OL | |
ISNS_LCDBKLT_IOUT | Default | d | OL | |
ISNS_LCDBKLT_N | Default | d | 0.450 | |
ISNS_LCDBKLT_N | Default | r | 0.115R | |
ISNS_LCDBKLT_N | Default | v | 12.600 | |
ISNS_LCDBKLT_P | Default | d | 0.450 | |
ISNS_LCDBKLT_P | Default | r | 0.115R | |
ISNS_LCDBKLT_P | Default | v | 12.600 | |
ISNS_LCDPANEL_IOUT | Default | d | OL | |
ISNS_LCDPANEL_N | Default | d | OL | |
ISNS_LCDPANEL_P | Default | d | OL | |
ISNS_LPDDR_N | Default | d | 0.352 | |
ISNS_LPDDR_N | Default | r | 0.900R | |
ISNS_LPDDR_P | Default | d | 0.352 | |
ISNS_LPDDR_P | Default | r | 0.900R | |
ISNS_PP3V3S0_IOUT | Default | d | OL | |
ISNS_PP3V3S4_WLAN_IOUT | Default | d | OL | |
ISNS_PP3V3_TPAD_IOUT | Default | d | OL | |
ISNS_PP3V3_TPAD_N | Default | d | OL | |
ISNS_PP3V3_TPAD_P | Default | d | OL | |
ISNS_PP5V_T139_IOUT | Default | d | OL | |
ISNS_PP5V_T139_N | Default | d | OL | |
ISNS_PP5V_T139_P | Default | d | OL | |
ISNS_SSDNAND_IOUT | Default | d | OL | |
ISNS_T139_N | Default | d | OL | |
ISNS_T139_P | Default | d | OL | |
ISNS_T151_IOUT | Default | d | OL | |
ISNS_TBT_T_IOUT | Default | d | OL | |
ISNS_TBT_T_N | Default | d | OL | |
ISNS_TBT_T_P | Default | d | OL | |
ISNS_TBT_X_IOUT | Default | d | OL | |
ISNS_TBT_X_N | Default | d | OL | |
ISNS_TBT_X_P | Default | d | OL | |
ISNS_TPAD_N | Default | d | OL | |
ISNS_TPAD_P | Default | d | OL | |
ISNS_WLAN_N | Default | d | OL | |
ISNS_WLAN_P | Default | d | OL | |
ISNS_WLAN_R_N | Default | d | OL | |
ISNS_WLAN_R_P | Default | d | OL | |
ISNS_X239_INT_I | Default | d | OL | |
ISNS_X239_INT_NI | Default | d | OL | |
ISNS_X239_IOUT | Default | d | OL | |
ISNS_X239_IOUT_BUF | Default | d | OL | |
ISNS_X239_IOUT_INT | Default | d | OL | |
ITP_PMODE | Default | d | 0.511 | |
JTAG_ISP_TCK | Default | d | 0.547 | |
JTAG_ISP_TDI | Default | d | 0.547 | |
JTAG_ISP_TDO | Default | d | 0.544 | |
JTAG_TBT_TCK | Default | d | 0.545 | |
JTAG_TBT_TDI | Default | d | 0.546 | |
JTAG_TBT_T_TMS | Default | d | 0.594 | |
JTAG_TBT_W_TMS | Default | d | 0.787 | |
JTAG_TBT_X_TMS | Default | d | 0.566 | |
KBD_BLC_GSLAT | Default | d | OL | |
KBD_BLC_GSSCK | Default | d | OL | |
KBD_BLC_GSSIN | Default | d | OL | |
KBD_BLC_GSSOUT | Default | d | OL | |
KBD_BLC_XBLANK | Default | d | OL | |
KBD_I2C_SCL | Default | d | OL | |
KBD_I2C_SDA | Default | d | OL | |
KBD_INT_L | Default | d | OL | |
L83_FILTP | Default | d | 0.862 | |
L83_FLYC | Default | d | 0.410 | |
L83_FLYP | Default | d | 0.520 | |
L83_HSBIAS_FILT | Default | d | 0.720 | |
L83_HSBIAS_FILT_REF | Default | d | 0.636 | |
L83_SDOUT | Default | d | 0.744 | |
L83_VCP | Default | d | 0.480 | |
L83_VL | Default | d | 0.480 | |
L83_VP | Default | d | 0.418 | |
LBW_AMP_OUT | Default | d | OL | |
LBW_AMP_OUT_R | Default | d | OL | |
LCDBKLT_EN_L | Default | d | OL | |
LCDBKLT_FB | Default | d | 0.731 | |
LCDBKLT_SW | Default | d | 0.440 | |
LCD_FSS | Default | d | 0.657 | |
LCD_IRQ_L | Default | d | 0.803 | |
LCD_MUX_EN | Default | d | 0.633 | |
LCD_MUX_SEL | Default | d | 0.637 | |
LCD_PSR_EN | Default | d | 0.792 | |
LPC_AD<0> | Default | d | 0.615 | |
LPC_AD<1> | Default | d | 0.572 | |
LPC_AD<2> | Default | d | 0.568 | |
LPC_AD<3> | Default | d | 0.566 | |
LPC_CLK24M_DPMUX_UC_R | Default | d | 0.599 | |
LPC_CLKRUN_L | Default | d | 0.615 | |
LPC_FRAME_L | Default | d | 0.573 | |
LPC_PWRDWN_L | Default | d | 0.573 | |
LPC_SERIRQ | Default | d | 0.589 | |
MEM_VREFCA_A_RC | Default | d | 0.026 | |
MEM_VREFCA_A_RC | Default | r | 25.600R | |
MEM_VREFDQ_A_RC | Default | d | 0.026 | |
MEM_VREFDQ_A_RC | Default | r | 25.600R | |
MEM_VREFDQ_B_RC | Default | d | 0.026 | |
MENU_KEY_L | Default | d | 0.737 | |
MESA_BOOST_EN | Default | d | 0.506 | |
MESA_BOOST_EN_CONN | Default | d | 1.212 | |
MESA_I2C_SCL | Default | d | 0.572 | |
MESA_I2C_SDA | Default | d | 0.574 | |
MESA_PWR_EN | Default | d | 0.508 | |
MESA_SNSR_INT | Default | d | 0.485 | |
MESA_SNSR_INT_CONN | Default | d | 1.210 | |
MESA_SPI_CLK_CONN | Default | d | 0.554 | |
MESA_SPI_CLK_R | Default | d | 0.486 | |
MESA_SPI_MISO_CONN | Default | d | 0.539 | |
MESA_SPI_MOSI_CONN | Default | d | 0.564 | |
MIPIC_CLK_N | Default | d | 0.550 | |
MIPIC_CLK_P | Default | d | 0.550 | |
MIPIC_DATA_N | Default | d | 0.553 | |
MIPIC_DATA_P | Default | d | 0.555 | |
MIPID_CLK_CONN_N | Default | d | 0.546 | |
MIPID_CLK_CONN_P | Default | d | 0.546 | |
MIPID_CLK_N | Default | d | 0.546 | |
MIPID_CLK_P | Default | d | 0.546 | |
MIPID_DATA_CONN_N | Default | d | 0.546 | |
MIPID_DATA_CONN_P | Default | d | 0.546 | |
MIPID_DATA_N | Default | d | 0.546 | |
MIPID_DATA_P | Default | d | 0.546 | |
MIPI_CLK_CONN_N | Default | d | 0.550 | |
MIPI_CLK_CONN_P | Default | d | 0.550 | |
MIPI_DATA_CONN_N | Default | d | 0.553 | |
MIPI_DATA_CONN_P | Default | d | 0.555 | |
MLB_BOARD_ID0 | Default | d | 0.787 | |
MLB_BOARD_ID2 | Default | d | 0.787 | |
MLB_BOARD_ID3 | Default | d | 0.726 | |
MLB_BOARD_ID4 | Default | d | 0.622 | |
MLB_RAMCFG0 | Default | d | 0.789 | |
MLB_RAMCFG1 | Default | d | 0.524 | |
MLB_RAMCFG2 | Default | d | 0.790 | |
MLB_RAMCFG3 | Default | d | 0.522 | |
MLB_RAMCFG4 | Default | d | 0.777 | |
NTC_A_CPUCORE | Default | d | 0.630 | |
NTC_A_CPUCORE_R | Default | d | OL | |
P0V9_TBT_T_SVR_AGND | Default | d | 0.020 | |
P0V9_TBT_X_SVR_AGND | Default | d | 0.001 | |
P12V_SSD_VPP_SW | Default | d | 0.407 | |
P12V_SSD_VPP_SW_L | Default | d | 0.407 | |
P12V_SSD_VPP_SW_L | Default | v | 3.300 | |
P16V0_AGND | Default | d | 0.047 | |
P1V0S3_EN | Default | d | 0.573 | |
P1V0_SSD_CORE_SW | Default | d | 0.338 | |
P1V1_SSD_PCIE_SW | Default | d | 0.351 | |
P1V2S0SW_RAMP | Default | d | OL | |
P1V2S3_ILIM_HS | Default | d | 0.486 | |
P1V2_PHASE | Default | d | 0.224 | |
P1V2_SSD_DRAM_SW | Default | d | 0.303 | |
P1V2_SW_SNUB | Default | d | OL | |
P1V2_VBST_R | Default | d | 0.611 | |
P1V8GPU_PGOOD | Default | d | 0.586 | |
P1V8S3_EN | Default | d | 0.498 | |
P1V8S3_RAMP | Default | d | 0.630 | |
P1V8SUS_IOUT | Default | d | OL | |
P1V8SUS_SW | Default | d | 0.433 | |
P1V8_SSD_DRAM_SW | Default | d | 0.397 | |
P1V8_SSD_FMC_SW | Default | d | 0.366 | |
P1VS0SW_EN_RC | Default | d | 0.570 | |
P1VS4_ILIM_HS | Default | d | 0.485 | |
P1VS4_PHASE | Default | d | 0.056 | |
P1VS4_PHASE | Default | r | 55.000R | |
P1VS4_SW | Default | d | 0.054 | |
P1VS4_SW | Default | r | 54.000R | |
P1VS4_VBST | Default | d | 0.591 | |
P1VS4_VBST_R | Default | d | 0.590 | |
P1VSUS_PGOOD | Default | d | 0.472 | |
P3V3G3H_AGND | Default | d | 0.000 | |
P3V3G3H_BIAS | Default | d | 0.544 | |
P3V3G3H_FB_R | Default | d | 1.211 | |
P3V3G3H_LX | Default | d | 0.350 | |
P3V3G3H_VBST_R | Default | d | 0.592 | |
P3V3GPU_EN | Default | d | 0.564 | |
P3V3GPU_RAMP | Default | d | 0.627 | |
P3V3S0_CAP | Default | d | 0.575 | |
P3V3S5_RF | Default | d | 0.591 | |
P3V3S5_VFB2_R | Default | d | 0.380 | |
P3V3S5_VSW | Default | d | 0.383 | |
P3V3_TBT_T_SX_EN_R | Default | d | 0.740 | |
P3V3_TBT_T_SX_EN_R | Default | r | 0.095R | |
P3V3_TBT_T_SX_EN_R | Default | v | 3.300 | |
P3V3_TBT_X_SX_EN_R | Default | d | 0.710 | |
P3V3_TBT_X_SX_EN_R | Default | v | 3.300 | |
P5VGPU_RAMP | Default | d | OL | |
P5VS0_VBST_R | Default | d | 0.635 | |
P5VS4_COMP1 | Default | d | 0.750 | |
P5VS4_COMP1_R | Default | d | OL | |
P5VS4_DRVH | Default | d | 0.979 | |
P5VS4_PGOOD | Default | d | 0.460 | |
P5VS4_VFB1_R | Default | d | 0.424 | |
P5VS4_VSW | Default | d | 0.426 | |
P5VUSBCT_AGND | Default | d | 0.001 | |
P5VUSBCT_BOOT_RC | Default | d | 0.601 | |
P5VUSBCT_DRVH | Default | d | 0.676 | |
P5VUSBCT_DRVH_R | Default | d | 0.676 | |
P5VUSBCT_DRVL | Default | d | 0.453 | |
P5VUSBCT_FSEL | Default | d | 0.545 | |
P5VUSBCT_LL | Default | d | 0.211 | |
P5VUSBCT_N | Default | d | 0.211 | |
P5VUSBCT_OCSET | Default | d | 0.539 | |
P5VUSBCT_P | Default | d | 0.211 | |
P5VUSBCT_R | Default | d | 0.211 | |
P5VUSBCT_RTN_DIV | Default | d | 0.541 | |
P5VUSBCT_RTN_DIV_R | Default | d | 0.001 | |
P5VUSBCT_SENSE_DIV_R | Default | d | 0.210 | |
P5VUSBCT_SET0 | Default | d | 0.544 | |
P5VUSBCT_SET1 | Default | d | 0.543 | |
P5VUSBCT_SET_R | Default | d | OL | |
P5VUSBCT_VBST | Default | d | 0.599 | |
P5VUSBCT_VO | Default | d | 0.538 | |
P5VUSBCX_LL | Default | d | 0.164 | |
P5VUSBCX_N | Default | d | 0.164 | |
P5VUSBCX_P | Default | d | 0.164 | |
P5VUSBCX_R | Default | d | 0.164 | |
P5VUSBCX_RTN_DIV_R | Default | d | 0.001 | |
P5VUSBCX_SENSE_DIV_R | Default | d | 0.165 | |
P5_S0GPU_PGOOD | Default | d | 0.650 | |
PANEL_FET_EN_DLY | Default | d | 0.708 | |
PANEL_P3V3_EN_D | Default | d | 0.754 | |
PANEL_P5V_EN_D | Default | d | 1.046 | |
PBUSVSENS_EN_L | Default | d | 0.487 | |
PBUSVSENS_EN_L_DIV | Default | d | OL | |
PBUS_S0_VSENSE | Default | d | OL | |
PBUS_S0_VSENSE_IN | Default | d | 0.451 | |
PCC_COMP_OUT | Default | d | OL | |
PCC_COMP_OUT_BASE | Default | d | OL | |
PCC_POT_LEVEL | Default | d | OL | |
PCC_POT_LEVEL_D | Default | d | OL | |
PCC_POT_LEVEL_R | Default | d | OL | |
PCC_POT_REF | Default | d | OL | |
PCC_POT_RH | Default | d | OL | |
PCC_POT_RL | Default | d | OL | |
PCC_POT_WP | Default | d | OL | |
PCH_BT_UART_D2R | Default | d | 0.445 | |
PCH_BT_UART_R2D | Default | d | 0.417 | |
PCH_BT_UART_RTS_L | Default | d | 0.418 | |
PCH_CPU_TRIGGER | Default | d | 0.537 | |
PCH_CPU_TRIGGER_R | Default | d | 0.514 | |
PCH_DDPB_CTRLDATA | Default | d | 0.779 | |
PCH_DDPC_CTRLDATA | Default | d | 0.778 | |
PCH_DIFFCLK_BIASREF | Default | d | 0.786 | |
PCH_DISPA_BCLK | Default | d | 0.460 | |
PCH_DISPA_SDI | Default | d | 0.358 | |
PCH_DISPA_SDO | Default | d | 0.457 | |
PCH_DISPA_SDO_R | Default | d | 0.463 | |
PCH_JTAGX | Default | d | 0.056 | |
PCH_PCIE_RCOMPN | Default | d | 0.387 | |
PCH_PCIE_RCOMPP | Default | d | 0.390 | |
PCH_PROCPWRGD | Default | d | 0.472 | |
PCH_SOC_DBELL_L | Default | d | 0.474 | |
PCH_SOC_DFU_STATUS | Default | d | 0.537 | |
PCH_SOC_FORCE_DFU | Default | d | 0.475 | |
PCH_SOC_WDOG | Default | d | 0.538 | |
PCH_SRTCRST_L | Default | d | 0.821 | |
PCH_STRP_TOPBLK_SWP_L | Default | d | 0.560 | |
PCH_SWD_IO | Default | d | 0.669 | |
PCH_SWD_MUX_SEL | Default | d | 0.597 | |
PCIE_WAKE_L | Default | d | 0.512 | |
PDCINVSENS_EN_L_DIV | Default | d | OL | |
PLT_RST_L | Default | d | 0.353 | |
PLT_RST_L_BUF | Default | d | 0.616 | |
PMIC_SLAVEADDR | Default | d | 0.489 | |
PMIC_VDCSNS | Default | d | 0.001 | |
PMU_SOC_UWAKE_L | Default | d | 0.567 | |
PMU_TO_SOC_AWAKE_PWRGD | Default | d | 0.446 | |
PMU_TO_SOC_RESET_L | Default | d | 0.447 | |
PMU_TO_SOC_SLEEP1_PWRGD | Default | d | 0.448 | |
PMU_TO_SOC_SYS_ALIVE | Default | d | 0.475 | |
PMU_VDD_RTC | Default | d | 0.361 | |
PMU_VREF | Default | d | 0.555 | |
PM_ALL_GPU_PGOOD | Default | d | 0.526 | |
PM_BATLOW_L | Default | d | 0.528 | |
PM_DSW_PWRGD | Default | d | 0.744 | |
PM_EN_P3V3_G3H | Default | d | 0.600 | |
PM_EN_P3V3_G3H | Default | r | 0.350R | |
PM_EN_P3V3_G3H | Default | v | 3.300 | |
PM_EN_P3V3_G3H_R | Default | d | 0.600 | |
PM_EN_P3V3_G3H_R | Default | r | 0.350R | |
PM_EN_P3V3_G3H_R | Default | v | 3.300 | |
PM_EN_PVXS5 | Default | d | 0.517 | |
PM_MEMVTT_EN | Default | d | 0.375 | |
PM_PCH_PWROK | Default | d | 0.452 | |
PM_PCH_SYS_PWROK | Default | d | 0.454 | |
PM_PWRBTN_L | Default | d | 0.713 | |
PM_RSMRST_L | Default | d | 0.449 | |
PM_SLP_S0S3_L | Default | d | 0.507 | |
PM_SLP_S0_L | Default | d | 0.461 | |
PM_SLP_S3_L | Default | d | 0.440 | |
PM_SLP_S4_L | Default | d | 0.456 | |
PM_SLP_S5_L | Default | d | 0.484 | |
PM_SLP_SUS_L | Default | d | 0.464 | |
PM_SYNC | Default | d | 0.544 | |
PM_SYSRST_L | Default | d | 0.727 | |
PM_THRMTRIP_L | Default | d | 0.257 | |
PM_THRMTRIP_L_R | Default | d | 0.459 | |
PP0V6_S0_DDRVTT | Default | d | 0.136 | |
PP0V6_S3_MEM_VREFCA_A | Default | d | 0.690 | |
PP0V6_S3_MEM_VREFDQ_A | Default | d | 0.751 | |
PP0V6_S3_MEM_VREFDQ_B | Default | d | 0.746 | |
PP0V6_SLEEP1_BUCK0 | Default | d | 0.365 | |
PP0V6_SLEEP2_LDO0 | Default | d | 0.383 | |
PP0V8_SLEEP1_SW1 | Default | d | 0.151 | |
PP0V8_SLEEP2_BUCK1 | Default | d | 0.222 | |
PP0V9_TBT_T_CIO | Default | d | 0.409 | |
PP0V9_TBT_T_DP | Default | d | 0.339 | |
PP0V9_TBT_T_LVR | Default | d | 0.297 | |
PP0V9_TBT_T_PCIE | Default | d | 0.320 | |
PP0V9_TBT_T_SVR | Default | d | 0.251 | |
PP0V9_TBT_T_USB | Default | d | 0.424 | |
PP0V9_TBT_X_CIO | Default | d | 0.347 | |
PP0V9_TBT_X_DP | Default | d | 0.289 | |
PP0V9_TBT_X_LVR | Default | d | 0.249 | |
PP0V9_TBT_X_PCIE | Default | d | 0.273 | |
PP0V9_TBT_X_SVR | Default | d | 0.223 | |
PP0V9_TBT_X_USB | Default | d | 0.362 | |
PP12V_SSD_VPP | Default | d | 0.455 | |
PP16V0_MESA | Default | d | 0.743 | |
PP16V0_MESA_CONN | Default | d | 0.655 | |
PP1V0_S0SW | Default | d | 0.214 | |
PP1V0_S3 | Default | d | 0.213 | |
PP1V0_SSD_CORE | Default | d | 0.338 | |
PP1V0_SSD_CORE_L12 | Default | d | 0.272 | |
PP1V0_SUS | Default | d | 0.056 | |
PP1V0_SUS | Default | r | 55.300R | |
PP1V1_SLEEP1_SW2 | Default | d | 0.367 | |
PP1V1_SLEEP3_BUCK2 | Default | d | 0.303 | |
PP1V1_SSD_LVDS | Default | d | 0.357 | |
PP1V1_SSD_PCIE | Default | d | 0.351 | |
PP1V1_UPC_TA_LDO_BMC | Default | d | 0.527 | |
PP1V1_UPC_TA_LDO_BMC | Default | r | 0.145R | |
PP1V1_UPC_TA_LDO_BMC | Default | v | 1.100 | |
PP1V1_UPC_TB_LDO_BMC | Default | d | 0.528 | |
PP1V1_UPC_TB_LDO_BMC | Default | r | 0.147R | |
PP1V1_UPC_TB_LDO_BMC | Default | v | 1.100 | |
PP1V1_UPC_XA_LDO_BMC | Default | d | 0.525 | |
PP1V1_UPC_XA_LDO_BMC | Default | r | 0.145R | |
PP1V1_UPC_XA_LDO_BMC | Default | v | 1.100 | |
PP1V1_UPC_XB_LDO_BMC | Default | d | 0.512 | |
PP1V1_UPC_XB_LDO_BMC | Default | r | 0.143R | |
PP1V1_UPC_XB_LDO_BMC | Default | v | 1.100 | |
PP1V25_PMICVREF | Default | d | 0.480 | |
PP1V2_S0SW | Default | d | 0.219 | |
PP1V2_S3 | Default | d | 0.223 | |
PP1V2_S3_CPUDDR | Default | d | 0.221 | |
PP1V2_S3_REG_R | Default | d | 0.224 | |
PP1V2_S5_SMC_VDDC | Default | d | 0.499 | |
PP1V2_S5_SMC_VDDC | Default | r | 0.018R | |
PP1V2_S5_SMC_VDDC | Default | v | 1.200 | |
PP1V2_SSD_DRAM | Default | d | 0.303 | |
PP1V2_SSD_DRAM_L12 | Default | d | 0.524 | |
PP1V5R1V35_GPU_REG_R | Default | d | 0.053 | |
PP1V5R1V35_GPU_REG_R | Default | r | 52.400R | |
PP1V5R1V35_S0_GPU_IC | Default | d | 0.231 | |
PP1V5R1V35_S0_GPU_MEM | Default | d | 0.053 | |
PP1V5R1V35_S0_GPU_MEM | Default | r | 52.400R | |
PP1V8_ALWAYS_LDO9 | Default | d | 0.398 | |
PP1V8_AWAKE_SW3C | Default | d | 0.350 | |
PP1V8_GPU | Default | d | 0.188 | |
PP1V8_GPU_TSVDD | Default | d | 0.188 | |
PP1V8_MESA | Default | d | 0.556 | |
PP1V8_MESA_CONN | Default | d | 0.617 | |
PP1V8_S0 | Default | d | 0.357 | |
PP1V8_S0SW_DFR | Default | d | 0.552 | |
PP1V8_S0_GPU | Default | d | 0.188 | |
PP1V8_S0_GPU_LC_IC | Default | d | 0.188 | |
PP1V8_S0_LDO_AUD | Default | d | 0.480 | |
PP1V8_S0_PCH_VCCHDA_F | Default | d | 0.342 | |
PP1V8_S3 | Default | d | 0.352 | |
PP1V8_S3 | Default | r | 0.900R | |
PP1V8_S3_MEM | Default | d | 0.352 | |
PP1V8_S3_MEM | Default | r | 0.900R | |
PP1V8_S4 | Default | d | 0.426 | |
PP1V8_SLEEP2_LPPLL_FILT | Default | d | 0.626 | |
PP1V8_SLEEP2_SW3A | Default | d | 0.425 | |
PP1V8_SLEEP3_BUCK3 | Default | d | 0.405 | |
PP1V8_SSD_DRAM | Default | d | 0.397 | |
PP1V8_SSD_DRAM_L12 | Default | d | 0.579 | |
PP1V8_SSD_FMC | Default | d | 0.366 | |
PP1V8_SSD_LVDS | Default | d | 0.401 | |
PP1V8_SSD_OSC | Default | d | 0.398 | |
PP1V8_SSD_PLL0 | Default | d | 0.579 | |
PP1V8_SSD_PLL1 | Default | d | 0.579 | |
PP1V8_SSD_PLL2 | Default | d | 0.579 | |
PP1V8_SSD_PLL23 | Default | d | 0.410 | |
PP1V8_SSD_PLL3 | Default | d | 0.579 | |
PP1V8_SUS | Default | d | 0.441 | |
PP1V8_SUS_REG_R | Default | d | 0.441 | |
PP1V8_UPC_TA_LDOA | Default | d | 0.575 | |
PP1V8_UPC_TA_LDOA | Default | r | 0.194R | |
PP1V8_UPC_TA_LDOA | Default | v | 1.800 | |
PP1V8_UPC_TA_LDOD | Default | d | 0.514 | |
PP1V8_UPC_TA_LDOD | Default | r | 0.276R | |
PP1V8_UPC_TA_LDOD | Default | v | 1.800 | |
PP1V8_UPC_TB_LDOA | Default | d | 0.572 | |
PP1V8_UPC_TB_LDOA | Default | r | 0.198R | |
PP1V8_UPC_TB_LDOA | Default | v | 1.800 | |
PP1V8_UPC_TB_LDOD | Default | d | 0.520 | |
PP1V8_UPC_TB_LDOD | Default | r | 0.280R | |
PP1V8_UPC_TB_LDOD | Default | v | 1.800 | |
PP1V8_UPC_XA_LDOA | Default | d | 0.532 | |
PP1V8_UPC_XA_LDOA | Default | r | 0.193R | |
PP1V8_UPC_XA_LDOA | Default | v | 1.800 | |
PP1V8_UPC_XA_LDOD | Default | d | 0.494 | |
PP1V8_UPC_XA_LDOD | Default | r | 0.276R | |
PP1V8_UPC_XA_LDOD | Default | v | 1.800 | |
PP1V8_UPC_XB_LDOA | Default | d | 0.519 | |
PP1V8_UPC_XB_LDOA | Default | r | 0.180R | |
PP1V8_UPC_XB_LDOA | Default | v | 1.800 | |
PP1V8_UPC_XB_LDOD | Default | d | 0.483 | |
PP1V8_UPC_XB_LDOD | Default | r | 0.270R | |
PP1V8_UPC_XB_LDOD | Default | v | 1.800 | |
PP1V_PCH_REG_R | Default | d | 0.056 | |
PP1V_PCH_REG_R | Default | r | 55.000R | |
PP1V_S5_PCH_DCPDSW | Default | d | 0.328 | |
PP1V_SUSSW_PCH_VCCAMPHYPLL_F | Default | d | 0.056 | |
PP1V_SUSSW_PCH_VCCAMPHYPLL_F | Default | r | 55.300R | |
PP1V_SUS_PCH_VCCCLK5_F | Default | d | 0.056 | |
PP1V_SUS_PCH_VCCCLK5_F | Default | r | 55.300R | |
PP1V_SUS_PCH_VCCHDAPLL_F | Default | d | 0.056 | |
PP1V_SUS_PCH_VCCHDAPLL_F | Default | r | 55.300R | |
PP1V_SUS_PCH_VCCUSB2HDAPLL_F | Default | d | 0.056 | |
PP1V_SUS_PCH_VCCUSB2HDAPLL_F | Default | r | 55.300R | |
PP20V_USBC_TA_VBUS | Default | d | 0.153 | |
PP20V_USBC_TA_VBUS | Default | r | 0.001R | |
PP20V_USBC_TA_VBUS | Default | v | 5.000 | |
PP20V_USBC_TA_VBUS_CONN | Default | d | 0.171 | |
PP20V_USBC_TA_VBUS_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
PP20V_USBC_TA_VBUS_F | Default | d | 0.153 | |
PP20V_USBC_TA_VBUS_F | Default | r | 0.001R | |
PP20V_USBC_TA_VBUS_F | Default | v | 5.000 | |
PP20V_USBC_TB_VBUS | Default | d | 0.152 | |
PP20V_USBC_TB_VBUS | Default | r | 0.001R | |
PP20V_USBC_TB_VBUS | Default | v | 5.000 | |
PP20V_USBC_TB_VBUS_CONN | Default | d | 0.170 | |
PP20V_USBC_TB_VBUS_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
PP20V_USBC_TB_VBUS_F | Default | d | 0.152 | |
PP20V_USBC_TB_VBUS_F | Default | r | 0.001R | |
PP20V_USBC_TB_VBUS_F | Default | v | 5.000 | |
PP20V_USBC_XA_VBUS | Default | d | 0.156 | |
PP20V_USBC_XA_VBUS | Default | r | 0.001R | |
PP20V_USBC_XA_VBUS | Default | v | 5.000 | |
PP20V_USBC_XA_VBUS_CONN | Default | d | 0.153 | |
PP20V_USBC_XA_VBUS_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
PP20V_USBC_XA_VBUS_F | Default | d | 0.156 | |
PP20V_USBC_XA_VBUS_F | Default | r | 0.001R | |
PP20V_USBC_XA_VBUS_F | Default | v | 5.000 | |
PP20V_USBC_XB_VBUS | Default | d | 0.143 | |
PP20V_USBC_XB_VBUS | Default | r | 0.001R | |
PP20V_USBC_XB_VBUS | Default | v | 5.000 | |
PP20V_USBC_XB_VBUS_CONN | Default | d | 0.143 | |
PP20V_USBC_XB_VBUS_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
PP20V_USBC_XB_VBUS_F | Default | d | 0.143 | |
PP20V_USBC_XB_VBUS_F | Default | r | 0.001R | |
PP20V_USBC_XB_VBUS_F | Default | v | 5.000 | |
PP2V5_ADC1_VREF | Default | d | OL | |
PP2V5_ADC2_VREF | Default | d | OL | |
PP2V9_SYSCLK | Default | d | 0.451 | |
PP3V0_AWAKE_LDO7 | Default | d | 0.547 | |
PP3V0_G3H | Default | d | 0.453 | |
PP3V0_MESA | Default | d | 0.592 | |
PP3V0_MESA_CONN | Default | d | 0.654 | |
PP3V0_S5_AVREF_SMC | Default | d | 0.578 | |
PP3V0_S5_AVREF_SMC | Default | r | 0.311R | |
PP3V0_S5_AVREF_SMC | Default | v | 3.000 | |
PP3V3_G3H | Default | d | 0.367 | |
PP3V3_G3H | Default | r | 0.003R | |
PP3V3_G3H | Default | v | 3.300 | |
PP3V3_G3H_REG_R | Default | d | 0.349 | |
PP3V3_PMICLDO | Default | d | 0.413 | |
PP3V3_S0 | Default | d | 0.326 | |
PP3V3_S0SW_DFR | Default | d | 0.567 | |
PP3V3_S0SW_LCD | Default | d | 0.566 | |
PP3V3_S0SW_LCD_R | Default | d | 0.566 | |
PP3V3_S0_AUD_F | Default | d | 0.345 | |
PP3V3_S0_DPMUX_UC_R | Default | d | 0.325 | |
PP3V3_S0_GPU | Default | d | 0.538 | |
PP3V3_S0_GPUTHMSNS_R | Default | d | 0.418 | |
PP3V3_S0_LEFT | Default | d | 0.355 | |
PP3V3_S0_TBTTHMSNS_T_R | Default | d | 0.392 | |
PP3V3_S0_TBTTHMSNS_X_R | Default | d | 0.401 | |
PP3V3_S3_DPMUX_UC_R | Default | d | 0.329 | |
PP3V3_S4 | Default | d | 0.328 | |
PP3V3_S4SW_SNS | Default | d | 0.569 | |
PP3V3_S4SW_SNS_FET_R | Default | d | 0.542 | |
PP3V3_S4_BT | Default | d | 0.328 | |
PP3V3_S4_MESA_SW | Default | d | 0.424 | |
PP3V3_S4_SOC_PMU | Default | d | 0.330 | |
PP3V3_S4_T151 | Default | d | 0.424 | |
PP3V3_S4_TPAD | Default | d | 0.320 | |
PP3V3_S4_WLAN | Default | d | 0.328 | |
PP3V3_S4_WLAN_SW | Default | d | 0.351 | |
PP3V3_S5 | Default | d | 0.383 | |
PP3V3_S5_POLARIS | Default | d | 0.379 | |
PP3V3_S5_SMC_VDDA | Default | d | 0.349 | |
PP3V3_S5_T139 | Default | d | 0.383 | |
PP3V3_S5_TBT_T_SW | Default | d | 0.478 | |
PP3V3_S5_TBT_X_SW | Default | d | 0.464 | |
PP3V3_SSD_ISNS_R | Default | d | 0.402 | |
PP3V3_SSD_LIM | Default | d | 0.402 | |
PP3V3_SSD_NAND | Default | d | 0.409 | |
PP3V3_SSD_PMIC_AVIN | Default | d | 0.402 | |
PP3V3_SUS | Default | d | 0.365 | |
PP3V3_TBT_T_ANA_PCIE | Default | d | 0.532 | |
PP3V3_TBT_T_ANA_USB2 | Default | d | 0.517 | |
PP3V3_TBT_T_F | Default | d | 0.326 | |
PP3V3_TBT_T_LC | Default | d | 0.554 | |
PP3V3_TBT_T_S0 | Default | d | 0.326 | |
PP3V3_TBT_X_ANA_PCIE | Default | d | 0.511 | |
PP3V3_TBT_X_ANA_USB2 | Default | d | 0.486 | |
PP3V3_TBT_X_F | Default | d | 0.355 | |
PP3V3_TBT_X_LC | Default | d | 0.510 | |
PP3V3_TBT_X_S0 | Default | d | 0.355 | |
PP3V3_UPC_TA_LDO | Default | d | 0.530 | |
PP3V3_UPC_TA_LDO | Default | r | 0.036R | |
PP3V3_UPC_TA_LDO | Default | v | 3.300 | |
PP3V3_UPC_TB_LDO | Default | d | 0.547 | |
PP3V3_UPC_TB_LDO | Default | r | 0.037R | |
PP3V3_UPC_TB_LDO | Default | v | 3.300 | |
PP3V3_UPC_XA_LDO | Default | d | 0.512 | |
PP3V3_UPC_XA_LDO | Default | r | 0.036R | |
PP3V3_UPC_XA_LDO | Default | v | 3.300 | |
PP3V3_UPC_XB_LDO | Default | d | 0.513 | |
PP3V3_UPC_XB_LDO | Default | r | 0.035R | |
PP3V3_UPC_XB_LDO | Default | v | 3.300 | |
PP3V3_VREF_PCC | Default | d | OL | |
PP5V_COREVR_VCC | Default | d | 0.425 | |
PP5V_EADC1_AVDD | Default | d | OL | |
PP5V_EADC2_AVDD | Default | d | OL | |
PP5V_PMICLDO | Default | d | 0.457 | |
PP5V_PMICLDO_R | Default | d | 0.458 | |
PP5V_S0 | Default | d | 0.421 | |
PP5V_S0GPU_P1V35_GPU | Default | d | 0.413 | |
PP5V_S0SW_LCD | Default | d | 0.568 | |
PP5V_S0_ALSCAM_F | Default | d | 0.421 | |
PP5V_S0_BKLT_A | Default | d | 0.412 | |
PP5V_S0_BKLT_D | Default | d | OL | |
PP5V_S0_FAN_CONN | Default | d | 0.411 | |
PP5V_S0_GFXIMVP_VDD | Default | d | 0.412 | |
PP5V_S0_GFXIMVP_VDDP | Default | d | 0.411 | |
PP5V_S0_GPUFET | Default | d | OL | |
PP5V_S0_GPU_OPAMP | Default | d | OL | |
PP5V_S0_KBD | Default | d | 0.432 | |
PP5V_S0_T139 | Default | d | 0.412 | |
PP5V_S4 | Default | d | 0.426 | |
PP5V_S4_ISNS_D | Default | d | OL | |
PP5V_S4_TPAD_CONN | Default | d | 0.421 | |
PP5V_S4_T_USBC | Default | d | 0.211 | |
PP5V_S4_X_USBC | Default | d | 0.164 | |
PP5V_S5 | Default | d | 0.473 | |
PP5V_USBCT_VCC | Default | d | 0.427 | |
PP5V_USBCX_VCC | Default | d | 0.428 | |
PP5V_VREF_PCC | Default | d | OL | |
PPBUS_G3H | Default | d | 0.450 | |
PPBUS_G3H | Default | r | 0.115R | |
PPBUS_G3H | Default | v | 13.100 | |
PPBUS_G3H_R | Default | d | 0.428 | |
PPBUS_HS_CPU | Default | d | 0.450 | |
PPBUS_HS_CPU | Default | r | 0.115R | |
PPBUS_HS_CPU | Default | v | 12.600 | |
PPBUS_HS_GPU | Default | d | 0.450 | |
PPBUS_HS_GPU | Default | r | 0.115R | |
PPBUS_HS_GPU | Default | v | 12.600 | |
PPBUS_HS_OTH3V3 | Default | d | 0.449 | |
PPBUS_HS_OTH5V | Default | d | 0.450 | |
PPBUS_PMIC | Default | d | 0.449 | |
PPBUS_S4_HS_TPAD | Default | d | 0.450 | |
PPDCIN_G3H | Default | d | 0.675 | |
PPDCIN_G3H | Default | r | 0.156R | |
PPDCIN_G3H | Default | v | 5.000 | |
PPDCIN_G3H_CHGR | Default | d | 0.539 | |
PPDCIN_G3H_CHGR | Default | v | 20.000 | |
PPDCIN_G3H_CHGR_R | Default | d | 0.538 | |
PPDCPRTC_PCH | Default | d | 0.684 | |
PPSVDD_STOCKHOLM | Default | d | 0.355 | |
PPVBAT_G3H_CHGR_R | Default | d | 0.450 | |
PPVBAT_G3H_CHGR_R | Default | r | 0.115R | |
PPVBAT_G3H_CHGR_R | Default | v | 13.100 | |
PPVBAT_G3H_CHGR_REG | Default | d | 0.450 | |
PPVBAT_G3H_CHGR_REG | Default | r | 0.115R | |
PPVBAT_G3H_CHGR_REG | Default | v | 13.100 | |
PPVBAT_G3H_CONN | Default | d | 0.639 | |
PPVBAT_G3H_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
PPVCCGT_CPU_PH1 | Default | d | 0.005 | |
PPVCCGT_CPU_PH1 | Default | r | 4.800R | |
PPVCCGT_CPU_PH2 | Default | d | 0.005 | |
PPVCCGT_CPU_PH2 | Default | r | 4.800R | |
PPVCCGT_S0_CPU | Default | d | 0.005 | |
PPVCCGT_S0_CPU | Default | r | 4.800R | |
PPVCCIO_S0_CPU | Default | d | 0.045 | |
PPVCCIO_S0_CPU | Default | r | 45.000R | |
PPVCCSA_CPU_R | Default | d | 0.014 | |
PPVCCSA_CPU_R | Default | r | 13.500R | |
PPVCCSA_S0_CPU | Default | d | 0.014 | |
PPVCCSA_S0_CPU | Default | r | 13.300R | |
PPVCC_CPU_PH1 | Default | d | 0.003 | |
PPVCC_CPU_PH1 | Default | r | 3.000R | |
PPVCC_CPU_PH2 | Default | d | 0.003 | |
PPVCC_CPU_PH2 | Default | r | 3.000R | |
PPVCC_CPU_PH3 | Default | d | 0.003 | |
PPVCC_CPU_PH3 | Default | r | 3.000R | |
PPVCC_S0_CPU | Default | d | 0.003 | |
PPVCC_S0_CPU | Default | r | 3.000R | |
PPVCORE_S0_GFX_PH1 | Default | d | 0.003 | |
PPVCORE_S0_GFX_PH1 | Default | r | 2.700R | |
PPVCORE_S0_GFX_PH2 | Default | d | 0.003 | |
PPVCORE_S0_GFX_PH2 | Default | r | 2.700R | |
PPVCORE_S0_GPU | Default | d | 0.003 | |
PPVCORE_S0_GPU | Default | r | 2.700R | |
PPVDDCI_S0_GPU | Default | d | 0.029 | |
PPVDDCI_S0_GPU | Default | r | 28.000R | |
PPVDD_STOCKHOLM | Default | d | 0.320 | |
PPVIN_G3H_P3V3G3H | Default | d | 0.545 | |
PPVIN_S0GPU_1V8_RC | Default | d | 0.456 | |
PPVIN_S0SW_LCDBKLT | Default | d | 0.879 | |
PPVIN_S0SW_LCDBKLT_FET | Default | d | 0.450 | |
PPVIN_S0SW_LCDBKLT_FET | Default | r | 0.115R | |
PPVIN_S0SW_LCDBKLT_FET | Default | v | 12.600 | |
PPVIN_S0SW_LCDBKLT_R | Default | d | 0.450 | |
PPVIN_S0SW_LCDBKLT_R | Default | r | 0.115R | |
PPVIN_S0SW_LCDBKLT_R | Default | v | 12.600 | |
PPVIN_S0_CPUVR_VIN | Default | d | 0.457 | |
PPVIN_S0_GFXIMVP_VIN | Default | d | 0.448 | |
PPVIN_S4_TPAD_FUSE | Default | d | 0.450 | |
PPVIN_SUS_VR5_R | Default | d | 0.449 | |
PPVIN_SW_LCDBKLT_SW | Default | d | 0.879 | |
PPVOUT_S0_LCDBKLT | Default | d | 1.228 | |
PP_STOCKHOLM_TVDD | Default | d | 0.374 | |
PP_STOCKHOLM_VMID | Default | d | 0.571 | |
PROG1_CPUCOREVR | Default | d | 0.626 | |
PROG2_CPUCOREVR | Default | d | 0.622 | |
PROG3_CPUCOREVR | Default | d | 0.625 | |
PROG4_CPUCOREVR | Default | d | 0.627 | |
PVCCCGT_PH1_AGND | Default | d | 0.004 | |
PVCCCORE_PH3_VCC | Default | d | 0.413 | |
PVCCIO_PGOOD | Default | d | 0.472 | |
PVCCIO_PHASE | Default | d | 0.045 | |
PVCCIO_PHASE | Default | r | 45.000R | |
PVCCIO_VBST_R | Default | d | 0.588 | |
PVDDCI_PGOOD | Default | d | 0.573 | |
PVTT_FB | Default | d | 0.146 | |
REG_BOOT_GPU_VDDCI_RC | Default | d | 0.491 | |
REG_GPU_VDDCI_COMP | Default | d | 0.597 | |
REG_GPU_VDDCI_FB | Default | d | 0.490 | |
REG_GPU_VDDCI_FB_R | Default | d | OL | |
REG_GPU_VDDCI_VSEN_C | Default | d | OL | |
REG_GPU_VDDCI_VSUMN | Default | d | 0.029 | |
REG_GPU_VDDCI_VSUMN | Default | r | 28.000R | |
REG_GPU_VDDCI_VSUMP | Default | d | 0.029 | |
REG_GPU_VDDCI_VSUMP | Default | r | 28.000R | |
REG_PHASE_1V8GPU | Default | d | 0.188 | |
RTC_RESET_L | Default | d | 0.807 | |
S5_PWRGD | Default | d | 0.497 | |
SA_ISUMN_R | Default | d | 1.027 | |
SEP_I2C_SCL | Default | d | 0.471 | |
SEP_I2C_SDA | Default | d | 0.469 | |
SMBUS_PCH_CLK | Default | d | 0.759 | |
SMBUS_PCH_DATA | Default | d | 0.760 | |
SMBUS_SMC_0_S0_SCL | Default | d | 0.741 | |
SMBUS_SMC_0_S0_SDA | Default | d | 0.750 | |
SMBUS_SMC_1_S0_SCL | Default | d | 0.576 | |
SMBUS_SMC_1_S0_SDA | Default | d | 0.570 | |
SMBUS_SMC_2_S4_SCL | Default | d | 0.530 | |
SMBUS_SMC_2_S4_SDA | Default | d | 0.530 | |
SMBUS_SMC_3_SCL | Default | d | 0.520 | |
SMBUS_SMC_3_SDA | Default | d | 0.504 | |
SMBUS_SMC_4_G3H_SCL | Default | d | 0.670 | |
SMBUS_SMC_4_G3H_SCL | Default | r | 0.004R | |
SMBUS_SMC_4_G3H_SCL | Default | v | 3.300 | |
SMBUS_SMC_4_G3H_SDA | Default | d | 0.670 | |
SMBUS_SMC_4_G3H_SDA | Default | r | 0.021R | |
SMBUS_SMC_4_G3H_SDA | Default | v | 3.300 | |
SMBUS_SMC_5_G3_SCL | Default | d | 0.437 | |
SMBUS_SMC_5_G3_SDA | Default | d | 0.420 | |
SMC_4FINGERS_RST | Default | d | 0.614 | |
SMC_ACTUATOR_DISABLE_L | Default | d | 0.737 | |
SMC_ADAPTER_EN | Default | d | 0.735 | |
SMC_BC_ACOK | Default | d | 0.608 | |
SMC_BT_PWR_EN | Default | d | 0.716 | |
SMC_CHGR_INT_L | Default | d | 0.607 | |
SMC_CLK12M_EN | Default | d | 0.476 | |
SMC_CLK32K | Default | d | 0.605 | |
SMC_CPUDDR_ISENSE | Default | d | 0.751 | |
SMC_CPUGT_IMON_ISENSE | Default | d | 0.738 | |
SMC_CPUGT_ISENSE | Default | d | 0.732 | |
SMC_CPUSA_ISENSE | Default | d | 0.731 | |
SMC_CPUSA_VSENSE | Default | d | 0.724 | |
SMC_CPU_HI_ISENSE | Default | d | 0.730 | |
SMC_CPU_IMON_ISENSE | Default | d | 0.733 | |
SMC_DCIN_VSENSE | Default | d | 0.726 | |
SMC_DDR1V2_ISENSE | Default | d | 0.733 | |
SMC_DEBUGPRT2_R_RX | Default | d | 0.735 | |
SMC_DEBUGPRT2_R_TX | Default | d | 0.747 | |
SMC_DEBUGPRT_RX_L | Default | d | 0.718 | |
SMC_DEBUGPRT_TX_L | Default | d | 0.717 | |
SMC_DELAYED_PWRGD | Default | d | 0.735 | |
SMC_DEV_SUPPLY_R_L | Default | d | 0.738 | |
SMC_FAN_0_CTL | Default | d | 0.748 | |
SMC_FAN_0_TACH | Default | d | 0.735 | |
SMC_FAN_1_CTL | Default | d | 0.750 | |
SMC_FAN_1_TACH | Default | d | 0.749 | |
SMC_GFX_OVERTEMP | Default | d | 0.614 | |
SMC_GFX_PWR_LEVEL_L | Default | d | 0.640 | |
SMC_GFX_SELF_THROTTLE | Default | d | 0.643 | |
SMC_GPU_HS_ISENSE | Default | d | 0.731 | |
SMC_GPU_VDDCI_ISENSE | Default | d | 0.699 | |
SMC_GPU_VDDCI_VSENSE | Default | d | 0.725 | |
SMC_LID | Default | d | 0.446 | |
SMC_LID | Default | v | 3.400 | |
SMC_LID_LEFT | Default | d | 0.701 | |
SMC_LID_LEFT_R | Default | d | 0.701 | |
SMC_LID_R | Default | d | 0.694 | |
SMC_LID_RIGHT | Default | d | 0.463 | |
SMC_LRESET_L | Default | d | 0.748 | |
SMC_LSOC_RST_L | Default | d | 0.737 | |
SMC_ONOFF_L | Default | d | 0.717 | |
SMC_OOB1_D2R_L | Default | d | 0.736 | |
SMC_OOB1_R2D_L | Default | d | 0.736 | |
SMC_PBUS_VSENSE | Default | d | 0.726 | |
SMC_PCH_SUSACK_L | Default | d | 0.740 | |
SMC_PCH_SUSWARN_L | Default | d | 0.570 | |
SMC_PECI_L | Default | d | 0.724 | |
SMC_PME_S4_DARK_L | Default | d | 0.536 | |
SMC_PME_S4_WAKE_L | Default | d | 0.736 | |
SMC_PMIC_INT_L | Default | d | 0.475 | |
SMC_PM_G2_EN | Default | d | 0.505 | |
SMC_PROCHOT | Default | d | 0.753 | |
SMC_PROCHOT_L | Default | d | 0.562 | |
SMC_RESET_L | Default | d | 0.709 | |
SMC_RST_L | Default | d | 0.615 | |
SMC_RST_L | Default | r | 0.340R | |
SMC_RST_L | Default | v | 3.300 | |
SMC_RUNTIME_SCI_L | Default | d | 0.583 | |
SMC_SENSOR_ALERT_L | Default | d | 0.545 | |
SMC_SENSOR_PWR_EN | Default | d | 0.596 | |
SMC_SOCPMU_RESET | Default | d | 0.545 | |
SMC_TCK | Default | d | 0.735 | |
SMC_TDI | Default | d | 0.735 | |
SMC_TDO | Default | d | 0.735 | |
SMC_THRMTRIP | Default | d | 0.750 | |
SMC_THRMTRIP_L | Default | d | 0.361 | |
SMC_TMS | Default | d | 0.736 | |
SMC_TOPBLK_SWP_L | Default | d | 0.674 | |
SMC_TPAD_ISENSE | Default | d | OL | |
SMC_USBC_INT_L | Default | d | 0.647 | |
SMC_VCCIO_CPU_DIV2 | Default | d | 0.751 | |
SMC_VIBE_L | Default | d | 0.748 | |
SMC_WAKE_L | Default | d | 0.734 | |
SMC_WAKE_SCI_L | Default | d | 0.568 | |
SMC_WIFI_PWR_EN | Default | d | 0.530 | |
SML_PCH_0_CLK | Default | d | 0.787 | |
SOC_AWAKE_REQ | Default | d | 0.467 | |
SOC_CLK_32K | Default | d | 0.439 | |
SOC_JTAG_SEL | Default | d | 0.474 | |
SOC_PANIC_L | Default | d | 0.519 | |
SOC_PMU_BUCK0_LX | Default | d | 0.365 | |
SOC_PMU_BUCK1_LX | Default | d | 0.222 | |
SOC_PMU_BUCK2_LX | Default | d | 0.303 | |
SOC_PMU_BUCK3_LX | Default | d | 0.405 | |
SOC_PMU_I2C_SCL | Default | d | 0.468 | |
SOC_PMU_I2C_SDA | Default | d | 0.468 | |
SOC_ROM_SPI_CLK_R | Default | d | 0.446 | |
SOC_ROM_SPI_MOSI_R | Default | d | 0.467 | |
SOC_SLEEP1_REQ | Default | d | 0.467 | |
SOC_SPI_BOOT_STATUS | Default | d | 0.477 | |
SOC_SWCLK | Default | d | 0.475 | |
SOC_SWCLK_DBG | Default | d | 0.508 | |
SOC_SWDIO | Default | d | 0.475 | |
SOC_SWDIO_DBG | Default | d | 0.508 | |
SOC_SWD_CLK | Default | d | 0.674 | |
SOC_TO_STOCKHOLM_DEV_WAKE | Default | d | 0.476 | |
SOC_TO_STOCKHOLM_DWLD_REQ | Default | d | 0.476 | |
SOC_UART_D2R | Default | d | 0.515 | |
SOC_UART_R2D | Default | d | 0.516 | |
SOC_USB_VBUS | Default | d | 0.766 | |
SPIROM_USE_MLB | Default | d | 0.700 | |
SPI_ALT_CLK | Default | d | 0.709 | |
SPI_ALT_CS_L | Default | d | 0.667 | |
SPI_ALT_IO0_MOSI | Default | d | 0.597 | |
SPI_ALT_IO1_MISO | Default | d | 0.569 | |
SPI_ALT_IO2_WP_L | Default | d | 0.564 | |
SPI_ALT_IO3_HOLD_L | Default | d | 0.588 | |
SPI_DESCRIPTOR_OVERRIDE | Default | d | 1.732 | |
SPI_DESCRIPTOR_OVERRIDE_L | Default | d | 0.752 | |
SPI_IO<2> | Default | d | 0.556 | |
SPI_MLBROM_CS_L | Default | d | 0.649 | |
SPI_MLB_CLK | Default | d | 0.696 | |
SPI_MLB_CS_L | Default | d | 0.665 | |
SPI_MLB_IO0_MOSI | Default | d | 0.700 | |
SPI_MLB_IO1_MISO | Default | d | 0.621 | |
SPI_MLB_IO2_WP_L | Default | d | 0.586 | |
SPI_MLB_IO3_HOLD_L | Default | d | 0.584 | |
SPI_MOSI_R | Default | d | 0.725 | |
SPI_MOSI_R_CONN | Default | d | 0.988 | |
SPKRAMP_R_SCLK | Default | d | 0.358 | |
SPKRAMP_TL_OUT_NEG | Default | d | 0.613 | |
SPKRAMP_TL_OUT_POS | Default | d | 0.613 | |
SPKRAMP_TR_OUT_NEG | Default | d | 0.598 | |
SPKRAMP_TR_OUT_POS | Default | d | 0.599 | |
SPKRAMP_WL_LRCLK | Default | d | 0.376 | |
SPKRAMP_WL_OUT_NEG | Default | d | 0.613 | |
SPKRAMP_WL_OUT_POS | Default | d | 0.613 | |
SPKRAMP_WL_SCLK | Default | d | 0.376 | |
SPKRAMP_WL_SDIN | Default | d | 0.376 | |
SPKRAMP_WR_LRCLK | Default | d | 0.358 | |
SPKRAMP_WR_OUT_NEG | Default | d | 0.599 | |
SPKRAMP_WR_OUT_POS | Default | d | 0.599 | |
SPKRAMP_WR_SCLK | Default | d | 0.358 | |
SPKRAMP_WR_SDIN | Default | d | 0.358 | |
SPKRCONN_TL_OUT_NEG | Default | d | 0.613 | |
SPKRCONN_TL_OUT_POS | Default | d | 0.613 | |
SPKRCONN_TR_OUT_NEG | Default | d | 0.598 | |
SPKRCONN_TR_OUT_POS | Default | d | 0.599 | |
SPKRCONN_WL_OUT_NEG | Default | d | 0.613 | |
SPKRCONN_WL_OUT_POS | Default | d | 0.613 | |
SPKRCONN_WR_OUT_NEG | Default | d | 0.599 | |
SPKRCONN_WR_OUT_POS | Default | d | 0.599 | |
SPKR_ID0 | Default | d | 0.757 | |
SPKR_ID0_NC | Default | d | 0.577 | |
SPROM_CLK | Default | d | 0.554 | |
SPROM_CS | Default | d | 0.567 | |
SPROM_DIN | Default | d | 0.588 | |
SPROM_DOUT | Default | d | 0.567 | |
SSD_3V3_SS | Default | d | 0.755 | |
SSD_BOOT_L | Default | d | 0.432 | |
SSD_BOOT_LB_L | Default | d | 0.458 | |
SSD_CLKREQ_L | Default | d | 0.767 | |
SSD_CLKREQ_LB_L | Default | d | 0.769 | |
SSD_DEBUGI2C_SEL_PCH | Default | d | 0.548 | |
SSD_DEBUG_I2C_CLK | Default | d | 0.673 | |
SSD_DEBUG_I2C_CLK_CONN | Default | d | 0.683 | |
SSD_DEBUG_I2C_DAT | Default | d | 0.672 | |
SSD_DEBUG_I2C_DAT_CONN | Default | d | 0.685 | |
SSD_DEBUG_MUX_OE | Default | d | 0.564 | |
SSD_FVREF0 | Default | d | 0.485 | |
SSD_GP0 | Default | d | 0.008 | |
SSD_GP10 | Default | d | 0.775 | |
SSD_GP12 | Default | d | 0.495 | |
SSD_GP8 | Default | d | 0.010 | |
SSD_GP9 | Default | d | 0.775 | |
SSD_I2C_CLK | Default | d | 0.547 | |
SSD_I2C_DAT | Default | d | 0.550 | |
SSD_NAND_FA_RDY | Default | d | 0.765 | |
SSD_NAND_FA_ZQ | Default | d | 0.251 | |
SSD_NAND_FD_RDY | Default | d | 0.660 | |
SSD_NAND_FE_RDY | Default | d | 0.621 | |
SSD_NAND_FF_RDY | Default | d | 0.578 | |
SSD_NAND_FG_RDY | Default | d | 0.583 | |
SSD_P3V3_NAND_CT | Default | d | 0.757 | |
SSD_PGOOD_L | Default | d | 0.559 | |
SSD_PMIC_LDO | Default | d | 0.497 | |
SSD_PWRCON0 | Default | d | 0.459 | |
SSD_PWRCON1_R0 | Default | d | 0.515 | |
SSD_PWRCON1_R1 | Default | d | 0.515 | |
SSD_PWRCON1_R2 | Default | d | 0.516 | |
SSD_PWRCON2 | Default | d | 0.450 | |
SSD_PWRCON3 | Default | d | 0.455 | |
SSD_PWR_EN | Default | d | 0.500 | |
SSD_PWR_LB_EN | Default | d | 0.499 | |
SSD_RESET_B_L | Default | d | 0.559 | |
SSD_RESET_L | Default | d | 0.449 | |
SSD_RESET_LB_L | Default | d | 0.469 | |
SSD_SVREF1 | Default | d | 0.765 | |
SSD_SZQ | Default | d | 0.250 | |
SSD_VREF_CA | Default | d | 0.790 | |
SSD_VREF_DQ | Default | d | 0.789 | |
SSD_ZQ0 | Default | d | 0.250 | |
SYSCLK_CLK32K_CAMERA_BT_AP | Default | d | 0.424 | |
SYS_DETECT_L | Default | d | OL | |
TBA_AUX_DET | Default | d | 0.621 | |
TBA_AUX_DET | Default | r | 0.195R | |
TBA_AUX_DET | Default | v | 5.000 | |
TBA_BGATE | Default | d | 0.634 | |
TBA_BOOT1_RC | Default | d | 0.575 | |
TBA_BOOT2_RC | Default | d | 0.571 | |
TBA_COMP | Default | d | 0.619 | |
TBA_CSI_P | Default | d | 0.539 | |
TBA_CSI_R_N | Default | d | 0.539 | |
TBA_CSI_R_N | Default | v | 20.000 | |
TBA_CSI_R_P | Default | d | 0.539 | |
TBA_CSI_R_P | Default | v | 20.000 | |
TBA_CSO_R_N | Default | d | 0.450 | |
TBA_CSO_R_N | Default | r | 0.115R | |
TBA_CSO_R_N | Default | v | 13.100 | |
TBA_CSO_R_P | Default | d | 0.450 | |
TBA_CSO_R_P | Default | r | 0.115R | |
TBA_CSO_R_P | Default | v | 13.100 | |
TBA_GATE_Q1 | Default | d | 0.864 | |
TBA_GATE_Q2 | Default | d | 0.476 | |
TBA_GATE_Q3 | Default | d | 0.477 | |
TBA_GATE_Q4 | Default | d | 0.865 | |
TBA_LX1 | Default | d | 0.408 | |
TBA_LX2 | Default | d | 0.409 | |
TBA_PHASE1 | Default | d | 0.357 | |
TBA_PHASE1 | Default | r | 0.120R | |
TBA_PHASE2 | Default | d | 0.357 | |
TBA_PHASE2 | Default | r | 0.120R | |
TBA_VDDA | Default | d | 0.451 | |
TBA_VDDA | Default | r | 0.030R | |
TBA_VDDA | Default | v | 5.000 | |
TBA_VDDP | Default | d | 0.449 | |
TBTTHMSNS_T_ALERT_L | Default | d | 0.582 | |
TBTTHMSNS_T_THM_L | Default | d | 0.602 | |
TBTTHMSNS_X_ALERT_L | Default | d | 0.533 | |
TBTTHMSNS_X_D1_N | Default | d | 0.001 | |
TBTTHMSNS_X_THM_L | Default | d | 0.592 | |
TBT_POC_RESET | Default | d | 0.575 | |
TBT_TB_LSTX | Default | d | 0.599 | |
TBT_T_CIO_PLUG_EVENT_L | Default | d | 0.596 | |
TBT_T_CIO_PWR_EN | Default | d | 0.588 | |
TBT_T_CLKREQ_L | Default | d | 0.599 | |
TBT_T_FORCE_PWR | Default | d | 0.598 | |
TBT_T_HDMI_DDC_CLK | Default | d | 0.602 | |
TBT_T_HDMI_DDC_DATA | Default | d | 0.602 | |
TBT_T_PCI_RESET_L | Default | d | 0.546 | |
TBT_T_ROM_HOLD_L | Default | d | 0.727 | |
TBT_T_ROM_WP_L | Default | d | 0.594 | |
TBT_T_SPI_CLK | Default | d | 0.574 | |
TBT_T_SPI_CLK_DBG | Default | d | 0.673 | |
TBT_T_SPI_CS_L | Default | d | 0.602 | |
TBT_T_SPI_MISO | Default | d | 0.622 | |
TBT_T_TMU_CLK_IN | Default | d | 0.559 | |
TBT_T_TMU_CLK_OUT | Default | d | 0.558 | |
TBT_T_USB_PWR_EN | Default | d | 0.590 | |
TBT_W_CLKREQ_L | Default | d | 0.789 | |
TBT_W_PCI_RESET_L | Default | d | 0.788 | |
TBT_XB_LSRX | Default | d | 0.575 | |
TBT_XB_LSTX | Default | d | 0.575 | |
TBT_X_CIO_PLUG_EVENT_L | Default | d | 0.569 | |
TBT_X_CIO_PWR_EN | Default | d | 0.566 | |
TBT_X_CLKREQ_L | Default | d | 0.575 | |
TBT_X_CLKREQ_L_R | Default | d | 0.775 | |
TBT_X_FORCE_PWR | Default | d | 0.575 | |
TBT_X_HDMI_DDC_CLK | Default | d | 0.573 | |
TBT_X_HDMI_DDC_DATA | Default | d | 0.575 | |
TBT_X_PCIE_BIAS | Default | d | 0.787 | |
TBT_X_PCI_RESET_L | Default | d | 0.533 | |
TBT_X_RBIAS | Default | d | 0.786 | |
TBT_X_ROM_HOLD_L | Default | d | 0.709 | |
TBT_X_ROM_WP_L | Default | d | 0.569 | |
TBT_X_RSENSE | Default | d | 0.001 | |
TBT_X_SPI_CLK | Default | d | 0.558 | |
TBT_X_SPI_CS_L | Default | d | 0.580 | |
TBT_X_SPI_MOSI | Default | d | 0.584 | |
TBT_X_TEST_EN | Default | d | 0.101 | |
TBT_X_TEST_PWR_GOOD | Default | d | 0.100 | |
TBT_X_TMU_CLK_IN | Default | d | 0.556 | |
TBT_X_TMU_CLK_OUT | Default | d | 0.552 | |
TBT_X_USB_PWR_EN | Default | d | 0.567 | |
TPAD_SPI_CLK | Default | d | 0.805 | |
TPAD_SPI_CLK_CONN | Default | d | 0.633 | |
TPAD_SPI_CS_L | Default | d | 0.642 | |
TPAD_SPI_CS_L_CONN | Default | d | 0.990 | |
TPAD_SPI_IF_EN | Default | d | 0.518 | |
TPAD_SPI_IF_EN_CONN | Default | d | 0.674 | |
TPAD_SPI_INT_L_CONN | Default | d | 0.673 | |
TPAD_SPI_MISO | Default | d | 0.589 | |
TPAD_SPI_MISO_R | Default | d | 0.777 | |
TPAD_SPI_MOSI | Default | d | 0.805 | |
TP_BMON_IOUT | Default | d | OL | |
TP_CARBON_INT1 | Default | d | OL | |
TP_CARBON_INT2 | Default | d | OL | |
TP_DPA_IG_HPD | Default | d | 0.652 | |
TP_DPMUX_UC_P60 | Default | d | 0.651 | |
TP_DPMUX_UC_P61 | Default | d | 0.651 | |
TP_EG_BKLT_PWM | Default | d | 0.358 | |
TP_J3300_P2 | Default | d | OL | |
TP_J3300_P56 | Default | d | OL | |
TP_JB500_P2 | Default | d | OL | |
TP_JB500_P56 | Default | d | OL | |
TP_PVDDCI_GPU_EN | Default | d | 0.644 | |
TP_Q3100_DRAIN | Default | d | 0.631 | |
TP_Q3200_DRAIN | Default | d | 0.628 | |
TP_QB300_DRAIN | Default | d | 0.640 | |
TP_QB400_DRAIN | Default | d | 0.639 | |
TP_SOC_CLKOUT | Default | d | 0.478 | |
TP_SOC_JTAG_TDI | Default | d | 0.475 | |
TP_SOC_JTAG_TDO | Default | d | 0.475 | |
TP_SOC_JTAG_TRST_L | Default | d | 0.477 | |
TP_SOC_TST_CKOUT | Default | d | 0.476 | |
TP_SYS_ONEWIRE | Default | d | 0.753 | |
TP_UPC_TA_DBG_UART_RX | Default | d | 0.791 | |
TP_UPC_TA_DBG_UART_TX | Default | d | 0.792 | |
TP_UPC_TA_SWD_CLK | Default | d | 0.751 | |
TP_UPC_TA_SWD_DATA | Default | d | 0.751 | |
TP_UPC_TB_DBG_UART_RX | Default | d | 0.800 | |
TP_UPC_TB_DBG_UART_TX | Default | d | 0.800 | |
TP_UPC_TB_SWD_CLK | Default | d | 0.767 | |
TP_UPC_TB_SWD_DATA | Default | d | 0.773 | |
TP_UPC_XA_SWD_CLK | Default | d | 0.749 | |
TP_UPC_XA_SWD_DATA | Default | d | 0.748 | |
TP_UPC_XB_DBG_UART_RX | Default | d | 0.773 | |
TP_UPC_XB_DBG_UART_TX | Default | d | 0.775 | |
TP_UPC_XB_SWD_CLK | Default | d | 0.749 | |
TP_UPC_XB_SWD_DATA | Default | d | 0.749 | |
UPC_TA_DBG2 | Default | d | 0.777 | |
UPC_TA_DBG3 | Default | d | 0.818 | |
UPC_TA_DBG4 | Default | d | 0.820 | |
UPC_TA_GATE1 | Default | d | 0.676 | |
UPC_TA_GATE1 | Default | r | 0.447R | |
UPC_TA_GATE2 | Default | d | 0.667 | |
UPC_TA_GATE2 | Default | r | 0.415R | |
UPC_TA_R_OSC | Default | d | 0.535 | |
UPC_TA_SPI_MISO | Default | d | 0.636 | |
UPC_TA_SS | Default | d | 0.534 | |
UPC_TB_GATE1 | Default | d | 0.675 | |
UPC_TB_GATE1 | Default | r | 0.444R | |
UPC_TB_GATE2 | Default | d | 0.666 | |
UPC_TB_R_OSC | Default | d | 0.570 | |
UPC_T_5V_EN | Default | d | 0.543 | |
UPC_T_SPI_CLK | Default | d | 0.600 | |
UPC_T_SPI_CS_L | Default | d | 0.620 | |
UPC_T_SPI_MISO | Default | d | 0.596 | |
UPC_T_SPI_MOSI | Default | d | 0.621 | |
UPC_XA_DBG_UART_RX | Default | d | 0.773 | |
UPC_XA_DBG_UART_TX | Default | d | 0.775 | |
UPC_XA_GATE1 | Default | d | 0.660 | |
UPC_XA_GATE1 | Default | r | 0.440R | |
UPC_XA_GATE1 | Default | v | 5.000 | |
UPC_XA_GATE2 | Default | d | 0.650 | |
UPC_XA_GATE2 | Default | r | 0.415R | |
UPC_XA_GATE2 | Default | v | 5.000 | |
UPC_XA_HPD_RX | Default | d | 0.001 | |
UPC_XA_R_OSC | Default | d | 0.533 | |
UPC_XA_UART_RX | Default | d | 0.765 | |
UPC_XB_GATE1 | Default | d | 0.660 | |
UPC_XB_GATE1 | Default | r | 0.445R | |
UPC_XB_GATE2 | Default | d | 0.651 | |
UPC_XB_GATE2 | Default | r | 0.419R | |
UPC_XB_R_OSC | Default | d | 0.517 | |
UPC_XB_SS | Default | d | 0.519 | |
UPC_X_5V_EN | Default | d | 0.543 | |
UPC_X_SPI_CLK | Default | d | 0.555 | |
UPC_X_SPI_CS_L | Default | d | 0.569 | |
UPC_X_SPI_MISO | Default | d | 0.571 | |
USB2_COMP | Default | d | 0.115 | |
USB2_ID | Default | d | 0.770 | |
USB2_VBUSSENSE | Default | d | 0.772 | |
USB3_TEST_D2R_N | Default | d | 0.380 | |
USB3_TEST_D2R_P | Default | d | 0.374 | |
USB3_TEST_R2D_N | Default | d | 0.366 | |
USB3_TEST_R2D_P | Default | d | 0.367 | |
USBC_TA_CC1 | Default | d | 0.611 | |
USBC_TA_CC1 | Default | r | 0.338R | |
USBC_TA_CC1 | Default | v | 0.600 | |
USBC_TA_CC2 | Default | d | 0.628 | |
USBC_TA_CC2 | Default | r | 0.338R | |
USBC_TA_CC2 | Default | v | 0.600 | |
USBC_TA_SBU1 | Default | d | 0.865 | |
USBC_TA_SBU2 | Default | d | 0.868 | |
USBC_TB_CC1 | Default | d | 0.630 | |
USBC_TB_CC1 | Default | r | 0.342R | |
USBC_TB_CC1 | Default | v | 0.600 | |
USBC_TB_CC2 | Default | d | 0.633 | |
USBC_TB_CC2 | Default | r | 0.342R | |
USBC_TB_CC2 | Default | v | 0.600 | |
USBC_TB_SBU1 | Default | d | 0.859 | |
USBC_TB_SBU2 | Default | d | 0.860 | |
USBC_T_RESET_L | Default | d | 0.736 | |
USBC_T_RESET_L_R | Default | d | 0.563 | |
USBC_XA_CC1 | Default | d | 0.607 | |
USBC_XA_CC1 | Default | r | 0.338R | |
USBC_XA_CC1 | Default | v | 0.600 | |
USBC_XA_CC2 | Default | d | 0.610 | |
USBC_XA_CC2 | Default | r | 0.338R | |
USBC_XA_CC2 | Default | v | 0.600 | |
USBC_XA_D2R_N<1> | Default | d | 0.327 | |
USBC_XA_D2R_N<2> | Default | d | 0.325 | |
USBC_XA_D2R_P<1> | Default | d | 0.327 | |
USBC_XA_D2R_P<2> | Default | d | 0.325 | |
USBC_XA_R2D_C_N<2> | Default | d | 0.350 | |
USBC_XA_R2D_C_P<2> | Default | d | 0.350 | |
USBC_XA_R2D_N<2> | Default | d | OL | |
USBC_XA_R2D_P<2> | Default | d | OL | |
USBC_XA_SBU1 | Default | d | 0.903 | |
USBC_XA_SBU2 | Default | d | 0.904 | |
USBC_XA_USB_DBG_TOP_N | Default | d | 0.858 | |
USBC_XA_USB_DBG_TOP_P | Default | d | OL | |
USBC_XB_CC1 | Default | d | 0.614 | |
USBC_XB_CC1 | Default | r | 0.345R | |
USBC_XB_CC1 | Default | v | 0.600 | |
USBC_XB_CC2 | Default | d | 0.616 | |
USBC_XB_CC2 | Default | r | 0.345R | |
USBC_XB_CC2 | Default | v | 0.600 | |
USBC_XB_D2R_N<1> | Default | d | 0.570 | |
USBC_XB_D2R_P<1> | Default | d | 0.570 | |
USBC_XB_R2D_N<1> | Default | d | OL | |
USBC_XB_R2D_P<1> | Default | d | OL | |
USBC_XB_SBU1 | Default | d | 0.864 | |
USBC_XB_SBU2 | Default | d | 0.862 | |
USBC_X_RESET_L | Default | d | 0.736 | |
USB_TEST_N | Default | d | 0.612 | |
USB_TEST_P | Default | d | 0.604 | |
VR0V9_IND_TBT_T | Default | d | 0.251 | |
VR0V9_IND_TBT_X | Default | d | 0.223 | |
VREF_AMP_TR | Default | d | 0.580 | |
VREF_AMP_WL | Default | d | 0.588 | |
VRVDDCI_R | Default | d | 0.029 | |
VRVDDCI_R | Default | r | 28.000R | |
VR_PHASE_GPU_VDDCI | Default | d | 0.029 | |
VR_PHASE_GPU_VDDCI | Default | r | 28.000R | |
WIFI_SROM_ORG | Default | d | OL | |
WLAN_1P2V_EN | Default | d | 0.580 | |
WLAN_JTAG_SEL | Default | d | 0.598 | |
WLAN_JTAG_TCK | Default | d | 0.554 | |
WLAN_JTAG_TDI | Default | d | 0.579 | |
WLAN_JTAG_TMS | Default | d | 0.590 | |
WLAN_JTAG_TRST_L | Default | d | 0.565 | |
WLAN_UART_RX | Default | d | 0.576 | |
WLAN_UART_TX | Default | d | 0.553 | |
XDP_BPM_L<0> | Default | d | 0.285 | |
XDP_BPM_L<1> | Default | d | 0.285 | |
XDP_BPM_L<2> | Default | d | 0.283 | |
XDP_BPM_L<3> | Default | d | 0.285 | |
XDP_CPU_PRDY_L | Default | d | 0.262 | |
XDP_CPU_PREQ_L | Default | d | 0.286 | |
XDP_CPU_PWRBTN_L | Default | d | 0.720 | |
XDP_CPU_TCK | Default | d | 0.052 | |
XDP_CPU_TCK | Default | r | 55.200R | |
XDP_CPU_TDI | Default | d | 0.241 | |
XDP_CPU_TDO | Default | d | 0.219 | |
XDP_CPU_TMS | Default | d | 0.242 | |
XDP_CPU_TRST_L | Default | d | 0.289 | |
XDP_DBRESET_L | Default | d | 0.716 | |
XDP_PCH_OBSDATA_A0 | Default | d | 0.841 | |
XDP_PCH_OBSDATA_A1 | Default | d | 0.866 | |
XDP_PCH_OBSDATA_A2 | Default | d | 0.868 | |
XDP_PCH_OBSDATA_A3 | Default | d | 0.866 | |
XDP_PCH_OBSDATA_B0 | Default | d | 0.865 | |
XDP_PCH_OBSDATA_B1 | Default | d | 0.865 | |
XDP_PCH_OBSDATA_B2 | Default | d | 0.842 | |
XDP_PCH_OBSDATA_B3 | Default | d | 0.842 | |
XDP_PCH_OBSDATA_C0 | Default | d | 0.832 | |
XDP_PCH_OBSDATA_C1 | Default | d | 0.805 | |
XDP_PCH_OBSDATA_C2 | Default | d | 0.830 | |
XDP_PCH_OBSDATA_C3 | Default | d | 0.833 | |
XDP_PCH_OBSDATA_D0 | Default | d | 0.875 | |
XDP_PCH_OBSDATA_D1 | Default | d | 0.836 | |
XDP_PCH_OBSDATA_D2 | Default | d | 0.841 | |
XDP_PCH_OBSDATA_D3 | Default | d | 0.841 | |
XDP_PCH_OBSFN_C0 | Default | d | 0.863 | |
XDP_PCH_OBSFN_C1 | Default | d | 0.841 | |
XDP_PCH_TCK | Default | d | 0.449 | |
XDP_PCH_TDI | Default | d | 0.239 | |
XDP_PCH_TDO | Default | d | 0.221 | |
XDP_PCH_TMS | Default | d | 0.288 | |
XDP_PCH_TRST_L | Default | d | 0.286 | |
XDP_PM_RSMRST_L | Default | d | 1.472 | |
XDP_PRESENT_CPU | Default | d | 1.284 | |
XDP_PRESENT_L | Default | d | 0.521 | |
Component values
- v = value (1uF, 410R)
- r = rating (25V)
- c = Manufacturer code
- p = Package (SOT23-5)
- m = misc
- s = status ('-' = no stuff )
Component | Type | Value |
C4227 |
s |
n |
C4300 |
s |
- |
R4307 |
s |
- |
R5275 |
s |
- |
R7090 |
p |
201 |
R7090 |
r |
1/20W |
R7090 |
v |
1K 5% |