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This data released under the ODbL licence.
laptops/apple/820-00928
Diagnostic solutions
- Rails
- Startup
- CD3215 5V to 20V
Power getting to the CD3215...
5V on [n:PP20V_USBC_XA_VBUS] at [p:F3000:1]
Basic CD3215 voltages + LDOs...
3V3 on [n:PP3V3_UPC_XA_LDO] at [p:C3108:1]
1V8 on [n:PP1V8_UPC_XA_LDOA] at [p:C3106:1]
1V8 on [n:PP1V8_UPC_XA_LDOD] at [p:C3105:1]
1V1 on [n:PP1V1_UPC_XA_LDO_BMC] at [p:C3104:1]
Open [p:Q3100] so power goes through to [n:PPDCIN_G3H]...
>5V on [n:UPC_XA_GATE1] at [p:Q3100:1]
>5V on [n:UPC_XA_GATE2] at [p:Q3100:4]
5V on [n:PPDCIN_G3H] at [p:CC773:1]
Power to the ISL [p:U7000] ...
(in) 5V on [n:TBA_VDDA] at [p:C7075:1]
(out) >=3V3 on [n:PM_EN_P3V3_G3H] at [p:R6921:1]
Getting [n:PP3V3_G3H] ...
3V3 on [n:PP3V3_G3H] at [p:L6900:1]
SMC rails...
1V2 on [n:PP1V2_S5_SMC_VDDC] at [p:C5012:1]
3V0 on [n:PP3V0_S5_AVREF_SMC] at [p:C5020:1]
~3V3 on [n:SMBUS_SMC_4_G3H_SCL at [p:R5321:2] (0V66 DM)
~3V3 on [n:SMBUS_SMC_4_G3H_SDA at [p:R5320:2] (0V66 DM)
USBC CC1/2...
0V8 on [n:USB_XA_CC1] at [p:C3113:1]
0V8 on [n:USB_XA_CC2] at [p:C3114:1]
20V switch over...
20V on [n:PP20V_USBC_XA_VBUS] at [p:F3000:1]
>20V on [n:UPC_XA_GATE1] at [p:Q3100:1]
>20V on [n:UPC_XA_GATE2] at [p:Q3100:4]
20V on [n:PPDCIN_G3H] at [p:CC773:1]
Final steps...
5V on [n:TBA_AUX_DET] at [p:C7016:1]
3V3 on [n:SMC_RST_L] at [p:R7090:1]
MOSFETS [p:Q7030] and [p:Q7040] should now be open and [p:U7000] should be generating [n:PPBUS_G3H]
- CD3215 LDOs
[p:U3100]
5V on [n:PP20V_USBC_XA_VBUS] at [p:F3000:1]
3V3 on [n:PP3V3_UPC_XA_LDO] at [p:C3108:1]
1V8 on [n:PP1V8_UPC_XA_LDOA] at [p:C3106:1]
1V8 on [n:PP1V8_UPC_XA_LDOD] at [p:C3105:1]
1V1 on [n:PP1V1_UPC_XA_LDO_BMC] at [p:C3104:1]
[p:U3200]
5V on [n:PP20V_USBC_XB_VBUS] at [p:F3001:1]
3V3 on [n:PP3V3_UPC_XB_LDO] at [p:C3208:1]
1V8 on [n:PP1V8_UPC_XB_LDOA] at [p:C3206:1]
1V8 on [n:PP1V8_UPC_XB_LDOD] at [p:C3205:1]
1V1 on [n:PP1V1_UPC_XB_LDO_BMC] at [p:C3204:1]
[p:UB300]
5V on [n:PP20V_USBC_TA_VBUS] at [p:FB200:1]
3V3 on [n:PP3V3_UPC_TA_LDO] at [p:CB308:1]
1V8 on [n:PP1V8_UPC_TA_LDOA] at [p:CB306:1]
1V8 on [n:PP1V8_UPC_TA_LDOD] at [p:CB305:1]
1V1 on [n:PP1V1_UPC_TA_LDO_BMC] at [p:CB304:1]
[p:UB400]
5V on [n:PP20V_USBC_TB_VBUS] at [p:FB201:1]
3V3 on [n:PP3V3_UPC_TB_LDO] at [p:CB408:1]
1V8 on [n:PP1V8_UPC_TB_LDOA] at [p:CB406:1]
1V8 on [n:PP1V8_UPC_TB_LDOD] at [p:CB405:1]
1V1 on [n:PP1V1_UPC_TB_LDO_BMC] at [p:CB404:1]
Network Diode/Volt/Res values
| Netname | Condition | Type | Value | Comment |
| 50_0_ANT | Default | d | OL | |
| 50_1_ANT | Default | d | OL | |
| 50_2_ANT | Default | d | OL | |
| 5VS4_VFB1_RR | Default | d | 0.630 | |
| 8409_ASP1_LRCLK | Default | d | 0.365 | |
| 8409_ASP1_LRCLK_R | Default | d | 0.360 | |
| 8409_ASP1_SCLK | Default | d | 0.366 | |
| 8409_ASP1_SCLK_R | Default | d | 0.367 | |
| 8409_ASP1_SDOUT | Default | d | 0.365 | |
| 8409_ASP1_SDOUT_R | Default | d | 0.366 | |
| 8409_ASP2_LRCLK | Default | d | 0.666 | |
| 8409_ASP2_LRCLK_R | Default | d | 0.666 | |
| 8409_ASP2_SCLK | Default | d | 0.550 | |
| 8409_ASP2_SCLK_R | Default | d | 0.553 | |
| 8409_ASP2_SDOUT | Default | d | 0.534 | |
| 8409_HDA_SDIN0_R | Default | d | 0.677 | |
| 8409_I2C_SCL | Default | d | 0.363 | |
| 8409_I2C_SDA | Default | d | 0.440 | |
| 8409_VA_PLL | Default | d | 0.611 | |
| ACT_GND | Default | d | 0.00 | |
| ADC1_REFCOMP | Default | d | OL | |
| AGND_P1V8GPU | Default | d | 0.000 | |
| ALL_SYS_PWRGD | Default | d | 0.475 | |
| ALS_SCL_I2C_1V8 | Default | d | 0.459 | |
| ALS_SDA_I2C_1V8 | Default | d | 0.457 | |
| ALS_SOC_UART_D2R | Default | d | 0.45 | |
| ALS_SOC_UART_R2D | Default | d | 0.45 | |
| AP_CLKREQ_L | Default | d | 0.589 | |
| AP_CLKREQ_L_R | Default | d | 0.765 | |
| AP_DEV_WAKE | Default | d | 0.780 | |
| AP_PCIE_WAKE_L | Default | d | 0.495 | |
| AP_RESET_CONN_L | Default | d | 0.570 | |
| AP_RESET_CONN_R_L | Default | d | OL | |
| AP_RESET_L | Default | d | 0.78 | |
| AP_S0IX_WAKE_L | Default | d | 0.52 | |
| AP_S0IX_WAKE_SEL | Default | d | 0.724 | |
| AUD_ASP1A_LRCLK | Default | d | 0.35 | |
| AUD_ASP1A_SCLK | Default | d | 0.35 | |
| AUD_ASP1A_SDOUT | Default | d | 0.359 | |
| AUD_ASP1B_LRCLK | Default | d | 0.355 | |
| AUD_ASP1B_SCLK | Default | d | 0.359 | |
| AUD_ASP1B_SDOUT | Default | d | 0.358 | |
| AUD_ASP2_LRCLK | Default | d | 0.627 | |
| AUD_ASP2_SCLK | Default | d | 0.510 | |
| AUD_ASP2_SDIN | Default | d | 0.665 | |
| AUD_ASP2_SDOUT | Default | d | 0.487 | |
| AUD_CODEC_INT_L | Default | d | 0.705 | |
| AUD_CODEC_RESET_L | Default | d | 0.715 | |
| AUD_CODEC_WAKE_L | Default | d | 0.713 | |
| AUD_CONN_HP_LEFT | Default | d | 0.566 | |
| AUD_CONN_HP_RIGHT | Default | d | 0.630 | |
| AUD_CONN_HP_SENSE_L | Default | d | OL | |
| AUD_CONN_HP_SENSE_R | Default | d | OL | |
| AUD_CONN_RING2 | Default | d | 0.000 | |
| AUD_CONN_RING2_XW | Default | d | 0.625 | |
| AUD_CONN_SLEEVE | Default | d | 0.000 | |
| AUD_CONN_SLEEVE_XW | Default | d | 0.631 | |
| AUD_CONN_TIP_SENSE | Default | d | OL | |
| AUD_HP_PORT_CH_GND | Default | d | 0.000 | |
| AUD_HP_PORT_L | Default | d | 0.670 | |
| AUD_HP_PORT_R | Default | d | 0.600 | |
| AUD_HP_PORT_US_GND | Default | d | 0.000 | |
| AUD_HP_SENSE_L | Default | d | OL | |
| AUD_HP_SENSE_R | Default | d | OL | |
| AUD_HS_MIC_N | Default | d | 0.630 | |
| AUD_HS_MIC_P | Default | d | 0.630 | |
| AUD_I2C_1A_SCL | Default | d | 0.34 | |
| AUD_I2C_1A_SDA | Default | d | 0.42 | |
| AUD_I2C_1B_SCL | Default | d | 0.354 | |
| AUD_I2C_1B_SDA | Default | d | 0.429 | |
| AUD_PWR_EN | Default | d | 0.531 | |
| AUD_RING_SENSE | Default | d | 0.000 | |
| AUD_SPI_CLK | Default | d | 0.780 | |
| AUD_SPI_CS_L | Default | d | 0.785 | |
| AUD_SPI_MISO | Default | d | 0.785 | |
| AUD_SPI_MOSI | Default | d | 0.768 | |
| AUD_SPKRAMP_INT_L | Default | d | 0.39 | |
| AUD_SPKRAMP_RESET_L | Default | d | 0.34 | |
| AUD_TIP_SENSE | Default | d | OL | |
| BB_FORCE_PWM | Default | d | 0.540 | |
| BKLT_EN_R | Default | d | 0.536 | |
| BKLT_PWM_KEYB | Default | d | 0.545 | |
| BKLT_PWM_MLB2TCON | Default | d | 0.63 | |
| BKLT_PWM_TCON2MLB | Default | d | 0.75 | |
| BKLT_SCL | Default | d | 0.537 | |
| BKLT_SD | Default | d | 0.593 | |
| BKLT_SDA | Default | d | 0.539 | |
| BKLT_SENSE_OUT | Default | d | 0.726 | |
| BMON_IOUT_D | Default | d | OL | |
| BT_I2S_CLK | Default | d | 0.610 | |
| BT_I2S_CLK_R | Default | d | 0.550 | |
| BT_I2S_D2R_R | Default | d | 0.600 | |
| BT_I2S_R2D | Default | d | 0.745 | |
| BT_I2S_R2D_R | Default | d | 0.550 | |
| BT_I2S_SYNC | Default | d | 0.612 | |
| BT_I2S_SYNC_R | Default | d | 0.550 | |
| BT_LOW_PWR_L | Default | d | 0.570 | |
| BT_PWRRST_L | Default | d | 0.780 | |
| BT_RX_ACTIVE | Default | d | 0.530 | |
| BT_SFLASH_CS_L | Default | d | 0.710 | |
| BT_SFLASH_HOLD_L | Default | d | 0.704 | |
| BT_SFLASH_WP_L | Default | d | 0.711 | |
| BT_SPI2_CSN | Default | d | 0.765 | |
| BT_SPI2_MISO | Default | d | 0.693 | |
| BT_TIMESTAMP | Default | d | 0.738 | |
| BT_UART_CTS_R2D_L | Default | d | 0.512 | |
| BT_UART_D2R | Default | d | 0.433 | |
| BT_UART_R2D | Default | d | 0.510 | |
| BT_UART_RTS_D2R_L | Default | d | 0.433 | |
| BUF_EDP_PANEL_PWR_EN | Default | d | 0.718 | |
| BUF_SMC_RESET_L | Default | d | 0.696 | |
| CAMERA_CLKREQ_L | Default | d | 0.780 | |
| CAMERA_PWR_EN | Default | d | 0.790 | |
| CARBON_CS | Default | d | OL | |
| CARBON_DEN | Default | d | OL | |
| CARBON_SA0 | Default | d | OL | |
| CARBON_SCL_R | Default | d | OL | |
| CARBON_SDA_R | Default | d | OL | |
| CHGR_AMON | Default | d | 0.61 | |
| CHGR_BMON | Default | d | 0.620 | |
| COMP_A_CPUCORE | Default | d | 0.61 | |
| COMP_A_CPUCORE_L | Default | d | OL | |
| COMP_B_CPUGT | Default | d | 0.61 | |
| COMP_B_CPUGT_L | Default | d | OL | |
| COMP_C_CPUSA | Default | d | 0.61 | |
| COMP_C_CPUSA_L | Default | d | OL | |
| CORE2_5G_CTL2_WLAN_JTAG_TDO | Default | d | 0.600 | |
| CORE_ISUMN_R | Default | d | 1.007 | |
| CPUCORE_BOOT1 | Default | d | 0.598 | |
| CPUCORE_BOOT2 | Default | d | 0.598 | |
| CPUCORE_BOOT3 | Default | d | 0.597 | |
| CPUCORE_BP1 | Default | d | 0.599 | |
| CPUCORE_BP2 | Default | d | 0.600 | |
| CPUCORE_BP3 | Default | d | 0.597 | |
| CPUCORE_ISEN1 | Default | d | 0.61 | |
| CPUCORE_ISEN2 | Default | d | 0.61 | |
| CPUCORE_ISEN3 | Default | d | 0.61 | |
| CPUCORE_ISNS1_N | Default | d | 0.003 | |
| CPUCORE_ISNS1_N | Default | r | 1.520R | |
| CPUCORE_ISNS1_N | Default | v | 1.500 | |
| CPUCORE_ISNS1_P | Default | d | 0.003 | |
| CPUCORE_ISNS1_P | Default | r | 1.520R | |
| CPUCORE_ISNS1_P | Default | v | 1.500 | |
| CPUCORE_ISNS2_N | Default | d | 0.003 | |
| CPUCORE_ISNS2_N | Default | v | 1.500 | |
| CPUCORE_ISNS2_P | Default | d | 0.003 | |
| CPUCORE_ISNS2_P | Default | v | 1.500 | |
| CPUCORE_ISNS3_N | Default | d | 0.003 | |
| CPUCORE_ISNS3_N | Default | r | 1.520R | |
| CPUCORE_ISNS3_N | Default | v | 1.500 | |
| CPUCORE_ISNS3_P | Default | d | 0.003 | |
| CPUCORE_ISNS3_P | Default | r | 1.520R | |
| CPUCORE_ISNS3_P | Default | v | 1.500 | |
| CPUCORE_ISUMN | Default | d | 0.003 | |
| CPUCORE_ISUMN_R | Default | d | 0.31 | |
| CPUCORE_ISUMP | Default | d | 0.28 | |
| CPUCORE_PHASE1 | Default | d | 0.003 | |
| CPUCORE_PHASE2 | Default | d | 0.003 | |
| CPUCORE_PHASE3 | Default | d | 0.004 | |
| CPUCORE_PROCHOT_R_L | Default | d | 0.50 | |
| CPUCORE_PSYS | Default | d | 0.61 | |
| CPUCORE_PWM1 | Default | d | 0.60 | |
| CPUCORE_PWM2 | Default | d | 0.60 | |
| CPUCORE_PWM3 | Default | d | 0.60 | |
| CPUCORE_SW1 | Default | d | 0.003 | |
| CPUCORE_SW1 | Default | r | 1.52R | |
| CPUCORE_SW1 | Default | v | 1.500 | |
| CPUCORE_SW1_SNUB | Default | d | OL | |
| CPUCORE_SW2 | Default | d | 0.003 | |
| CPUCORE_SW2 | Default | r | 1.52R | |
| CPUCORE_SW2 | Default | v | 1.500 | |
| CPUCORE_SW2_SNUB | Default | d | OL | |
| CPUCORE_SW3 | Default | d | 0.003 | |
| CPUCORE_SW3 | Default | r | 1.52R | |
| CPUCORE_SW3 | Default | v | 1.500 | |
| CPUCORE_VIDALERT_R_L | Default | d | 0.24 | |
| CPUCORE_VIDSCLK_R | Default | d | 0.26 | |
| CPUCORE_VIDSOUT_R | Default | d | 0.23 | |
| CPUGTVSENSE_IN | Default | d | 0.000 | |
| CPUGT_BOOT1 | Default | d | 0.604 | |
| CPUGT_BOOT2 | Default | d | 0.599 | |
| CPUGT_BP1 | Default | d | 0.604 | |
| CPUGT_BP2 | Default | d | 0.600 | |
| CPUGT_ISEN1 | Default | d | 0.61 | |
| CPUGT_ISEN2 | Default | d | 0.61 | |
| CPUGT_ISNS1_N | Default | d | 0.005 | |
| CPUGT_ISNS1_N | Default | v | 1.500 | |
| CPUGT_ISNS1_P | Default | d | 0.005 | |
| CPUGT_ISNS1_P | Default | v | 1.500 | |
| CPUGT_ISNS2_N | Default | d | 0.005 | |
| CPUGT_ISNS2_N | Default | r | 2.600R | |
| CPUGT_ISNS2_N | Default | v | 1.500 | |
| CPUGT_ISNS2_P | Default | d | 0.005 | |
| CPUGT_ISNS2_P | Default | r | 2.600R | |
| CPUGT_ISNS2_P | Default | v | 1.500 | |
| CPUGT_ISNS_R_N | Default | d | OL | |
| CPUGT_ISNS_R_P | Default | d | OL | |
| CPUGT_ISUMN | Default | d | 0.006 | |
| CPUGT_ISUMN_R | Default | d | 0.37 | |
| CPUGT_ISUMP | Default | d | 0.42 | |
| CPUGT_ISUM_IOUT | Default | d | OL | |
| CPUGT_PHASE1 | Default | d | 0.000 | |
| CPUGT_PHASE2 | Default | d | 0.005 | |
| CPUGT_SW1 | Default | d | 0.005 | |
| CPUGT_SW1 | Default | r | 2.60R | |
| CPUGT_SW1 | Default | v | 1.500 | |
| CPUGT_SW1_SNUB | Default | d | OL | |
| CPUGT_SW2 | Default | d | 0.005 | |
| CPUGT_SW2 | Default | r | 2.60R | |
| CPUGT_SW2 | Default | v | 1.500 | |
| CPUGT_SW2_SNUB | Default | d | OL | |
| CPUHI_COMP_FB | Default | d | OL | |
| CPUHI_COMP_OUT | Default | d | OL | |
| CPUHI_COMP_VREF | Default | d | OL | |
| CPUHI_IOUT | Default | d | 0.707 | |
| CPUHI_IOUT_R | Default | d | OL | |
| CPUSAVSENSE_IN | Default | d | 0.022 | |
| CPUSA_BOOTSA | Default | d | 0.600 | |
| CPUSA_BPSA | Default | d | 0.600 | |
| CPUSA_FCCM | Default | d | 0.611 | |
| CPUSA_ISNS_N | Default | d | 0.015 | |
| CPUSA_ISNS_N | Default | r | 7.690R | |
| CPUSA_ISNS_N | Default | v | 1.150 | |
| CPUSA_ISNS_P | Default | d | 0.015 | |
| CPUSA_ISNS_P | Default | r | 7.690R | |
| CPUSA_ISNS_P | Default | v | 1.150 | |
| CPUSA_ISUMN | Default | d | 0.016 | |
| CPUSA_ISUMN_R | Default | d | 0.42 | |
| CPUSA_ISUMP | Default | d | 0.55 | |
| CPUSA_PHASESA | Default | d | 0.011 | |
| CPUSA_SW_SNUB | Default | d | OL | |
| CPUTHMSNS_ADDR_SEL | Default | d | 0.628 | |
| CPUTHMSNS_ALERT_L | Default | d | 0.57 | |
| CPUTHMSNS_D1_N | Default | d | 0.62 | |
| CPUTHMSNS_D1_P | Default | d | 0.62 | |
| CPUTHMSNS_D2_N | Default | d | 0.639 | |
| CPUTHMSNS_D2_P | Default | d | 0.640 | |
| CPUTHMSNS_D3_N | Default | d | 0.637 | |
| CPUTHMSNS_D3_P | Default | d | 0.639 | |
| CPUTHMSNS_FILTER | Default | d | 0.428 | |
| CPUTHMSNS_THM_L | Default | d | 0.51 | |
| CPUVR_ISNS_N | Default | d | OL | |
| CPUVR_ISNS_P | Default | d | OL | |
| CPUVR_ISNS_R_N | Default | d | OL | |
| CPUVR_ISNS_R_P | Default | d | OL | |
| CPUVR_ISUM_IOUT | Default | d | OL | |
| CPUVR_PGOOD | Default | d | 0.50 | |
| CPUVR_SWSA | Default | d | 0.015 | |
| CPUVR_SWSA | Default | r | 7.69R | |
| CPUVR_SWSA | Default | v | 1.150 | |
| CPUVSENSE_IN | Default | d | 0.005 | |
| CPU_CATERR_L | Default | d | 0.246 | |
| CPU_CFG<0> | Default | d | 0.29 | |
| CPU_CFG<10> | Default | d | 0.29 | |
| CPU_CFG<11> | Default | d | 0.29 | |
| CPU_CFG<12> | Default | d | 0.29 | |
| CPU_CFG<16> | Default | d | 0.29 | |
| CPU_CFG<17> | Default | d | 0.29 | |
| CPU_CFG<18> | Default | d | 0.29 | |
| CPU_CFG<19> | Default | d | 0.29 | |
| CPU_CFG<1> | Default | d | 0.29 | |
| CPU_CFG<2> | Default | d | 0.298 | |
| CPU_CFG<3> | Default | d | 0.300 | |
| CPU_CFG<4> | Default | d | 0.280 | |
| CPU_CFG<5> | Default | d | 0.270 | |
| CPU_CFG<6> | Default | d | 0.280 | |
| CPU_CFG<7> | Default | d | 0.280 | |
| CPU_CFG<8> | Default | d | 0.29 | |
| CPU_CFG<9> | Default | d | 0.29 | |
| CPU_CFG_RCOMP | Default | d | 0.052 | |
| CPU_DC_B2_C1 | Default | d | OL | |
| CPU_DC_B38_C38 | Default | d | OL | |
| CPU_DC_BR1_BR2 | Default | d | 0.360 | |
| CPU_DC_BR2_BR1 | Default | d | OL | |
| CPU_DC_BR38_BT36 | Default | d | 0.001 | |
| CPU_DC_BT36_BR38 | Default | d | 0.001 | |
| CPU_DC_C1_B2 | Default | d | OL | |
| CPU_DC_C38_B38 | Default | d | OL | |
| CPU_DIMMA_VREFDQ | Default | d | 0.760 | |
| CPU_DIMMB_VREFDQ | Default | d | 0.760 | |
| CPU_DIMM_VREFCA | Default | d | 0.695 | |
| CPU_EDP_RCOMP | Default | d | 0.077 | |
| CPU_EOPIO_RCOMP | Default | d | 0.001 | |
| CPU_OPC_OPIO_RCOMP | Default | d | 0.001 | |
| CPU_OPC_OPIO_RCOMP_ED2 | Default | d | 0.001 | |
| CPU_PCH_PM_DOWN | Default | d | 0.310 | |
| CPU_PCH_PM_DOWN_R | Default | d | 0.300 | |
| CPU_PCH_TRIGGER | Default | d | 0.330 | |
| CPU_PCH_TRIGGER_R | Default | d | 0.300 | |
| CPU_PECI | Default | d | 0.339 | |
| CPU_PECI_R | Default | d | 0.318 | |
| CPU_PEG_RCOMP | Default | d | 0.075 | |
| CPU_PROCHOT_L | Default | d | 0.510 | |
| CPU_PROCHOT_R_L | Default | d | 0.300 | |
| CPU_PWRGD | Default | d | 0.445 | |
| CPU_RESET_L | Default | d | 0.449 | |
| CPU_SM_RCOMP<0> | Default | d | 0.200 | |
| CPU_SM_RCOMP<1> | Default | d | 0.130 | |
| CPU_SM_RCOMP<2> | Default | d | 0.175 | |
| CPU_VCCGTSENSE_N | Default | d | 0.003 | |
| CPU_VCCGTSENSE_P | Default | d | 0.006 | |
| CPU_VCCIOSENSE_N | Default | d | 0.005 | |
| CPU_VCCIOSENSE_P | Default | d | 0.047 | |
| CPU_VCCSASENSE_N | Default | d | 0.003 | |
| CPU_VCCSASENSE_P | Default | d | 0.017 | |
| CPU_VCCSENSE_N | Default | d | 0.003 | |
| CPU_VCCSENSE_P | Default | d | 0.005 | |
| CPU_VCCST_PWRGD | Default | d | 0.446 | |
| CPU_VIDALERT_L | Default | d | 0.286 | |
| CPU_VIDALERT_R_L | Default | d | 0.507 | |
| CPU_VIDSCLK | Default | d | 0.243 | |
| CPU_VIDSCLK_R | Default | d | 0.241 | |
| CPU_VIDSOUT | Default | d | 0.244 | |
| CPU_VIDSOUT_R | Default | d | 0.244 | |
| CPU_VR_EN_R | Default | d | 0.45 | |
| DBGLED_GPU | Default | d | OL | |
| DBGLED_GPU_D | Default | d | OL | |
| DBGLED_S0 | Default | d | OL | |
| DBGLED_S0I3 | Default | d | OL | |
| DBGLED_S0I3_D | Default | d | OL | |
| DBGLED_S0_D | Default | d | OL | |
| DBGLED_S3_D | Default | d | OL | |
| DBGLED_S4 | Default | d | OL | |
| DBGLED_S4_D | Default | d | OL | |
| DBGLED_S5 | Default | d | OL | |
| DCINVSENS_EN_L | Default | d | 0.52 | |
| DCIN_S5_VSENSE | Default | d | OL | |
| DDR0_PAR | Default | d | 0.288 | |
| DDR1_PAR | Default | d | 0.011 | |
| DEBUGUART_SEL_SOC | Default | d | 0.791 | |
| DFRDRV_I2C_SCL | Default | d | 0.490 | |
| DFRDRV_I2C_SDA | Default | d | 0.485 | |
| DFR_CLKIN_RESET_L | Default | d | 0.47 | |
| DFR_DISP_INT | Default | d | 0.487 | |
| DFR_DISP_PWR_EN | Default | d | 0.51 | |
| DFR_DISP_RESET_L | Default | d | 0.710 | |
| DFR_DISP_RST_L | Default | d | 0.470 | |
| DFR_DISP_SMC_RST_L | Default | d | 0.52 | |
| DFR_DISP_TE | Default | d | 0.490 | |
| DFR_DISP_VSYNC | Default | d | 0.47 | |
| DFR_TOUCH_GPIO2 | Default | d | 0.47 | |
| DFR_TOUCH_INT_L | Default | d | 0.47 | |
| DFR_TOUCH_LID | Default | d | 0.420 | |
| DFR_TOUCH_PANEL_DETECT | Default | d | 0.46 | |
| DFR_TOUCH_RESET_L | Default | d | 0.46 | |
| DFR_TOUCH_ROM_I2C_SCL | Default | d | 0.46 | |
| DFR_TOUCH_ROM_I2C_SDA | Default | d | 0.46 | |
| DFR_TOUCH_ROM_WC | Default | d | 0.46 | |
| DFR_TOUCH_SPI_CLK | Default | d | 0.470 | |
| DFR_TOUCH_SPI_CLK_R | Default | d | 0.46 | |
| DFR_TOUCH_SPI_CS_L | Default | d | 0.46 | |
| DFR_TOUCH_SPI_MISO | Default | d | 0.482 | |
| DFR_TOUCH_SPI_MISO_R | Default | d | 0.46 | |
| DFR_TOUCH_SPI_MOSI | Default | d | 0.470 | |
| DFR_TOUCH_SPI_MOSI_R | Default | d | 0.46 | |
| DFU_SPI_STATUS | Default | d | 0.486 | |
| DFU_STATUS | Default | d | 0.486 | |
| DMIC1_CLK | Default | d | 0.794 | |
| DMIC1_DATA | Default | d | 0.761 | |
| DMIC2_CLK | Default | d | 0.794 | |
| DMIC2_DATA | Default | d | 0.757 | |
| DPMUX_HPD_PD | Default | d | OL | |
| DPMUX_LRESET_L | Default | d | 0.583 | |
| DPMUX_UC_CLK32K | Default | d | 0.644 | |
| DPMUX_UC_EXTAL | Default | d | 0.623 | |
| DPMUX_UC_EXTAL_R | Default | d | OL | |
| DPMUX_UC_IRQ | Default | d | 0.611 | |
| DPMUX_UC_MD1 | Default | d | 0.609 | |
| DPMUX_UC_MD2 | Default | d | 0.521 | |
| DPMUX_UC_MD2_R | Default | d | 0.521 | |
| DPMUX_UC_MDCKN | Default | d | 0.622 | |
| DPMUX_UC_PECI | Default | d | 0.725 | |
| DPMUX_UC_PEVREF | Default | d | 0.450 | |
| DPMUX_UC_RESET_L | Default | d | 0.520 | |
| DPMUX_UC_RX | Default | d | 0.595 | |
| DPMUX_UC_TCK | Default | d | 0.637 | |
| DPMUX_UC_TDI | Default | d | 0.635 | |
| DPMUX_UC_TDO | Default | d | 0.638 | |
| DPMUX_UC_TMS | Default | d | 0.633 | |
| DPMUX_UC_TRST_L | Default | d | 0.638 | |
| DPMUX_UC_TX | Default | d | 0.590 | |
| DPMUX_UC_VCL | Default | d | 0.469 | |
| DPMUX_UC_XTAL | Default | d | 0.622 | |
| DPMUX_UC_XTAL_R | Default | d | OL | |
| DP_INT_EG_HPD | Default | d | 0.361 | |
| DP_INT_HPD | Default | d | 0.612 | |
| DP_INT_HPD_R | Default | d | 0.630 | |
| DP_INT_IG_HPD | Default | d | 0.550 | |
| DP_TA_AUXCH_C_N | Default | d | 0.396 | |
| DP_TA_AUXCH_C_P | Default | d | 0.420 | |
| DP_TA_AUXCH_N | Default | d | 0.813 | |
| DP_TA_AUXCH_P | Default | d | 0.814 | |
| DP_TA_HPD | Default | d | 0.588 | |
| DP_TB_AUXCH_C_N | Default | d | 0.400 | |
| DP_TB_AUXCH_C_P | Default | d | 0.429 | |
| DP_TB_AUXCH_N | Default | d | 0.812 | |
| DP_TB_AUXCH_P | Default | d | 0.815 | |
| DP_TB_HPD | Default | d | 0.607 | |
| DP_T_SNK0_DDC_CLK | Default | d | 0.607 | |
| DP_T_SNK0_DDC_DATA | Default | d | 0.600 | |
| DP_T_SNK0_HPD | Default | d | 0.580 | |
| DP_T_SNK0_HPD_EG | Default | d | 0.376 | |
| DP_T_SNK0_HPD_IG | Default | d | 0.587 | |
| DP_T_SNK1_DDC_CLK | Default | d | 0.605 | |
| DP_T_SNK1_DDC_DATA | Default | d | 0.590 | |
| DP_T_SNK1_HPD | Default | d | 0.580 | |
| DP_T_SNK1_HPD_EG | Default | d | 0.377 | |
| DP_T_SNK1_HPD_IG | Default | d | 0.567 | |
| DP_T_SNK_RBIAS | Default | d | 0.775 | |
| DP_T_SRC_HPD | Default | d | 0.607 | |
| DP_T_SRC_RBIAS | Default | d | 0.790 | |
| DP_XA_AUXCH_C_N | Default | d | 0.370 | |
| DP_XA_AUXCH_C_P | Default | d | 0.400 | |
| DP_XA_AUXCH_N | Default | d | 0.809 | |
| DP_XA_AUXCH_P | Default | d | 0.810 | |
| DP_XA_HPD | Default | d | 0.60 | |
| DP_XB_AUXCH_C_N | Default | d | 0.370 | |
| DP_XB_AUXCH_C_P | Default | d | 0.370 | |
| DP_XB_AUXCH_N | Default | d | 0.807 | |
| DP_XB_AUXCH_P | Default | d | 0.808 | |
| DP_XB_HPD | Default | d | 0.570 | |
| DP_X_SNK0_DDC_CLK | Default | d | 0.61 | |
| DP_X_SNK0_DDC_DATA | Default | d | 0.606 | |
| DP_X_SNK0_HPD | Default | d | 0.58 | |
| DP_X_SNK0_HPD_EG | Default | d | 0.377 | |
| DP_X_SNK0_HPD_IG | Default | d | 0.577 | |
| DP_X_SNK1_DDC_CLK | Default | d | 0.61 | |
| DP_X_SNK1_DDC_DATA | Default | d | 0.608 | |
| DP_X_SNK1_HPD | Default | d | 0.58 | |
| DP_X_SNK1_HPD_EG | Default | d | 0.378 | |
| DP_X_SNK1_HPD_IG | Default | d | 0.550 | |
| DP_X_SNK_RBIAS | Default | d | 0.778 | |
| DP_X_SRC_HPD | Default | d | 0.606 | |
| DP_X_SRC_RBIAS | Default | d | 0.796 | |
| EADC1_LCDBKLT_ISENSE | Default | d | OL | |
| EADC1_OTHER5V_HI_ISENSE | Default | d | OL | |
| EADC1_PP3V3S4_WLAN_ISENSE | Default | d | OL | |
| EADC1_PP5V_T139_ISENSE | Default | d | OL | |
| EADC1_TBT_T_ISENSE | Default | d | OL | |
| EADC1_TBT_X_ISENSE | Default | d | OL | |
| EDP_AUXCH_C_N | Default | d | 0.44 | |
| EDP_AUXCH_C_P | Default | d | 0.44 | |
| EDP_BKLT_EN | Default | d | 0.52 | |
| EDP_IG_BKLT_EN | Default | d | 0.640 | |
| EDP_IG_PANEL_PWR_EN | Default | d | 0.635 | |
| EDP_INT_ML_N<0> | Default | d | 0.38 | |
| EDP_INT_ML_N<1> | Default | d | 0.38 | |
| EDP_INT_ML_N<2> | Default | d | 0.38 | |
| EDP_INT_ML_N<3> | Default | d | 0.38 | |
| EDP_INT_ML_P<0> | Default | d | 0.38 | |
| EDP_INT_ML_P<1> | Default | d | 0.38 | |
| EDP_INT_ML_P<2> | Default | d | 0.38 | |
| EDP_INT_ML_P<3> | Default | d | 0.38 | |
| EDP_PANEL_PWR_EN | Default | d | 0.563 | |
| EG_BKLT_EN | Default | d | 0.377 | |
| EG_CLKREQ_OUT_L | Default | d | 0.507 | |
| EG_CLKREQ_PU | Default | d | 0.540 | |
| EG_CLKREQ_SEL_L | Default | d | 0.629 | |
| EG_LCD_PWR_EN | Default | d | 0.383 | |
| EG_PEG_CLK100M_N | Default | d | 0.373 | |
| EG_PEG_CLK100M_P | Default | d | 0.380 | |
| EG_RAIL1_EN | Default | d | 0.552 | |
| EG_RAIL2_EN | Default | d | 0.629 | |
| EG_RAIL3_EN | Default | d | 0.640 | |
| EG_RAIL4_EN | Default | d | 0.570 | |
| EG_RAIL5_EN | Default | d | 0.531 | |
| EG_RESET_L | Default | d | 0.544 | |
| ENETSD_CLKREQ_L | Default | d | 0.780 | |
| FAN_LT_PWM | Default | d | 0.886 | |
| FAN_LT_TACH | Default | d | OL | |
| FAN_RT_PWM | Default | d | 0.879 | |
| FAN_RT_TACH | Default | d | OL | |
| FBVDD_ALTVO | Default | d | 0.539 | |
| FB_A0_MF | Default | d | 0.122 | |
| FB_A0_SEN | Default | d | 0.121 | |
| FB_A0_VREFC | Default | d | 0.415 | |
| FB_A0_VREFD | Default | d | 0.76 | |
| FB_A0_ZQ | Default | d | 0.121 | |
| FB_A1_MF | Default | d | 0.121 | |
| FB_A1_SEN | Default | d | 0.121 | |
| FB_A1_VREFC | Default | d | 0.420 | |
| FB_A1_VREFD | Default | d | 0.756 | |
| FB_A1_ZQ | Default | d | 0.121 | |
| FB_A_CALR | Default | d | 0.390 | |
| FB_A_CORE_R | Default | d | 1.600 | |
| FB_A_CPUCORE | Default | d | 0.59 | |
| FB_A_CPUCORE_RC | Default | d | 1.167 | |
| FB_A_MVREFD | Default | d | 0.560 | |
| FB_A_RESET_L | Default | d | 0.400 | |
| FB_A_RESET_PIN_L | Default | d | 0.355 | |
| FB_A_RESET_R_L | Default | d | 0.365 | |
| FB_B0_MF | Default | d | 0.121 | |
| FB_B0_SEN | Default | d | 0.121 | |
| FB_B0_VREFC | Default | d | 0.420 | |
| FB_B0_VREFD | Default | d | 0.763 | |
| FB_B0_ZQ | Default | d | 0.122 | |
| FB_B1_MF | Default | d | 0.122 | |
| FB_B1_SEN | Default | d | 0.121 | |
| FB_B1_VREFC | Default | d | 0.420 | |
| FB_B1_VREFD | Default | d | 0.760 | |
| FB_B1_ZQ | Default | d | 0.121 | |
| FB_B_CPUGT | Default | d | 0.59 | |
| FB_B_CPUGT_RC | Default | d | 1.170 | |
| FB_B_GT_R | Default | d | 1.600 | |
| FB_CORE_R | Default | d | 0.005 | |
| FB_C_CPUSA | Default | d | 0.59 | |
| FB_C_CPUSA_RC | Default | d | 1.168 | |
| FB_C_SA_R | Default | d | 1.600 | |
| FB_GT_R | Default | d | 0.006 | |
| FB_SA_R | Default | d | 0.014 | |
| GFXIMVP_BOOT1 | Default | d | 0.443 | |
| GFXIMVP_BOOT1_R | Default | d | 0.466 | |
| GFXIMVP_BOOT2 | Default | d | 0.444 | |
| GFXIMVP_BOOT2_R | Default | d | 0.465 | |
| GFXIMVP_ISEN1 | Default | d | 0.596 | |
| GFXIMVP_ISEN2 | Default | d | 0.596 | |
| GFXIMVP_ISNS1_N | Default | d | 0.002 | |
| GFXIMVP_ISNS1_N | Default | r | 2.510R | |
| GFXIMVP_ISNS1_N | Default | v | 1.100 | |
| GFXIMVP_ISNS1_P | Default | d | 0.002 | |
| GFXIMVP_ISNS1_P | Default | r | 2.510R | |
| GFXIMVP_ISNS1_P | Default | v | 1.100 | |
| GFXIMVP_ISNS2_N | Default | d | 0.002 | |
| GFXIMVP_ISNS2_N | Default | r | 2.510R | |
| GFXIMVP_ISNS2_N | Default | v | 1.100 | |
| GFXIMVP_ISNS2_P | Default | d | 0.002 | |
| GFXIMVP_ISNS2_P | Default | r | 2.510R | |
| GFXIMVP_ISNS2_P | Default | v | 1.100 | |
| GFXIMVP_ISNS_N | Default | d | OL | |
| GFXIMVP_ISNS_R_N | Default | d | OL | |
| GFXIMVP_ISNS_R_P | Default | d | OL | |
| GFXIMVP_ISUMN | Default | d | 0.002 | |
| GFXIMVP_ISUMN_R | Default | d | 0.510 | |
| GFXIMVP_ISUMP | Default | d | 0.470 | |
| GFXIMVP_ISUMP_C | Default | d | OL | |
| GFXIMVP_ISUM_IOUT | Default | d | OL | |
| GFXIMVP_PHASE1 | Default | d | 0.002 | |
| GFXIMVP_PHASE1 | Default | r | 2.510R | |
| GFXIMVP_PHASE1 | Default | v | 1.100 | |
| GFXIMVP_PHASE2 | Default | d | 0.002 | |
| GFXIMVP_PHASE2 | Default | r | 2.51R | |
| GFXIMVP_PHASE2 | Default | v | 1.100 | |
| GFXIMVP_Q1S1 | Default | d | 0.002 | |
| GFXIMVP_Q1S2 | Default | d | 0.002 | |
| GFX_SELF_THROTTLE | Default | d | 0.380 | |
| GFX_SELF_THROTTLE_R | Default | d | 0.379 | |
| GMUX_SLP_S3_BUF_L | Default | d | 0.520 | |
| GND | Default | d | - | |
| GND_5V3V3_AGND | Default | d | 0.00 | |
| GPUCOREVSENSE_IN | Default | d | 0.003 | |
| GPUFB_AGND | Default | d | 0.000 | |
| GPUFB_BOOT_RC | Default | d | 0.584 | |
| GPUFB_CS_N | Default | d | 0.060 | |
| GPUFB_CS_N | Default | r | 170.000 | |
| GPUFB_CS_N | Default | v | 1.500 | |
| GPUFB_CS_P | Default | d | 0.070 | |
| GPUFB_CS_P | Default | r | 170.000 | |
| GPUFB_CS_P | Default | v | 1.500 | |
| GPUFB_DRVH | Default | d | 0.613 | |
| GPUFB_DRVH_R | Default | d | 0.550 | |
| GPUFB_DRVL | Default | d | 0.445 | |
| GPUFB_FSEL | Default | d | 0.540 | |
| GPUFB_GPU_OCSET_R | Default | d | 0.070 | |
| GPUFB_GPU_VO_R | Default | d | 0.060 | |
| GPUFB_LL | Default | d | 0.172 | |
| GPUFB_LL | Default | r | 170.000 | |
| GPUFB_LL | Default | v | 1.500 | |
| GPUFB_OCSET | Default | d | 0.535 | |
| GPUFB_PGOOD | Default | d | 0.516 | |
| GPUFB_RTN_DIV | Default | d | 0.522 | |
| GPUFB_SENSE_DIV | Default | d | 0.523 | |
| GPUFB_SET0 | Default | d | 0.541 | |
| GPUFB_SET1 | Default | d | 0.560 | |
| GPUFB_SET_R | Default | d | 0.537 | |
| GPUFB_SREF | Default | d | 0.538 | |
| GPUFB_VBST | Default | d | 0.560 | |
| GPUFB_VO | Default | d | 0.535 | |
| GPUTHMSNS_D1_N | Default | d | 0.615 | |
| GPUTHMSNS_D1_P | Default | d | 0.649 | |
| GPUTHMSNS_D2_N | Default | d | 0.645 | |
| GPUTHMSNS_D2_P | Default | d | 0.650 | |
| GPUVCORE_COMP | Default | d | 0.582 | |
| GPUVCORE_COMP_C | Default | d | OL | |
| GPUVCORE_EN | Default | d | 0.569 | |
| GPUVCORE_FB | Default | d | 0.528 | |
| GPUVCORE_FB2 | Default | d | 0.593 | |
| GPUVCORE_FB_R | Default | d | OL | |
| GPUVCORE_NTC | Default | d | 0.605 | |
| GPUVCORE_PGOOD | Default | d | 0.545 | |
| GPUVCORE_SENSE_N | Default | d | 0.002 | |
| GPUVCORE_SENSE_P | Default | d | 0.003 | |
| GPUVCORE_SVC | Default | d | 0.604 | |
| GPUVCORE_SVC_R | Default | d | 0.420 | |
| GPUVCORE_SVD | Default | d | 0.449 | |
| GPUVCORE_SVD_R | Default | d | 0.420 | |
| GPUVCORE_SVT | Default | d | 0.414 | |
| GPUVCORE_SVT_R | Default | d | 0.435 | |
| GPUVCORE_VR_HOT_L | Default | d | 0.454 | |
| GPUVDDCIVSENSE_IN | Default | d | 0.025 | |
| GPU_ANALOGIO | Default | d | 0.715 | |
| GPU_AUD<0> | Default | d | 0.372 | |
| GPU_AUD<1> | Default | d | 0.370 | |
| GPU_AUD_PORT_CONN<0> | Default | d | 0.404 | |
| GPU_AUD_PORT_CONN<1> | Default | d | 0.403 | |
| GPU_AUD_PORT_CONN<2> | Default | d | 0.404 | |
| GPU_AUX_ZVSS | Default | d | 0.152 | |
| GPU_BIF_GEN3_EN_A | Default | d | 0.370 | |
| GPU_BP_0 | Default | d | 0.400 | |
| GPU_BP_1 | Default | d | 0.400 | |
| GPU_BRD_CFG<0> | Default | d | 0.404 | |
| GPU_BRD_CFG<1> | Default | d | 0.404 | |
| GPU_BRD_CFG<2> | Default | d | 0.405 | |
| GPU_CLKREQ_L | Default | d | 0.445 | |
| GPU_DBG_10 | Default | d | 0.410 | |
| GPU_DBG_11 | Default | d | 0.411 | |
| GPU_DBG_8 | Default | d | 0.411 | |
| GPU_DBG_9 | Default | d | 0.409 | |
| GPU_DIECRACKMON | Default | d | 0.001 | |
| GPU_FB_SNS_COMMON_NEG | Default | d | 0.001 | |
| GPU_FDO | Default | d | 0.370 | |
| GPU_GFX_OVERTEMP | Default | d | 0.614 | |
| GPU_GFX_PWR_LEVEL_L | Default | d | 0.391 | |
| GPU_GFX_PWR_LEVEL_R_L | Default | d | 0.391 | |
| GPU_GPIO_SVC | Default | d | 0.420 | |
| GPU_GPIO_SVC_R | Default | d | 0.416 | |
| GPU_GPIO_SVD | Default | d | 0.415 | |
| GPU_GPIO_SVD_R | Default | d | 0.411 | |
| GPU_JTAG_TCK | Default | d | 0.378 | |
| GPU_JTAG_TDI | Default | d | 0.378 | |
| GPU_JTAG_TDO | Default | d | 0.378 | |
| GPU_JTAG_TMS | Default | d | 0.376 | |
| GPU_JTAG_TRST_L | Default | d | 0.386 | |
| GPU_MPLS_PS_0 | Default | d | 0.410 | |
| GPU_MPLS_PS_1 | Default | d | 0.412 | |
| GPU_MPLS_PS_2 | Default | d | 0.409 | |
| GPU_MPLS_PS_3 | Default | d | 0.411 | |
| GPU_PCIE_ZVSS | Default | d | 0.203 | |
| GPU_PLLCHARZ_H | Default | d | 0.311 | |
| GPU_PLLCHARZ_L | Default | d | 0.320 | |
| GPU_PLLCHARZ_RC_H | Default | d | OL | |
| GPU_PLLCHARZ_RC_L | Default | d | OL | |
| GPU_RESET_R_L | Default | d | 0.540 | |
| GPU_ROM_CONFIG<0> | Default | d | 0.404 | |
| GPU_ROM_CONFIG<1> | Default | d | 0.380 | |
| GPU_ROM_CONFIG<2> | Default | d | 0.376 | |
| GPU_ROM_CS_L | Default | d | OL | |
| GPU_ROM_CS_L_R | Default | d | 0.370 | |
| GPU_ROM_SCLK | Default | d | OL | |
| GPU_ROM_SCLK_R | Default | d | 0.365 | |
| GPU_ROM_SI | Default | d | OL | |
| GPU_ROM_SI_R | Default | d | 0.371 | |
| GPU_ROM_SO | Default | d | 0.370 | |
| GPU_ROM_SO_R | Default | d | OL | |
| GPU_ROM_WP_L | Default | d | OL | |
| GPU_SMBUS_ADDR<0> | Default | d | 0.400 | |
| GPU_SMBUS_ADDR<1> | Default | d | 0.405 | |
| GPU_SMB_CLK | Default | d | 0.449 | |
| GPU_SMB_DAT | Default | d | 0.450 | |
| GPU_TEST_EN | Default | d | 0.802 | |
| GPU_TEST_PG | Default | d | 0.785 | |
| GPU_TEST_PG_BACON | Default | d | 0.803 | |
| GPU_TX_DEEMPH_EN | Default | d | 0.392 | |
| GPU_TX_HALF_SWING | Default | d | 0.385 | |
| GPU_VCORE_LOAD | Default | d | 0.003 | |
| GPU_VCORE_PCC | Default | d | 0.381 | |
| GPU_VCORE_SOURCE | Default | d | 0.003 | |
| GPU_VGA_DIS | Default | d | 0.374 | |
| GPU_VRAM_STRAP | Default | d | 0.377 | |
| GPU_XTAL_OR_CLK_IN | Default | d | 0.660 | |
| GPU_XTAL_OUT | Default | d | 0.530 | |
| GPU_XTAL_PU_OR_CAP | Default | d | 0.604 | |
| GPU_XTAL_PWR_OR_GND | Default | d | 0.213 | |
| GPU_XTAL_XTAL_OR_CLK | Default | d | 0.690 | |
| GT_ISUMN_R | Default | d | 1.010 | |
| HALL_SENSOR_LEFT | Default | d | 0.47 | |
| HALL_SENSOR_RIGHT | Default | d | 0.482 | |
| HDA_BIT_CLK | Default | d | 0.749 | |
| HDA_BIT_CLK | Default | v | -1.000 | |
| HDA_BIT_CLK_R | Default | d | 0.578 | |
| HDA_RST_L | Default | d | 0.748 | |
| HDA_RST_L | Default | v | 1.900 | |
| HDA_RST_R_L | Default | d | 0.580 | |
| HDA_SDIN0 | Default | d | 0.561 | |
| HDA_SDOUT | Default | d | 0.748 | |
| HDA_SDOUT_R | Default | d | 0.740 | |
| HDA_SYNC | Default | d | 0.748 | |
| HDA_SYNC_R | Default | d | 0.590 | |
| HPWR_EN_L | Default | d | 0.61 | |
| HS_MIC_N | Default | d | 0.723 | |
| HS_MIC_P | Default | d | 0.727 | |
| HS_OTHER3V3_IOUT | Default | d | OL | |
| HS_OTHER5V_IOUT | Default | d | OL | |
| I2C_ALS_SCL | Default | d | 0.54 | |
| I2C_ALS_SCL_R | Default | d | 0.490 | |
| I2C_ALS_SDA | Default | d | 0.54 | |
| I2C_ALS_SDA_R | Default | d | 0.490 | |
| I2C_BKLT_SCL | Default | d | 0.52 | |
| I2C_BKLT_SDA | Default | d | 0.52 | |
| I2C_CAM_SCL | Default | d | 0.483 | |
| I2C_CAM_SDA | Default | d | 0.46 | |
| I2C_DPMUX_UC_SCL | Default | d | 0.595 | |
| I2C_DPMUX_UC_SDA | Default | d | 0.595 | |
| I2C_GPU_PCC_SCL | Default | d | 0.457 | |
| I2C_GPU_PCC_SDA | Default | d | 0.457 | |
| I2C_SSD_SCL | Default | d | 0.660 | |
| I2C_SSD_SDA | Default | d | 0.664 | |
| I2C_TBT_TA_INT_L | Default | d | 0.599 | |
| I2C_TBT_TB_INT_L | Default | d | 0.596 | |
| I2C_TBT_T_SCL | Default | v | 0.600 | |
| I2C_TBT_T_SDA | Default | d | 0.601 | |
| I2C_TBT_XA_INT_L | Default | d | 0.60 | |
| I2C_TBT_XB_INT_L | Default | d | 0.599 | |
| I2C_TBT_X_SCL | Default | d | 0.598 | |
| I2C_TBT_X_SDA | Default | d | 0.59 | |
| I2C_UPC_TA_DBG_CTL_SCL | Default | d | 0.775 | |
| I2C_UPC_TA_DBG_CTL_SDA | Default | d | 0.521 | |
| I2C_UPC_TB_DBG_CTL_SCL | Default | d | 0.773 | |
| I2C_UPC_TB_DBG_CTL_SDA | Default | d | 0.774 | |
| I2C_UPC_T_SCL2 | Default | d | 0.68 | |
| I2C_UPC_T_SDA2 | Default | d | 0.68 | |
| I2C_UPC_XA_DBG_CTL_SCL | Default | d | 0.772 | |
| I2C_UPC_XA_DBG_CTL_SDA | Default | d | 0.771 | |
| I2C_UPC_XB_DBG_CTL_SCL | Default | d | 0.772 | |
| I2C_UPC_XB_DBG_CTL_SDA | Default | d | 0.771 | |
| I2C_UPC_X_SCL2 | Default | d | 0.68 | |
| I2C_UPC_X_SDA2 | Default | d | 0.68 | |
| IAPC_OPA_OUT | Default | d | OL | |
| IMON_A_CPUCORE | Default | d | 0.61 | |
| IMON_B_CPUGT | Default | d | 0.61 | |
| IMON_C_CPUSA | Default | d | 0.61 | |
| ISNS_1V0_N | Default | d | OL | |
| ISNS_1V0_P | Default | d | OL | |
| ISNS_1V8_SUS_N | Default | d | OL | |
| ISNS_1V8_SUS_P | Default | d | OL | |
| ISNS_BT_IOUT | Default | d | OL | |
| ISNS_BT_N | Default | d | OL | |
| ISNS_BT_P | Default | d | OL | |
| ISNS_CAMERA_IOUT | Default | d | OL | |
| ISNS_CAMERA_N | Default | d | OL | |
| ISNS_CAMERA_P | Default | d | OL | |
| ISNS_CPUDDR_IOUT | Default | d | OL | |
| ISNS_CPUDDR_N | Default | d | OL | |
| ISNS_CPUDDR_P | Default | d | OL | |
| ISNS_CPUHIGAIN_N | Default | d | 0.362 | |
| ISNS_CPUHIGAIN_OUT | Default | d | OL | |
| ISNS_CPUHIGAIN_OUT_R | Default | d | OL | |
| ISNS_CPUHIGAIN_P | Default | d | 0.362 | |
| ISNS_CPUHIGAIN_R_N | Default | d | 1.350 | |
| ISNS_CPUHIGAIN_R_P | Default | d | 0.384 | |
| ISNS_CPUSA_IOUT | Default | d | OL | |
| ISNS_DDR_IOUT | Default | d | OL | |
| ISNS_GPU1V8_IOUT | Default | d | OL | |
| ISNS_GPUFBIC_IOUT | Default | d | OL | |
| ISNS_GPUFB_IOUT | Default | d | OL | |
| ISNS_GPUVDDCI_IOUT | Default | d | OL | |
| ISNS_GPU_HS_IOUT | Default | d | 0.716 | |
| ISNS_GPU_HS_N | Default | d | 0.363 | |
| ISNS_GPU_HS_P | Default | d | 0.363 | |
| ISNS_HS_COMPUTING_N | Default | d | 0.360 | |
| ISNS_HS_COMPUTING_N | Default | v | 13.100 | |
| ISNS_HS_COMPUTING_P | Default | d | 0.360 | |
| ISNS_HS_COMPUTING_P | Default | v | 13.100 | |
| ISNS_HS_OTHER3V3_N | Default | d | OL | |
| ISNS_HS_OTHER3V3_P | Default | d | OL | |
| ISNS_HS_OTHER5V_N | Default | d | OL | |
| ISNS_HS_OTHER5V_P | Default | d | OL | |
| ISNS_LCDBKLT_IOUT | Default | d | OL | |
| ISNS_LCDBKLT_N | Default | d | 0.366 | |
| ISNS_LCDBKLT_N | Default | v | 13.100 | |
| ISNS_LCDBKLT_P | Default | d | 0.366 | |
| ISNS_LCDBKLT_P | Default | v | 13.100 | |
| ISNS_LCDPANEL_IOUT | Default | d | OL | |
| ISNS_LCDPANEL_N | Default | d | OL | |
| ISNS_LCDPANEL_P | Default | d | OL | |
| ISNS_LPDDR_IOUT | Default | d | OL | |
| ISNS_LPDDR_N | Default | d | OL | |
| ISNS_LPDDR_P | Default | d | OL | |
| ISNS_PP3V3S0_IOUT | Default | d | OL | |
| ISNS_PP3V3S4_WLAN_IOUT | Default | d | OL | |
| ISNS_PP3V3_TPAD_IOUT | Default | d | OL | |
| ISNS_PP3V3_TPAD_N | Default | d | OL | |
| ISNS_PP3V3_TPAD_P | Default | d | OL | |
| ISNS_PP5V_T139_IOUT | Default | d | OL | |
| ISNS_PP5V_T139_N | Default | d | OL | |
| ISNS_PP5V_T139_P | Default | d | OL | |
| ISNS_SSDNAND_IOUT | Default | d | OL | |
| ISNS_T139_N | Default | d | OL | |
| ISNS_T139_P | Default | d | OL | |
| ISNS_T151_IOUT | Default | d | OL | |
| ISNS_T151_N | Default | d | OL | |
| ISNS_T151_P | Default | d | OL | |
| ISNS_TBT_T_IOUT | Default | d | OL | |
| ISNS_TBT_T_N | Default | d | OL | |
| ISNS_TBT_T_P | Default | d | OL | |
| ISNS_TBT_X_IOUT | Default | d | OL | |
| ISNS_TBT_X_N | Default | d | OL | |
| ISNS_TBT_X_P | Default | d | OL | |
| ISNS_TPAD_N | Default | d | OL | |
| ISNS_TPAD_P | Default | d | OL | |
| ISNS_WLAN_N | Default | d | OL | |
| ISNS_WLAN_P | Default | d | OL | |
| ISNS_WLAN_R_N | Default | d | OL | |
| ISNS_WLAN_R_P | Default | d | OL | |
| ISNS_X239_INT_I | Default | d | OL | |
| ISNS_X239_INT_NI | Default | d | OL | |
| ISNS_X239_IOUT | Default | d | OL | |
| ISNS_X239_IOUT_BUF | Default | d | OL | |
| ITP_PMODE | Default | d | 0.51 | |
| JTAG_ISP_TCK | Default | d | 0.573 | |
| JTAG_ISP_TDI | Default | d | 0.574 | |
| JTAG_ISP_TDO | Default | d | 0.570 | |
| JTAG_TBT_TCK | Default | d | 0.573 | |
| JTAG_TBT_TDI | Default | d | 0.573 | |
| JTAG_TBT_T_TMS | Default | d | 0.609 | |
| JTAG_TBT_W_TMS | Default | d | 0.782 | |
| JTAG_TBT_X_TMS | Default | d | 0.605 | |
| KBD_BLC_GSLAT | Default | d | OL | |
| KBD_BLC_GSSCK | Default | d | OL | |
| KBD_BLC_GSSIN | Default | d | OL | |
| KBD_BLC_GSSOUT | Default | d | OL | |
| KBD_BLC_XBLANK | Default | d | OL | |
| KBD_I2C_SCL | Default | d | OL | |
| KBD_I2C_SDA | Default | d | OL | |
| KBD_INT_L | Default | d | OL | |
| L83_FILTP | Default | d | 0.796 | |
| L83_FLYC | Default | d | 0.390 | |
| L83_FLYN | Default | d | 0.560 | |
| L83_FLYP | Default | d | 0.421 | |
| L83_HSBIAS_FILT | Default | d | 0.720 | |
| L83_HSBIAS_FILT_REF | Default | d | 0.630 | |
| L83_LDO_EN | Default | d | 0.524 | |
| L83_SDOUT | Default | d | 0.630 | |
| L83_VCP | Default | d | 0.397 | |
| L83_VCP_FILTN | Default | d | 0.840 | |
| L83_VCP_FILTP | Default | d | 0.400 | |
| L83_VL | Default | d | 0.395 | |
| L83_VP | Default | d | 0.355 | |
| LCDBKLT_EN_L | Default | d | OL | |
| LCDBKLT_FB | Default | d | 0.727 | |
| LCDBKLT_FET_DRV | Default | d | 0.515 | |
| LCDBKLT_FET_DRV_R | Default | d | 0.533 | |
| LCDBKLT_SW | Default | d | 0.442 | |
| LCDBKLT_TB_XWR | Default | d | 1.204 | |
| LCDBKLT_TB_XWR | Default | v | 59.000 | |
| LCD_FSS | Default | d | 0.63 | |
| LCD_IRQ_L | Default | d | 0.79 | |
| LCD_MUX_EN | Default | d | 0.628 | |
| LCD_MUX_SEL | Default | d | 0.629 | |
| LCD_PSR_EN | Default | d | 0.790 | |
| LCD_PWR_SLEW | Default | d | 0.705 | |
| LCD_PWR_SLEW_3V3 | Default | d | 0.638 | |
| LPC_AD<0> | Default | d | 0.582 | |
| LPC_AD<1> | Default | d | 0.590 | |
| LPC_AD<2> | Default | d | 0.577 | |
| LPC_AD<3> | Default | d | 0.589 | |
| LPC_AD_R<0> | Default | d | 0.550 | |
| LPC_AD_R<1> | Default | d | 0.550 | |
| LPC_AD_R<2> | Default | d | 0.550 | |
| LPC_AD_R<3> | Default | d | 0.550 | |
| LPC_CLK24M_DPMUX_UC | Default | d | 0.590 | |
| LPC_CLK24M_DPMUX_UC_R | Default | d | 0.599 | |
| LPC_CLK24M_SMC | Default | d | 0.733 | |
| LPC_CLK24M_SMC_R | Default | d | 0.740 | |
| LPC_CLKRUN_L | Default | d | 0.737 | |
| LPC_FRAME_L | Default | d | 0.587 | |
| LPC_FRAME_R_L | Default | d | 0.560 | |
| LPC_PWRDWN_L | Default | d | 0.747 | |
| LPC_SERIRQ | Default | d | 0.736 | |
| MEM_A_ALERT | Default | d | 0.011 | |
| MEM_B_ALERT | Default | d | 0.011 | |
| MEM_VREFCA_A_RC | Default | d | 0.026 | |
| MEM_VREFDQ_A_RC | Default | d | 0.026 | |
| MEM_VREFDQ_B_RC | Default | d | 0.026 | |
| MENU_KEY_L | Default | d | OL | |
| MESA_BOOST_EN | Default | d | 0.525 | |
| MESA_BOOST_EN_CONN | Default | d | OL | |
| MESA_I2C_SCL | Default | d | 0.485 | |
| MESA_I2C_SDA | Default | d | 0.484 | |
| MESA_PWR_EN | Default | d | 0.477 | |
| MESA_SNSR_INT | Default | d | 0.497 | |
| MESA_SNSR_INT_CONN | Default | d | OL | |
| MESA_SPI_CLK | Default | d | 0.470 | |
| MESA_SPI_CLK_CONN | Default | d | 0.550 | |
| MESA_SPI_CLK_R | Default | d | 0.497 | |
| MESA_SPI_MISO | Default | d | 0.500 | |
| MESA_SPI_MISO_CONN | Default | d | 0.495 | |
| MESA_SPI_MOSI | Default | d | 0.465 | |
| MESA_SPI_MOSI_CONN | Default | d | 0.497 | |
| MESA_SPI_MOSI_R | Default | d | 0.493 | |
| MIPIC_CLK_N | Default | d | 0.52 | |
| MIPIC_CLK_P | Default | d | 0.52 | |
| MIPIC_DATA_N | Default | d | 0.52 | |
| MIPIC_DATA_P | Default | d | 0.52 | |
| MIPID_CLK_CONN_N | Default | d | 0.780 | |
| MIPID_CLK_CONN_P | Default | d | 0.780 | |
| MIPID_CLK_N | Default | d | 0.780 | |
| MIPID_CLK_P | Default | d | 0.780 | |
| MIPID_DATA_CONN_N | Default | d | 0.780 | |
| MIPID_DATA_CONN_P | Default | d | 0.780 | |
| MIPID_DATA_N | Default | d | 0.780 | |
| MIPID_DATA_P | Default | d | 0.780 | |
| MIPI_CLK_CONN_N | Default | d | 0.52 | |
| MIPI_CLK_CONN_P | Default | d | 0.52 | |
| MIPI_DATA_CONN_N | Default | d | 0.52 | |
| MIPI_DATA_CONN_P | Default | d | 0.52 | |
| MLB_BOARD_ID0 | Default | d | 0.727 | |
| MLB_BOARD_ID1 | Default | d | 0.780 | |
| MLB_BOARD_ID2 | Default | d | 0.786 | |
| MLB_BOARD_ID3 | Default | d | 0.785 | |
| MLB_BOARD_ID4 | Default | d | 0.791 | |
| MLB_DEV_L | Default | d | 0.570 | |
| MLB_RAMCFG0 | Default | d | 0.791 | |
| MLB_RAMCFG1 | Default | d | 0.743 | |
| MLB_RAMCFG2 | Default | d | 0.792 | |
| MLB_RAMCFG3 | Default | d | 0.744 | |
| MLB_RAMCFG4 | Default | d | 0.724 | |
| MOJAVE_EN_M | Default | d | 0.500 | |
| NC | Default | d | 0.780 | |
| NTC_A_CPUCORE | Default | d | 0.61 | |
| NTC_A_CPUCORE_R | Default | d | OL | |
| NTC_B_CPUGT | Default | d | 0.61 | |
| NTC_B_CPUGT_R | Default | d | OL | |
| P0V9_TBT_T_SVR_AGND | Default | d | 0.000 | |
| P0V9_TBT_X_SVR_AGND | Default | d | 0.000 | |
| P12V_SSD_VPP_SW | Default | d | 0.450 | |
| P12V_SSD_VPP_SW | Default | v | 12.000 | |
| P12V_SSD_VPP_SW_L | Default | d | 0.450 | |
| P12V_SSD_VPP_SW_L | Default | v | 12.000 | |
| P16V0_AGND | Default | d | 0.000 | |
| P1V0S0SW_RAMP | Default | d | 0.625 | |
| P1V0S3_EN | Default | d | 0.569 | |
| P1V0S3_RAMP | Default | d | 0.618 | |
| P1V0_SSD_CORE_SW | Default | d | 0.330 | |
| P1V0_SSD_CORE_SW | Default | v | 1.000 | |
| P1V1_SSD_PCIE_SW | Default | d | 0.360 | |
| P1V1_SSD_PCIE_SW | Default | v | 1.100 | |
| P1V2S0SW_RAMP | Default | d | OL | |
| P1V2S3_FB_N | Default | d | 0.001 | |
| P1V2S3_FB_P | Default | d | 0.230 | |
| P1V2S3_FB_R_N | Default | d | 0.001 | |
| P1V2S3_FB_R_P | Default | d | 0.220 | |
| P1V2S3_ILIM_HS | Default | d | 0.484 | |
| P1V2_DRVH | Default | d | 0.758 | |
| P1V2_DRVL | Default | d | 0.469 | |
| P1V2_DRVL_R | Default | d | 0.469 | |
| P1V2_PHASE | Default | d | 0.235 | |
| P1V2_PHASE | Default | v | 1.200 | |
| P1V2_SSD_DRAM_SW | Default | d | 0.310 | |
| P1V2_SSD_DRAM_SW | Default | v | 1.200 | |
| P1V2_SW | Default | d | 0.236 | |
| P1V2_SW_SNUB | Default | d | OL | |
| P1V2_VBST | Default | d | 0.600 | |
| P1V2_VBST_R | Default | d | 0.608 | |
| P1V5R1V35_GPU_FB_SNS_N | Default | d | 0.015 | |
| P1V5R1V35_GPU_FB_SNS_P | Default | d | 0.070 | |
| P1V8GPU_EN | Default | d | OL | |
| P1V8GPU_FSW | Default | d | 0.212 | |
| P1V8GPU_PGOOD | Default | d | 0.528 | |
| P1V8S0_RAMP | Default | d | 0.613 | |
| P1V8S3_EN | Default | d | 0.492 | |
| P1V8S3_RAMP | Default | d | 0.613 | |
| P1V8S3_SW_SNUB | Default | d | OL | |
| P1V8SUS_FB_N | Default | d | 0.100 | |
| P1V8SUS_FB_P | Default | d | 0.450 | |
| P1V8SUS_FB_RC | Default | d | 0.420 | |
| P1V8SUS_FB_R_N | Default | d | 0.001 | |
| P1V8SUS_FB_R_P | Default | d | 0.460 | |
| P1V8SUS_IOUT | Default | d | OL | |
| P1V8SUS_SW | Default | d | 0.427 | |
| P1V8_SSD_DRAM_SW | Default | d | 0.410 | |
| P1V8_SSD_DRAM_SW | Default | v | 1.800 | |
| P1V8_SSD_FMC_SW | Default | d | 0.370 | |
| P1V8_SSD_FMC_SW | Default | v | 1.800 | |
| P1VS0SW_EN_RC | Default | d | 0.569 | |
| P1VS4_DRVH | Default | d | 0.350 | |
| P1VS4_DRVL | Default | d | 0.468 | |
| P1VS4_FB_N | Default | d | 0.001 | |
| P1VS4_FB_P | Default | d | 0.062 | |
| P1VS4_FB_R_N | Default | d | 0.001 | |
| P1VS4_FB_R_P | Default | d | 0.052 | |
| P1VS4_ILIM_HS | Default | d | 0.46 | |
| P1VS4_PHASE | Default | d | 0.030 | |
| P1VS4_PHASE | Default | v | 1.000 | |
| P1VS4_SW | Default | d | 0.048 | |
| P1VS4_SW_SNUB | Default | d | OL | |
| P1VS4_VBST | Default | d | 0.580 | |
| P1VS4_VBST_R | Default | d | 0.600 | |
| P1VSUS_PGOOD | Default | d | 0.45 | |
| P3V3G3H_AGND | Default | d | 0.001 | |
| P3V3G3H_BIAS | Default | d | 0.561 | |
| P3V3G3H_FB | Default | d | 0.590 | |
| P3V3G3H_FB_R | Default | d | OL | |
| P3V3G3H_FB_RC | Default | d | 0.370 | |
| P3V3G3H_LX | Default | d | 0.360 | |
| P3V3G3H_LX | Default | v | 3.300 | |
| P3V3G3H_VBST_R | Default | d | 0.611 | |
| P3V3GPU_EN | Default | d | 0.555 | |
| P3V3GPU_RAMP | Default | d | 0.612 | |
| P3V3S0SW_RAMP | Default | d | 0.600 | |
| P3V3S0_CAP | Default | d | 0.567 | |
| P3V3S4_EN_R | Default | d | 0.480 | |
| P3V3S5_COMP2 | Default | d | 0.73 | |
| P3V3S5_COMP2_R | Default | d | OL | |
| P3V3S5_CSN2 | Default | d | 0.370 | |
| P3V3S5_CSN2 | Default | v | 3.300 | |
| P3V3S5_CSP2 | Default | d | 1.20 | |
| P3V3S5_CSP2_R | Default | d | 0.370 | |
| P3V3S5_CSP2_R | Default | v | 3.300 | |
| P3V3S5_DRVH | Default | d | 0.92 | |
| P3V3S5_DRVL | Default | d | 0.56 | |
| P3V3S5_EN_RCD | Default | d | 0.50 | |
| P3V3S5_EN_RD | Default | d | OL | |
| P3V3S5_RF | Default | d | 0.57 | |
| P3V3S5_SNUBR | Default | d | OL | |
| P3V3S5_SW | Default | d | 0.36 | |
| P3V3S5_TG | Default | d | 0.935 | |
| P3V3S5_VBST | Default | d | 0.62 | |
| P3V3S5_VBST_R | Default | d | 0.560 | |
| P3V3S5_VFB2 | Default | d | 0.56 | |
| P3V3S5_VFB2_R | Default | d | 0.370 | |
| P3V3S5_VFB2_RR | Default | d | 0.390 | |
| P3V3S5_VSW | Default | d | 0.370 | |
| P3V3S5_VSW | Default | v | 3.300 | |
| P3V3_S0GPU_PGOOD | Default | d | 0.640 | |
| P3V3_TBT_T_SX_EN | Default | d | 0.698 | |
| P3V3_TBT_T_SX_EN_R | Default | d | 0.700 | |
| P3V3_TBT_X_SX_EN | Default | d | 0.700 | |
| P3V3_TBT_X_SX_EN_R | Default | d | 0.640 | |
| P5VGPU_RAMP | Default | d | OL | |
| P5VP3V3_SKIPSEL | Default | d | 0.47 | |
| P5VP3V3_VREF2 | Default | d | 0.47 | |
| P5VP3V3_VREG3 | Default | d | 0.55 | |
| P5VS0_EN | Default | d | 0.452 | |
| P5VS0_EN_RD | Default | d | OL | |
| P5VS0_FET_RAMP | Default | d | 0.616 | |
| P5VS0_TG | Default | d | 0.970 | |
| P5VS0_VBST_R | Default | d | 0.630 | |
| P5VS4_COMP1 | Default | d | 0.73 | |
| P5VS4_COMP1_R | Default | d | OL | |
| P5VS4_CSN1 | Default | d | 0.42 | |
| P5VS4_CSN1 | Default | v | 5.000 | |
| P5VS4_CSP1 | Default | d | 0.91 | |
| P5VS4_CSP1_R | Default | d | 0.420 | |
| P5VS4_CSP1_R | Default | v | 5.000 | |
| P5VS4_DRVH | Default | d | 0.98 | |
| P5VS4_DRVL | Default | d | 0.55 | |
| P5VS4_EN_RCD | Default | d | 0.48 | |
| P5VS4_EN_RD | Default | d | OL | |
| P5VS4_PGOOD | Default | d | 0.44 | |
| P5VS4_SNUBR | Default | d | OL | |
| P5VS4_SW | Default | d | 0.42 | |
| P5VS4_VBST | Default | d | 0.62 | |
| P5VS4_VFB1 | Default | d | 0.56 | |
| P5VS4_VFB1_R | Default | d | 0.430 | |
| P5VS4_VSW | Default | d | 0.420 | |
| P5VS4_VSW | Default | v | 5.000 | |
| P5VUSBCT_AGND | Default | d | 0.001 | |
| P5VUSBCT_BOOT_RC | Default | d | OL | |
| P5VUSBCT_DRVH | Default | d | 0.840 | |
| P5VUSBCT_DRVH_R | Default | d | 0.840 | |
| P5VUSBCT_DRVL | Default | d | 0.450 | |
| P5VUSBCT_FSEL | Default | d | 0.546 | |
| P5VUSBCT_LL | Default | d | 0.250 | |
| P5VUSBCT_LL | Default | v | 5.000 | |
| P5VUSBCT_N | Default | d | 0.250 | |
| P5VUSBCT_N | Default | v | 5.000 | |
| P5VUSBCT_OCSET | Default | d | 0.541 | |
| P5VUSBCT_P | Default | d | 0.250 | |
| P5VUSBCT_P | Default | v | 5.000 | |
| P5VUSBCT_R | Default | d | 0.250 | |
| P5VUSBCT_R | Default | v | 5.000 | |
| P5VUSBCT_RTN_DIV | Default | d | 0.541 | |
| P5VUSBCT_RTN_DIV_R | Default | d | 0.001 | |
| P5VUSBCT_SENSE_DIV | Default | d | 0.530 | |
| P5VUSBCT_SENSE_DIV_R | Default | d | 0.377 | |
| P5VUSBCT_SET0 | Default | d | 0.544 | |
| P5VUSBCT_SET1 | Default | d | 0.543 | |
| P5VUSBCT_SET_R | Default | d | OL | |
| P5VUSBCT_SREF | Default | d | 0.541 | |
| P5VUSBCT_VBST | Default | d | 0.610 | |
| P5VUSBCT_VO | Default | d | 0.542 | |
| P5VUSBCX_AGND | Default | d | 0.000 | |
| P5VUSBCX_BOOT_RC | Default | d | 0.590 | |
| P5VUSBCX_DRVH | Default | d | 0.590 | |
| P5VUSBCX_DRVH_R | Default | d | 0.594 | |
| P5VUSBCX_DRVL | Default | d | 0.440 | |
| P5VUSBCX_FSEL | Default | d | 0.542 | |
| P5VUSBCX_LL | Default | d | 0.241 | |
| P5VUSBCX_LL | Default | v | 5.000 | |
| P5VUSBCX_N | Default | d | 0.241 | |
| P5VUSBCX_OCSET | Default | d | 0.534 | |
| P5VUSBCX_P | Default | d | 0.241 | |
| P5VUSBCX_R | Default | d | 0.241 | |
| P5VUSBCX_R | Default | v | 5.000 | |
| P5VUSBCX_RTN_DIV | Default | d | 0.530 | |
| P5VUSBCX_RTN_DIV_R | Default | d | 0.002 | |
| P5VUSBCX_SENSE_DIV | Default | d | 0.538 | |
| P5VUSBCX_SENSE_DIV_R | Default | d | 0.241 | |
| P5VUSBCX_SET0 | Default | d | 0.540 | |
| P5VUSBCX_SET1 | Default | d | 0.540 | |
| P5VUSBCX_SET_R | Default | d | OL | |
| P5VUSBCX_SREF | Default | d | 0.530 | |
| P5VUSBCX_VBST | Default | d | 0.590 | |
| P5VUSBCX_VO | Default | d | 0.534 | |
| P5_S0GPU_PGOOD | Default | d | 0.637 | |
| PANEL_FET_EN_DLY | Default | d | 0.697 | |
| PANEL_P3V3_EN | Default | d | 0.575 | |
| PANEL_P3V3_EN_D | Default | d | 0.753 | |
| PANEL_P5V_EN | Default | d | 0.571 | |
| PANEL_P5V_EN_D | Default | d | 1.032 | |
| PBUSVSENS_EN_L | Default | d | 0.462 | |
| PBUSVSENS_EN_L_DIV | Default | d | OL | |
| PBUS_S0_VSENSE | Default | d | OL | |
| PBUS_S0_VSENSE_IN | Default | d | 0.365 | |
| PCC_COMP_OUT_BASE | Default | d | OL | |
| PCC_POT_LEVEL | Default | d | OL | |
| PCC_POT_LEVEL_D | Default | d | OL | |
| PCC_POT_LEVEL_R | Default | d | OL | |
| PCC_POT_REF | Default | d | OL | |
| PCC_POT_RH | Default | d | OL | |
| PCC_POT_RL | Default | d | OL | |
| PCH_ALS_TO_SOC_UART_TXD | Default | d | 0.436 | |
| PCH_BT_ROM_BOOT | Default | d | 0.570 | |
| PCH_BT_UART_CTS_L | Default | d | 0.476 | |
| PCH_BT_UART_D2R | Default | d | 0.465 | |
| PCH_BT_UART_R2D | Default | d | 0.433 | |
| PCH_BT_UART_RTS_L | Default | d | 0.436 | |
| PCH_CPU_TRIGGER | Default | d | 0.518 | |
| PCH_CPU_TRIGGER_R | Default | d | 0.495 | |
| PCH_DDPB_CTRLDATA | Default | d | 0.770 | |
| PCH_DDPC_CTRLDATA | Default | d | 0.770 | |
| PCH_DDPD_CTRLDATA | Default | d | 0.770 | |
| PCH_DIFFCLK_BIASREF | Default | d | 0.789 | |
| PCH_DISPA_BCLK | Default | d | 0.451 | |
| PCH_DISPA_BCLK_R | Default | d | 0.460 | |
| PCH_DISPA_SDI | Default | d | 0.369 | |
| PCH_DISPA_SDO | Default | d | 0.449 | |
| PCH_DISPA_SDO_R | Default | d | 0.453 | |
| PCH_INTRUDER_L | Default | d | 0.810 | |
| PCH_JTAGX | Default | d | 0.057 | |
| PCH_PCIE_RCOMPN | Default | d | 0.386 | |
| PCH_PCIE_RCOMPP | Default | d | 0.388 | |
| PCH_PECI | Default | d | 0.350 | |
| PCH_PROCPWRGD | Default | d | 0.480 | |
| PCH_RCIN_L_PU | Default | d | 0.786 | |
| PCH_SOC_DBELL_L | Default | d | 0.480 | |
| PCH_SOC_DFU_STATUS | Default | d | 0.560 | |
| PCH_SOC_FORCE_DFU | Default | d | 0.484 | |
| PCH_SOC_WDOG | Default | d | 0.561 | |
| PCH_SRTCRST_L | Default | d | 0.815 | |
| PCH_STRP_TOPBLK_SWP_L | Default | d | 0.590 | |
| PCH_SWD_IO | Default | d | 0.670 | |
| PCH_SWD_MUX_SEL | Default | d | 0.588 | |
| PCH_TO_SOC_UART_TXD | Default | d | 0.465 | |
| PCH_UART2_CTS_L | Default | d | 0.570 | |
| PCIE_AP_R2D_C_N | Default | d | 0.410 | |
| PCIE_AP_R2D_C_P | Default | d | 0.410 | |
| PCIE_AP_R2D_N | Default | d | 0.460 | |
| PCIE_AP_R2D_P | Default | d | 0.460 | |
| PCIE_CLK100M_SSD_N | Default | d | 0.387 | |
| PCIE_CLK100M_SSD_P | Default | d | 0.396 | |
| PCIE_SSD_D2R_LB_N<0> | Default | d | OL | |
| PCIE_SSD_D2R_LB_P<0> | Default | d | OL | |
| PCIE_SSD_D2R_N<0> | Default | d | 0.418 | |
| PCIE_SSD_D2R_N<1> | Default | d | 0.427 | |
| PCIE_SSD_D2R_N<2> | Default | d | 0.429 | |
| PCIE_SSD_D2R_N<3> | Default | d | 0.423 | |
| PCIE_SSD_D2R_P<0> | Default | d | 0.415 | |
| PCIE_SSD_D2R_P<1> | Default | d | 0.425 | |
| PCIE_SSD_D2R_P<2> | Default | d | 0.429 | |
| PCIE_SSD_D2R_P<3> | Default | d | 0.420 | |
| PCIE_SSD_R2D_C_N<0> | Default | d | 0.390 | |
| PCIE_SSD_R2D_C_N<1> | Default | d | 0.406 | |
| PCIE_SSD_R2D_C_N<2> | Default | d | 0.402 | |
| PCIE_SSD_R2D_C_N<3> | Default | d | 0.401 | |
| PCIE_SSD_R2D_C_P<0> | Default | d | 0.390 | |
| PCIE_SSD_R2D_C_P<1> | Default | d | 0.403 | |
| PCIE_SSD_R2D_C_P<2> | Default | d | 0.401 | |
| PCIE_SSD_R2D_C_P<3> | Default | d | 0.400 | |
| PCIE_SSD_R2D_LB_N<0> | Default | d | OL | |
| PCIE_SSD_R2D_LB_P<0> | Default | d | OL | |
| PCIE_TBT_T_D2R_C_N<0> | Default | d | 0.396 | |
| PCIE_TBT_T_D2R_C_N<1> | Default | d | 0.398 | |
| PCIE_TBT_T_D2R_C_N<2> | Default | d | 0.398 | |
| PCIE_TBT_T_D2R_C_N<3> | Default | d | 0.350 | |
| PCIE_TBT_T_D2R_C_P<0> | Default | d | - | |
| PCIE_TBT_T_D2R_C_P<1> | Default | d | 0.395 | |
| PCIE_TBT_T_D2R_C_P<2> | Default | d | 0.396 | |
| PCIE_TBT_T_D2R_C_P<3> | Default | d | 395.000 | |
| PCIE_TBT_T_R2D_N<0> | Default | d | 0.620 | |
| PCIE_TBT_T_R2D_N<1> | Default | d | 0.614 | |
| PCIE_TBT_T_R2D_N<2> | Default | d | 0.621 | |
| PCIE_TBT_T_R2D_N<3> | Default | d | 0.619 | |
| PCIE_TBT_T_R2D_P<0> | Default | d | 0.620 | |
| PCIE_TBT_T_R2D_P<1> | Default | d | 0.615 | |
| PCIE_TBT_T_R2D_P<2> | Default | d | 0.600 | |
| PCIE_TBT_T_R2D_P<3> | Default | d | 0.620 | |
| PCIE_WAKE_L | Default | d | 0.500 | |
| PDCINVSENS_EN_L_DIV | Default | d | OL | |
| PLT_RST_L | Default | d | 0.37 | |
| PLT_RST_L_BUF | Default | d | 0.637 | |
| PMIC_EN3V3SW | Default | d | 0.545 | |
| PMIC_SHUTDOWN_L | Default | d | 0.480 | |
| PMIC_SLAVEADDR | Default | d | 0.487 | |
| PMIC_VDCSNS | Default | d | 0.000 | |
| PMU_IREF | Default | d | 0.537 | |
| PMU_SOC_UWAKE_L | Default | d | 0.576 | |
| PMU_SOC_VBUS_DET_L | Default | d | 0.570 | |
| PMU_TCAL_GND | Default | d | 0.000 | |
| PMU_TCAL_PWR | Default | d | 0.538 | |
| PMU_TO_SOC_AWAKE_PWRGD | Default | d | 0.453 | |
| PMU_TO_SOC_CLK_32K | Default | d | 0.540 | |
| PMU_TO_SOC_RESET_L | Default | d | 0.455 | |
| PMU_TO_SOC_SLEEP1_PWRGD | Default | d | 0.459 | |
| PMU_TO_SOC_SYS_ALIVE | Default | d | 0.487 | |
| PMU_VDD_RTC | Default | d | 0.352 | |
| PMU_VPUMP | Default | d | 0.530 | |
| PMU_VREF | Default | d | 0.532 | |
| PM_ALL_GPU_PGOOD | Default | d | 0.519 | |
| PM_BATLOW_L | Default | d | 0.560 | |
| PM_CLK32K_SUSCLK_R | Default | d | 0.580 | |
| PM_DSW_PWRGD | Default | d | 0.751 | |
| PM_EN_P3V3_G3H_R | Default | d | 0.614 | |
| PM_EN_PVXS5 | Default | d | 0.50 | |
| PM_MEMVTT_EN | Default | d | 0.377 | |
| PM_PCH_PWROK | Default | d | 0.447 | |
| PM_PCH_SYS_PWROK | Default | d | 0.45 | |
| PM_PWRBTN_L | Default | d | 0.721 | |
| PM_RSMRST_L | Default | d | OL | |
| PM_SLP_S0S3_L | Default | d | 0.510 | |
| PM_SLP_S0_L | Default | d | 0.471 | |
| PM_SLP_S3_L | Default | d | 0.44 | |
| PM_SLP_S4_L | Default | d | 0.464 | |
| PM_SLP_S5_L | Default | d | 0.48 | |
| PM_SLP_SUS_L | Default | d | 0.468 | |
| PM_SYNC | Default | d | 0.516 | |
| PM_SYNC_R | Default | d | 0.520 | |
| PM_SYSRST_L | Default | d | 0.736 | |
| PM_THRMTRIP_L | Default | d | 0.274 | |
| PM_THRMTRIP_L_R | Default | d | 0.432 | |
| PP0V6_S0_DDRVTT | Default | d | 0.140 | |
| PP0V6_S3_MEM_VREFCA_A | Default | d | 0.700 | |
| PP0V6_S3_MEM_VREFDQ_A | Default | d | 0.750 | |
| PP0V6_S3_MEM_VREFDQ_B | Default | d | 0.750 | |
| PP0V6_SLEEP1_BUCK0 | Default | d | 0.390 | |
| PP0V6_SLEEP1_BUCK0 | Default | v | 0.600 | |
| PP0V6_SLEEP2_LDO0 | Default | d | 0.385 | |
| PP0V8_SLEEP1_SW1 | Default | d | 0.218 | |
| PP0V8_SLEEP2_BUCK1 | Default | d | 0.220 | |
| PP0V8_SLEEP2_BUCK1 | Default | v | 0.800 | |
| PP0V9_TBT_T_CIO | Default | d | 0.370 | |
| PP0V9_TBT_T_DP | Default | d | 0.300 | |
| PP0V9_TBT_T_LVR | Default | d | 0.256 | |
| PP0V9_TBT_T_PCIE | Default | d | 0.288 | |
| PP0V9_TBT_T_SVR | Default | d | 0.245 | |
| PP0V9_TBT_T_SVR | Default | v | 0.900 | |
| PP0V9_TBT_T_USB | Default | d | 0.380 | |
| PP0V9_TBT_X_CIO | Default | d | 0.404 | |
| PP0V9_TBT_X_DP | Default | d | 0.32 | |
| PP0V9_TBT_X_LVR | Default | d | 0.275 | |
| PP0V9_TBT_X_PCIE | Default | d | 0.314 | |
| PP0V9_TBT_X_SVR | Default | d | 0.220 | |
| PP0V9_TBT_X_SVR | Default | v | 0.900 | |
| PP0V9_TBT_X_USB | Default | d | 0.412 | |
| PP12V_SSD_VPP | Default | d | 0.454 | |
| PP16V0_MESA | Default | d | 0.653 | |
| PP16V0_MESA_CONN | Default | d | 0.654 | |
| PP17V0_MOJAVE_LDOIN | Default | d | 0.592 | |
| PP1V0_S0SW | Default | d | 0.235 | |
| PP1V0_S3 | Default | d | 0.228 | |
| PP1V0_SSD_CORE | Default | d | 0.33 | |
| PP1V0_SSD_CORE | Default | v | 1.000 | |
| PP1V0_SSD_CORE_L12 | Default | d | 0.270 | |
| PP1V0_SSD_CORE_L12 | Default | v | 1.000 | |
| PP1V0_SSD_PLL | Default | d | 0.270 | |
| PP1V0_SSD_PLL | Default | v | 1.000 | |
| PP1V0_SUS | Default | d | 0.040 | |
| PP1V0_SUS | Default | v | 1.000 | |
| PP1V1_SLEEP1_PLL_DDR_FILT | Default | d | 0.365 | |
| PP1V1_SLEEP1_SW2 | Default | d | 0.321 | |
| PP1V1_SLEEP1_XTAL_FILT | Default | d | 0.360 | |
| PP1V1_SLEEP3_BUCK2 | Default | d | 0.280 | |
| PP1V1_SLEEP3_BUCK2 | Default | v | 1.100 | |
| PP1V1_SSD_LVDS | Default | d | 0.360 | |
| PP1V1_SSD_LVDS | Default | v | 1.100 | |
| PP1V1_SSD_PCIE | Default | d | 0.360 | |
| PP1V1_SSD_PCIE | Default | v | 1.100 | |
| PP1V1_UPC_TA_LDO_BMC | Default | d | 0.523 | |
| PP1V1_UPC_TB_LDO_BMC | Default | d | 0.518 | |
| PP1V1_UPC_XA_LDO_BMC | Default | d | 0.515 | |
| PP1V1_UPC_XB_LDO_BMC | Default | d | 0.516 | |
| PP1V25_PMICVREF | Default | d | 0.480 | |
| PP1V2_S0SW | Default | d | 0.239 | |
| PP1V2_S3 | Default | d | 0.237 | |
| PP1V2_S3 | Default | v | 1.200 | |
| PP1V2_S3_CPUDDR | Default | d | 0.250 | |
| PP1V2_S3_REG_R | Default | d | 0.235 | |
| PP1V2_S3_REG_R | Default | v | 1.200 | |
| PP1V2_S5_SMC_VDDC | Default | d | 0.517 | |
| PP1V2_SSD_DRAM | Default | d | 0.310 | |
| PP1V2_SSD_DRAM | Default | v | 1.200 | |
| PP1V2_SSD_DRAM_L12 | Default | d | 0.515 | |
| PP1V5R1V35_GPU_REG_R | Default | d | 0.172 | |
| PP1V5R1V35_GPU_REG_R | Default | r | 170.000 | |
| PP1V5R1V35_GPU_REG_R | Default | v | 1.500 | |
| PP1V5R1V35_S0_GPU_IC | Default | d | 0.172 | |
| PP1V5R1V35_S0_GPU_MEM | Default | d | 0.174 | |
| PP1V5R1V35_S0_GPU_MEM | Default | r | 170.000 | |
| PP1V5R1V35_S0_GPU_MEM | Default | v | 1.500 | |
| PP1V8_ALWAYS_LDO9 | Default | d | 0.386 | |
| PP1V8_AWAKE_SW3C | Default | d | 0.348 | |
| PP1V8_GPU | Default | d | 0.212 | |
| PP1V8_GPU | Default | v | 1.800 | |
| PP1V8_GPU_TSVDD | Default | d | 0.212 | |
| PP1V8_MESA | Default | d | 0.510 | |
| PP1V8_MESA_CONN | Default | d | 0.509 | |
| PP1V8_S0 | Default | d | 0.340 | |
| PP1V8_S0 | Default | v | 1.800 | |
| PP1V8_S0SW_DFR | Default | d | 0.53 | |
| PP1V8_S0SW_DFR | Default | v | 1.800 | |
| PP1V8_S0_GPU | Default | d | 0.200 | |
| PP1V8_S0_GPU_LC_IC | Default | d | 0.200 | |
| PP1V8_S0_LDO_AUD | Default | d | 0.396 | |
| PP1V8_S0_PCH_VCCHDA_F | Default | d | 0.340 | |
| PP1V8_S0_PCH_VCCHDA_F | Default | v | 1.800 | |
| PP1V8_S3 | Default | d | 0.358 | |
| PP1V8_S3_MEM | Default | d | 0.377 | |
| PP1V8_S4 | Default | d | 0.430 | |
| PP1V8_SLEEP2_LPPLL_FILT | Default | d | 0.625 | |
| PP1V8_SLEEP2_SW3A | Default | d | 0.442 | |
| PP1V8_SLEEP3_BUCK3 | Default | d | 0.400 | |
| PP1V8_SLEEP3_BUCK3 | Default | v | 1.800 | |
| PP1V8_SSD_DRAM | Default | d | 0.410 | |
| PP1V8_SSD_DRAM | Default | v | 1.800 | |
| PP1V8_SSD_DRAM_L12 | Default | d | 0.410 | |
| PP1V8_SSD_DRAM_L12 | Default | v | 1.800 | |
| PP1V8_SSD_FMC | Default | d | 0.370 | |
| PP1V8_SSD_FMC | Default | v | 1.800 | |
| PP1V8_SSD_LVDS | Default | d | 0.410 | |
| PP1V8_SSD_LVDS | Default | v | 1.800 | |
| PP1V8_SSD_OSC | Default | d | 0.410 | |
| PP1V8_SSD_OSC | Default | v | 1.800 | |
| PP1V8_SSD_PLL0 | Default | d | 0.567 | |
| PP1V8_SSD_PLL01 | Default | v | 1.800 | |
| PP1V8_SSD_PLL1 | Default | d | 0.410 | |
| PP1V8_SSD_PLL1 | Default | v | 1.800 | |
| PP1V8_SSD_PLL2 | Default | d | 0.410 | |
| PP1V8_SSD_PLL2 | Default | v | 1.800 | |
| PP1V8_SSD_PLL23 | Default | d | 0.431 | |
| PP1V8_SSD_PLL3 | Default | d | 0.410 | |
| PP1V8_SSD_PLL3 | Default | v | 1.800 | |
| PP1V8_SUS | Default | d | 0.430 | |
| PP1V8_SUS | Default | v | 1.800 | |
| PP1V8_SUS_REG_R | Default | d | 0.427 | |
| PP1V8_UPC_TA_LDOA | Default | d | 0.530 | |
| PP1V8_UPC_TA_LDOD | Default | d | 0.488 | |
| PP1V8_UPC_TB_LDOA | Default | d | 0.522 | |
| PP1V8_UPC_TB_LDOD | Default | d | 0.482 | |
| PP1V8_UPC_XA_LDOA | Default | d | 0.525 | |
| PP1V8_UPC_XA_LDOD | Default | d | 0.490 | |
| PP1V8_UPC_XB_LDOA | Default | d | 0.528 | |
| PP1V8_UPC_XB_LDOA | Default | t | NO 2.1 | |
| PP1V8_UPC_XB_LDOA | Default | v | 1.800 | |
| PP1V8_UPC_XB_LDOD | Default | d | 0.488 | |
| PP1V8_UPC_XB_LDOD | Default | t | NO 2.2 | |
| PP1V8_UPC_XB_LDOD | Default | v | 1.800 | |
| PP1V_PCH_REG_R | Default | d | 0.030 | |
| PP1V_PCH_REG_R | Default | v | 1.000 | |
| PP1V_S5_PCH_DCPDSW | Default | d | 0.331 | |
| PP1V_SUSSW_PCH_VCCAMPHYPLL_F | Default | d | 0.045 | |
| PP1V_SUS_PCH_VCCCLK5_F | Default | d | 0.040 | |
| PP1V_SUS_PCH_VCCCLK5_F | Default | v | 1.000 | |
| PP1V_SUS_PCH_VCCHDAPLL_F | Default | d | 0.040 | |
| PP1V_SUS_PCH_VCCHDAPLL_F | Default | v | 1.000 | |
| PP1V_SUS_PCH_VCCUSB2HDAPLL_F | Default | d | 0.040 | |
| PP1V_SUS_PCH_VCCUSB2HDAPLL_F | Default | v | 1.000 | |
| PP20V_USBC_TA_VBUS | Default | d | 0.155 | |
| PP20V_USBC_TA_VBUS | Default | v | 20.000 | |
| PP20V_USBC_TA_VBUS_CONN | Default | d | 0.155 | |
| PP20V_USBC_TA_VBUS_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
| PP20V_USBC_TA_VBUS_CONN | Default | v | 20.000 | |
| PP20V_USBC_TA_VBUS_F | Default | d | 0.155 | |
| PP20V_USBC_TA_VBUS_F | Default | v | 20.000 | |
| PP20V_USBC_TB_VBUS | Default | d | 0.155 | |
| PP20V_USBC_TB_VBUS | Default | v | 20.000 | |
| PP20V_USBC_TB_VBUS_CONN | Default | d | 0.155 | |
| PP20V_USBC_TB_VBUS_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
| PP20V_USBC_TB_VBUS_CONN | Default | v | 20.000 | |
| PP20V_USBC_TB_VBUS_F | Default | d | 0.155 | |
| PP20V_USBC_TB_VBUS_F | Default | v | 20.000 | |
| PP20V_USBC_XA_VBUS | Default | d | 0.155 | |
| PP20V_USBC_XA_VBUS | Default | v | 20,000 | |
| PP20V_USBC_XA_VBUS_CONN | Default | d | 0.155 | |
| PP20V_USBC_XA_VBUS_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
| PP20V_USBC_XA_VBUS_CONN | Default | v | 20,000 | |
| PP20V_USBC_XA_VBUS_F | Default | d | 0.155 | |
| PP20V_USBC_XA_VBUS_F | Default | v | 20,000 | |
| PP20V_USBC_XB_VBUS | Default | d | 0.155 | |
| PP20V_USBC_XB_VBUS | Default | t | NO 1 | |
| PP20V_USBC_XB_VBUS | Default | v | 20,000 | |
| PP20V_USBC_XB_VBUS_CONN | Default | d | 0.155 | |
| PP20V_USBC_XB_VBUS_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
| PP20V_USBC_XB_VBUS_CONN | Default | v | 20.000 | |
| PP20V_USBC_XB_VBUS_F | Default | d | 0.155 | |
| PP20V_USBC_XB_VBUS_F | Default | t | NO 1 | |
| PP20V_USBC_XB_VBUS_F | Default | v | 20,000 | |
| PP2V5_ADC1_VREF | Default | d | OL | |
| PP2V9_SYSCLK | Default | d | 0.45 | |
| PP3V0_AWAKE_LDO7 | Default | d | 0.530 | |
| PP3V0_G3H | Default | d | 0.447 | |
| PP3V0_MESA | Default | d | 0.550 | |
| PP3V0_MESA | Default | v | 3.000 | |
| PP3V0_MESA_CONN | Default | d | 0.548 | |
| PP3V0_S5_AVREF_SMC | Default | d | 0.602 | |
| PP3V3_G3H | Default | d | 0.34 | |
| PP3V3_G3H | Default | v | 3.300 | |
| PP3V3_G3H_REG_R | Default | d | 0.360 | |
| PP3V3_G3H_REG_R | Default | v | 3.300 | |
| PP3V3_PMICLDO | Default | d | 0.417 | |
| PP3V3_S0 | Default | d | 0.32 | |
| PP3V3_S0SW_DFR | Default | d | 0.580 | |
| PP3V3_S0SW_LCD | Default | d | 0.576 | |
| PP3V3_S0SW_LCD_R | Default | d | 0.574 | |
| PP3V3_S0_AUD_F | Default | d | 0.653 | |
| PP3V3_S0_CARBON_R | Default | d | OL | |
| PP3V3_S0_CPUTHMSNS_R | Default | d | 0.402 | |
| PP3V3_S0_DPMUX_UC_R | Default | d | 0.358 | |
| PP3V3_S0_GPU | Default | d | 0.496 | |
| PP3V3_S0_GPUTHMSNS_R | Default | d | 0.382 | |
| PP3V3_S0_LEFT | Default | d | 0.339 | |
| PP3V3_S0_TBTTHMSNS_T_R | Default | d | 0.401 | |
| PP3V3_S0_TBTTHMSNS_X_R | Default | d | 0.385 | |
| PP3V3_S3_DPMUX_UC_R | Default | d | 0.333 | |
| PP3V3_S4 | Default | d | 0.329 | |
| PP3V3_S4SW_SNS | Default | d | 0.550 | |
| PP3V3_S4SW_SNS_FET_R | Default | d | 0.550 | |
| PP3V3_S4_BT | Default | d | 0.330 | |
| PP3V3_S4_MESA_SW | Default | d | 0.330 | |
| PP3V3_S4_SOC_PMU | Default | d | 0.379 | |
| PP3V3_S4_T151 | Default | d | 0.331 | |
| PP3V3_S4_TPAD | Default | d | 0.34 | |
| PP3V3_S4_WLAN | Default | d | 0.330 | |
| PP3V3_S4_WLAN_SW | Default | d | 0.310 | |
| PP3V3_S5 | Default | d | 0.370 | |
| PP3V3_S5 | Default | v | 3.300 | |
| PP3V3_S5_POLARIS | Default | d | 0.501 | |
| PP3V3_S5_SMC_VDDA | Default | d | 0.360 | |
| PP3V3_S5_T139 | Default | d | 0.360 | |
| PP3V3_S5_TBT_T_SW | Default | d | 0.483 | |
| PP3V3_S5_TBT_X_SW | Default | d | 0.483 | |
| PP3V3_SSD_ISNS_R | Default | d | 0.408 | |
| PP3V3_SSD_LIM | Default | d | 0.409 | |
| PP3V3_SSD_NAND | Default | d | 0.394 | |
| PP3V3_SSD_PMIC_AVIN | Default | d | 0.408 | |
| PP3V3_SUS | Default | d | 0.350 | |
| PP3V3_TBT_T_ANA_PCIE | Default | d | 0.512 | |
| PP3V3_TBT_T_ANA_USB2 | Default | d | 0.501 | |
| PP3V3_TBT_T_F | Default | d | 0.350 | |
| PP3V3_TBT_T_F | Default | v | 3.300 | |
| PP3V3_TBT_T_LC | Default | d | 0.529 | |
| PP3V3_TBT_T_S0 | Default | d | 0.350 | |
| PP3V3_TBT_T_S0 | Default | v | 3.300 | |
| PP3V3_TBT_X_ANA_PCIE | Default | d | 0.500 | |
| PP3V3_TBT_X_ANA_USB2 | Default | d | 0.507 | |
| PP3V3_TBT_X_F | Default | d | 0.340 | |
| PP3V3_TBT_X_F | Default | v | 3.300 | |
| PP3V3_TBT_X_LC | Default | d | 0.526 | |
| PP3V3_TBT_X_S0 | Default | d | 0.340 | |
| PP3V3_TBT_X_S0 | Default | v | 3.300 | |
| PP3V3_UPC_TA_LDO | Default | d | 0.514 | |
| PP3V3_UPC_TB_LDO | Default | d | 0.507 | |
| PP3V3_UPC_XA_LDO | Default | d | 0.511 | |
| PP3V3_UPC_XB_LDO | Default | d | 0.51 | |
| PP3V3_UPC_XB_LDO | Default | t | NO 2 | |
| PP3V3_UPC_XB_LDO | Default | v | 3.300 | |
| PP3V3_VREF_PCC | Default | d | OL | |
| PP5V_COREVR_VCC | Default | d | 0.42 | |
| PP5V_EADC1_AVDD | Default | d | OL | |
| PP5V_PMICLDO | Default | d | 0.460 | |
| PP5V_PMICLDO_R | Default | d | 0.450 | |
| PP5V_S0 | Default | d | 0.380 | |
| PP5V_S0GPU_P1V35_GPU | Default | d | 0.380 | |
| PP5V_S0SW_LCD | Default | d | 0.546 | |
| PP5V_S0_ALSCAM_F | Default | d | 0.41 | |
| PP5V_S0_BKLT_A | Default | d | 0.382 | |
| PP5V_S0_BKLT_D | Default | d | 0.382 | |
| PP5V_S0_FAN_CONN | Default | d | 0.386 | |
| PP5V_S0_GFXIMVP_VDD | Default | d | 0.378 | |
| PP5V_S0_GFXIMVP_VDDP | Default | d | 0.378 | |
| PP5V_S0_GPUFET | Default | d | OL | |
| PP5V_S0_GPU_OPAMP | Default | d | OL | |
| PP5V_S0_KBD | Default | d | 0.386 | |
| PP5V_S0_T139 | Default | d | 0.41 | |
| PP5V_S4 | Default | d | 0.42 | |
| PP5V_S4 | Default | v | 5.000 | |
| PP5V_S4_ISNS_D | Default | d | OL | |
| PP5V_S4_TPAD_CONN | Default | d | 0.42 | |
| PP5V_S4_T_USBC | Default | d | 0.250 | |
| PP5V_S4_T_USBC | Default | v | 5.000 | |
| PP5V_S4_X_USBC | Default | d | 0.241 | |
| PP5V_S4_X_USBC | Default | v | 5.000 | |
| PP5V_S5 | Default | d | 0.46 | |
| PP5V_USBCT_VCC | Default | d | 0.519 | |
| PP5V_USBCX_VCC | Default | d | 0.432 | |
| PP5V_VREF_PCC | Default | d | OL | |
| PPBUS_G3H | Default | d | 0.360 | |
| PPBUS_G3H | Default | v | 13.100 | |
| PPBUS_G3H_R | Default | d | 0.373 | |
| PPBUS_HS_CPU | Default | d | 0.360 | |
| PPBUS_HS_CPU | Default | v | 13.100 | |
| PPBUS_HS_GPU | Default | d | 0.362 | |
| PPBUS_HS_GPU | Default | v | 13.100 | |
| PPBUS_HS_OTH3V3 | Default | d | 0.26 | |
| PPBUS_HS_OTH5V | Default | d | 0.370 | |
| PPBUS_PMIC | Default | d | 0.370 | |
| PPBUS_S4_HS_TPAD | Default | d | 0.357 | |
| PPBUS_S4_HS_TPAD | Default | v | 12.600 | |
| PPDCIN_G3H | Default | d | 0.55 | |
| PPDCIN_G3H | Default | v | 20,000 | |
| PPDCIN_G3H_CHGR | Default | d | 0.55 | |
| PPDCIN_G3H_CHGR | Default | v | 20,000 | |
| PPDCIN_G3H_CHGR_R | Default | d | 0.560 | |
| PPDCPRTC_PCH | Default | d | 0.685 | |
| PPSVDD_STOCKHOLM | Default | d | 0.348 | |
| PPVBAT_G3H_CHGR_R | Default | d | 0.362 | |
| PPVBAT_G3H_CHGR_REG | Default | d | 0.360 | |
| PPVBAT_G3H_CHGR_REG | Default | v | 13.100 | |
| PPVBAT_G3H_CONN | Default | d | 0.62 | |
| PPVBAT_G3H_CONN | Default | t | Won't Boot without Battery, thereabout 20V 0.02A and 1A with battery icon on the screen | |
| PPVCCGT_CPU_PH1 | Default | d | 0.005 | |
| PPVCCGT_CPU_PH1 | Default | r | 2.60R | |
| PPVCCGT_CPU_PH1 | Default | v | 1.500 | |
| PPVCCGT_CPU_PH2 | Default | d | 0.005 | |
| PPVCCGT_CPU_PH2 | Default | r | 2.600R | |
| PPVCCGT_CPU_PH2 | Default | v | 1.500 | |
| PPVCCGT_S0_CPU | Default | d | 0.005 | |
| PPVCCGT_S0_CPU | Default | r | 2.600R | |
| PPVCCGT_S0_CPU | Default | v | 1.500 | |
| PPVCCIO_S0_CPU | Default | d | 0.070 | |
| PPVCCIO_S0_CPU | Default | v | 0.950 | |
| PPVCCSA_CPU_R | Default | d | 0.015 | |
| PPVCCSA_CPU_R | Default | r | 7.690R | |
| PPVCCSA_CPU_R | Default | v | 1.150 | |
| PPVCCSA_S0_CPU | Default | d | 0.015 | |
| PPVCCSA_S0_CPU | Default | r | 7.690R | |
| PPVCCSA_S0_CPU | Default | v | 1.150 | |
| PPVCC_CPU_PH1 | Default | d | 0.003 | |
| PPVCC_CPU_PH1 | Default | r | 1.520R | |
| PPVCC_CPU_PH1 | Default | v | 1.500 | |
| PPVCC_CPU_PH2 | Default | d | 0.003 | |
| PPVCC_CPU_PH2 | Default | r | 1.52R | |
| PPVCC_CPU_PH2 | Default | v | 1.500 | |
| PPVCC_CPU_PH3 | Default | d | 0.003 | |
| PPVCC_CPU_PH3 | Default | r | 1.520R | |
| PPVCC_CPU_PH3 | Default | v | 1.500 | |
| PPVCC_RTC_OSC | Default | d | 0.429 | |
| PPVCC_S0_CPU | Default | d | 0.003 | |
| PPVCC_S0_CPU | Default | r | 1.520R | |
| PPVCC_S0_CPU | Default | v | 1.500 | |
| PPVCORE_S0_GFX_PH1 | Default | d | 0.002 | |
| PPVCORE_S0_GFX_PH1 | Default | r | 2.510R | |
| PPVCORE_S0_GFX_PH1 | Default | v | 1.100 | |
| PPVCORE_S0_GFX_PH2 | Default | d | 0.002 | |
| PPVCORE_S0_GFX_PH2 | Default | r | 2.510R | |
| PPVCORE_S0_GFX_PH2 | Default | v | 1.100 | |
| PPVCORE_S0_GPU | Default | d | 0.002 | |
| PPVCORE_S0_GPU | Default | r | 2.510R | |
| PPVCORE_S0_GPU | Default | v | 1.100 | |
| PPVDDCI_S0_GPU | Default | d | 0.024 | |
| PPVDDCI_S0_GPU | Default | v | 0.900 | |
| PPVDD_STOCKHOLM | Default | d | 0.314 | |
| PPVDD_U1900_RC | Default | d | 0.366 | |
| PPVIN_G3H_P3V3G3H | Default | d | 0.55 | |
| PPVIN_S0GPU_1V8_RC | Default | d | 0.378 | |
| PPVIN_S0SW_LCDBKLT | Default | d | 0.869 | |
| PPVIN_S0SW_LCDBKLT | Default | v | 13.100 | |
| PPVIN_S0SW_LCDBKLT_FET | Default | d | 0.366 | |
| PPVIN_S0SW_LCDBKLT_FET | Default | v | 13.100 | |
| PPVIN_S0SW_LCDBKLT_R | Default | d | 0.366 | |
| PPVIN_S0SW_LCDBKLT_R | Default | v | 13.100 | |
| PPVIN_S0_CPUVR_VIN | Default | d | 0.22 | |
| PPVIN_S0_GFXIMVP_VIN | Default | d | 0.359 | |
| PPVIN_S4_TPAD_FUSE | Default | d | 0.357 | |
| PPVIN_S4_TPAD_FUSE | Default | v | 12.600 | |
| PPVIN_SUS_VR5_R | Default | d | 0.370 | |
| PPVIN_SW_LCDBKLT_SW | Default | d | 0.870 | |
| PPVIN_SW_LCDBKLT_SW | Default | v | 13.100 | |
| PPVIO_32K_B_RC | Default | d | 0.425 | |
| PPVIO_VIOE_A_RC | Default | d | 0.051 | |
| PPVOUT_S0_LCDBKLT | Default | d | 1.204 | |
| PPVOUT_S0_LCDBKLT | Default | v | 59.000 | |
| PPVRTC_U1900_RC | Default | d | 0.360 | |
| PP_STOCKHOLM_TVDD | Default | d | 0.351 | |
| PP_STOCKHOLM_VMID | Default | d | 0.574 | |
| PROG1_CPUCOREVR | Default | d | 0.61 | |
| PROG2_CPUCOREVR | Default | d | 0.61 | |
| PROG3_CPUCOREVR | Default | d | 0.61 | |
| PROG4_CPUCOREVR | Default | d | 0.61 | |
| PROG5_CPUCOREVR | Default | d | 0.61 | |
| PVCCCGT_PH1_AGND | Default | d | 0.000 | |
| PVCCCGT_PH1_VCC | Default | d | 0.380 | |
| PVCCCGT_PH2_AGND | Default | d | 0.000 | |
| PVCCCGT_PH2_VCC | Default | d | 0.380 | |
| PVCCCORE_PH1_AGND | Default | d | 0.000 | |
| PVCCCORE_PH1_VCC | Default | d | 0.381 | |
| PVCCCORE_PH2_AGND | Default | d | 0.000 | |
| PVCCCORE_PH2_VCC | Default | d | 0.380 | |
| PVCCCORE_PH3_AGND | Default | d | 0.000 | |
| PVCCCORE_PH3_VCC | Default | d | 0.380 | |
| PVCCCSA_AGND | Default | d | 0.000 | |
| PVCCCSA_VCIN | Default | d | 0.400 | |
| PVCCIO_DRVH | Default | d | 0.581 | |
| PVCCIO_DRVL | Default | d | 0.467 | |
| PVCCIO_DRVL_R | Default | d | 0.470 | |
| PVCCIO_EN | Default | d | 0.430 | |
| PVCCIO_FB_N | Default | d | 0.005 | |
| PVCCIO_FB_P | Default | d | 0.056 | |
| PVCCIO_ILIM_LS | Default | d | 0.480 | |
| PVCCIO_PGOOD | Default | d | 0.472 | |
| PVCCIO_PHASE | Default | d | 0.070 | |
| PVCCIO_PHASE | Default | v | 0.950 | |
| PVCCIO_SW | Default | d | 0.052 | |
| PVCCIO_SW_SNUB | Default | d | OL | |
| PVCCIO_VBST | Default | d | 0.580 | |
| PVCCIO_VBST_R | Default | d | 0.583 | |
| PVCORE_GPU_FB_SNS_N | Default | d | 0.001 | |
| PVDDCI_GPU_FB_SNS_N | Default | d | 0.020 | |
| PVDDCI_GPU_FB_SNS_P | Default | d | 0.040 | |
| PVDDCI_PGOOD | Default | d | 0.545 | |
| PVTT_FB | Default | d | 0.150 | |
| PVTT_FB_R | Default | d | 0.135 | |
| REG_BOOT_GPU_VDDCI | Default | d | 0.458 | |
| REG_BOOT_GPU_VDDCI_RC | Default | d | 0.462 | |
| REG_FB_P1V8GPU | Default | d | 1.397 | |
| REG_GPU_VDDCI_COMP | Default | d | 0.576 | |
| REG_GPU_VDDCI_FB | Default | d | 0.475 | |
| REG_GPU_VDDCI_FB_R | Default | d | OL | |
| REG_GPU_VDDCI_FCCM | Default | d | 0.593 | |
| REG_GPU_VDDCI_IMON | Default | d | 0.605 | |
| REG_GPU_VDDCI_ISEN1 | Default | d | 0.600 | |
| REG_GPU_VDDCI_ISUMN | Default | d | 0.588 | |
| REG_GPU_VDDCI_ISUMP | Default | d | 0.553 | |
| REG_GPU_VDDCI_VSEN | Default | d | 0.002 | |
| REG_GPU_VDDCI_VSEN_C | Default | d | OL | |
| REG_LGATE_GPU_VDDCI | Default | d | 0.435 | |
| REG_PHASE_1V8GPU | Default | d | 0.212 | |
| REG_PHASE_1V8GPU | Default | v | 1.800 | |
| REG_PHASE_GPU_VDDCI | Default | d | 0.018 | |
| REG_SSTR_P1V8GPU | Default | d | 0.740 | |
| REG_UGATE_GPU_VDDCI | Default | d | 0.450 | |
| REG_VOS_P1V8GPU | Default | d | 0.222 | |
| RTC_RESET_L | Default | d | 0.81 | |
| RTN_A_CPUCORE | Default | d | 0.00 | |
| RTN_C_CPUSA | Default | d | 0.00 | |
| S2R_ACK_L | Default | d | 0.475 | |
| S5_PWRGD | Default | d | 0.48 | |
| SA_ISUMN_R | Default | d | 1.026 | |
| SEP_I2C_SCL | Default | d | 0.486 | |
| SEP_I2C_SDA | Default | d | 0.486 | |
| SEP_ROM_WC | Default | d | 0.750 | |
| SMBUS_PCH_CLK | Default | d | 0.754 | |
| SMBUS_PCH_DATA | Default | d | 0.755 | |
| SMBUS_SMC_0_S0_SCL | Default | d | 0.72 | |
| SMBUS_SMC_0_S0_SDA | Default | d | 0.72 | |
| SMBUS_SMC_1_S0_SCL | Default | d | 0.550 | |
| SMBUS_SMC_1_S0_SDA | Default | d | 0.54 | |
| SMBUS_SMC_2_S4_SCL | Default | d | 0.520 | |
| SMBUS_SMC_2_S4_SDA | Default | d | 0.513 | |
| SMBUS_SMC_3_SCL | Default | d | 0.53 | |
| SMBUS_SMC_3_SDA | Default | d | 0.52 | |
| SMBUS_SMC_4_G3H_SCL | Default | d | 0.688 | |
| SMBUS_SMC_4_G3H_SDA | Default | d | 0.67 | |
| SMBUS_SMC_5_G3_SCL | Default | d | 0.42 | |
| SMBUS_SMC_5_G3_SDA | Default | d | 0.42 | |
| SMBUS_SOC_PMU_BR_SCL | Default | d | 0.520 | |
| SMBUS_SOC_PMU_BR_SDA | Default | d | 0.513 | |
| SMBUS_SOC_PMU_SCL | Default | d | 0.522 | |
| SMBUS_SOC_PMU_SDA | Default | d | 0.514 | |
| SMC_4FINGERS_RST | Default | d | 0.619 | |
| SMC_ACTUATOR_DISABLE_L | Default | d | 0.74 | |
| SMC_ADAPTER_EN | Default | d | 0.74 | |
| SMC_BC_ACOK | Default | d | 0.60 | |
| SMC_BC_ACOK | Default | v | 3.400 | |
| SMC_BMON_ISENSE | Default | d | 0.754 | |
| SMC_BT_PWR_EN | Default | d | 0.720 | |
| SMC_CHGR_INT_L | Default | d | 0.60 | |
| SMC_CLK12M_EN | Default | d | 0.464 | |
| SMC_CLK32K | Default | d | 0.633 | |
| SMC_CPUDDR_ISENSE | Default | d | 0.744 | |
| SMC_CPUGT_IMON_ISENSE | Default | d | 0.731 | |
| SMC_CPUGT_ISENSE | Default | d | 0.752 | |
| SMC_CPUGT_VSENSE | Default | d | 0.739 | |
| SMC_CPUHI_COMP_ALERT_L | Default | d | OL | |
| SMC_CPUSA_ISENSE | Default | d | 0.752 | |
| SMC_CPUSA_VSENSE | Default | d | 0.744 | |
| SMC_CPU_HI_ISENSE | Default | d | 0.744 | |
| SMC_CPU_IMON_ISENSE | Default | d | 0.748 | |
| SMC_CPU_ISENSE | Default | d | 0.757 | |
| SMC_CPU_VSENSE | Default | d | 0.738 | |
| SMC_DCIN_ISENSE | Default | d | 0.755 | |
| SMC_DCIN_VSENSE | Default | d | 0.747 | |
| SMC_DDR1V2_ISENSE | Default | d | 0.752 | |
| SMC_DEBUGPRT2_RX_L | Default | d | 0.744 | |
| SMC_DEBUGPRT2_R_RX | Default | d | 0.74 | |
| SMC_DEBUGPRT2_R_TX | Default | d | 0.74 | |
| SMC_DEBUGPRT2_TX_L | Default | d | 0.744 | |
| SMC_DEBUGPRT_RX_L | Default | d | 0.72 | |
| SMC_DEBUGPRT_TX_L | Default | d | 0.72 | |
| SMC_DELAYED_PWRGD | Default | d | 0.74 | |
| SMC_DEV_SUPPLY_L | Default | d | 0.740 | |
| SMC_DEV_SUPPLY_R_L | Default | d | 0.74 | |
| SMC_FAN_0_CTL | Default | d | 0.755 | |
| SMC_FAN_0_TACH | Default | d | 0.754 | |
| SMC_FAN_1_CTL | Default | d | 0.755 | |
| SMC_FAN_1_TACH | Default | d | 0.755 | |
| SMC_GFX_OVERTEMP | Default | d | 0.609 | |
| SMC_GFX_PWR_LEVEL_L | Default | d | 0.633 | |
| SMC_GFX_SELF_THROTTLE | Default | d | 0.631 | |
| SMC_GPU_1V8_ISENSE | Default | d | 0.744 | |
| SMC_GPU_CORE_ISENSE | Default | d | 0.757 | |
| SMC_GPU_CORE_VSENSE | Default | d | 0.738 | |
| SMC_GPU_FBIC_ISENSE | Default | d | 0.754 | |
| SMC_GPU_FB_ISENSE | Default | d | 0.154 | |
| SMC_GPU_HS_ISENSE | Default | d | 0.745 | |
| SMC_GPU_VDDCI_ISENSE | Default | d | 0.744 | |
| SMC_GPU_VDDCI_VSENSE | Default | d | 0.740 | |
| SMC_LID | Default | d | OL | |
| SMC_LID_LEFT | Default | d | 0.560 | |
| SMC_LID_LEFT_R | Default | d | 0.560 | |
| SMC_LID_R | Default | d | 0.716 | |
| SMC_LID_RIGHT | Default | d | 0.51 | |
| SMC_LRESET_L | Default | d | 0.755 | |
| SMC_LSOC_RST_L | Default | d | 0.757 | |
| SMC_ONOFF_L | Default | d | 0.72 | |
| SMC_ONOFF_L | Default | v | 3.400 | |
| SMC_OOB1_D2R_L | Default | d | 0.740 | |
| SMC_OOB1_R2D_L | Default | d | 0.740 | |
| SMC_PBUS_VSENSE | Default | d | 0.748 | |
| SMC_PCH_SUSACK_L | Default | d | 0.738 | |
| SMC_PCH_SUSWARN_L | Default | d | 0.738 | |
| SMC_PECI_L | Default | d | 0.729 | |
| SMC_PME_S4_DARK_L | Default | d | 0.55 | |
| SMC_PME_S4_WAKE_L | Default | d | 0.74 | |
| SMC_PMIC_INT_L | Default | d | 0.480 | |
| SMC_PM_G2_EN | Default | d | 0.50 | |
| SMC_PROCHOT | Default | d | 0.747 | |
| SMC_PROCHOT_L | Default | d | 0.557 | |
| SMC_RESET_L | Default | d | 0.71 | |
| SMC_RST_L | Default | d | 0.60 | |
| SMC_RUNTIME_SCI_L | Default | d | 0.738 | |
| SMC_SENSOR_ALERT_L | Default | d | 0.56 | |
| SMC_SENSOR_PWR_EN | Default | d | 0.606 | |
| SMC_SOCPMU_RESET | Default | d | 0.54 | |
| SMC_SSDLIM_ISENSE | Default | d | 0.754 | |
| SMC_TCK | Default | d | 0.75 | |
| SMC_TDI | Default | d | 0.749 | |
| SMC_TDO | Default | d | 0.749 | |
| SMC_THRMTRIP | Default | d | 0.744 | |
| SMC_THRMTRIP_L | Default | d | 0.376 | |
| SMC_TMS | Default | d | 0.75 | |
| SMC_TOPBLK_SWP_L | Default | d | 0.69 | |
| SMC_USBC_INT_L | Default | d | 0.64 | |
| SMC_VCCIO_CPU_DIV2 | Default | d | 0.747 | |
| SMC_VIBE_L | Default | d | 0.755 | |
| SMC_WAKE_L | Default | d | 0.74 | |
| SMC_WAKE_SCI_L | Default | d | 0.738 | |
| SMC_WIFI_EVENT_L | Default | d | 0.740 | |
| SMC_WIFI_PWR_EN | Default | d | 0.490 | |
| SML_PCH_0_CLK | Default | d | 0.781 | |
| SML_PCH_0_DATA | Default | d | 0.780 | |
| SOC_ALS_LS_EN | Default | d | 0.500 | |
| SOC_AWAKE_REQ | Default | d | 0.475 | |
| SOC_BOARD_ID_3 | Default | d | 0.470 | |
| SOC_BOARD_REV_0 | Default | d | 0.460 | |
| SOC_BOARD_REV_1 | Default | d | 0.470 | |
| SOC_BOARD_REV_2 | Default | d | 0.470 | |
| SOC_BOOT_CONFIG_0 | Default | d | 0.470 | |
| SOC_CLK_32K | Default | d | 0.434 | |
| SOC_DDR_RREF | Default | d | 0.525 | |
| SOC_FORCE_DFU | Default | d | 0.472 | |
| SOC_JTAG_SEL | Default | d | 0.478 | |
| SOC_MIPI0D_REXT | Default | d | 0.800 | |
| SOC_MIPI1C_REXT | Default | d | 0.800 | |
| SOC_NAND_CEN_0 | Default | d | 0.470 | |
| SOC_PAD_ZQ_A | Default | d | 0.450 | |
| SOC_PANIC_L | Default | d | 0.482 | |
| SOC_PCH_DBELL_L | Default | d | 0.470 | |
| SOC_PMU_BUCK0_FB | Default | d | 0.362 | |
| SOC_PMU_BUCK0_LX | Default | d | 0.390 | |
| SOC_PMU_BUCK0_LX | Default | v | 0.600 | |
| SOC_PMU_BUCK1_FB | Default | d | 0.150 | |
| SOC_PMU_BUCK1_LX | Default | d | 0.220 | |
| SOC_PMU_BUCK1_LX | Default | v | 0.800 | |
| SOC_PMU_BUCK2_FB | Default | d | 0.280 | |
| SOC_PMU_BUCK2_LX | Default | d | 0.280 | |
| SOC_PMU_BUCK2_LX | Default | v | 1.100 | |
| SOC_PMU_BUCK3_FB | Default | d | 0.390 | |
| SOC_PMU_BUCK3_LX | Default | d | 0.400 | |
| SOC_PMU_BUCK3_LX | Default | v | 1.800 | |
| SOC_PMU_CLK_32K | Default | d | 0.436 | |
| SOC_PMU_I2C_SCL | Default | d | 0.482 | |
| SOC_PMU_I2C_SDA | Default | d | 0.479 | |
| SOC_PMU_INCKT_OTP | Default | d | 0.003 | |
| SOC_REQUEST_DFU1 | Default | d | 0.470 | |
| SOC_REQUEST_DFU2 | Default | d | 0.470 | |
| SOC_ROM_SPI_CLK | Default | d | 0.450 | |
| SOC_ROM_SPI_CLK_R | Default | d | 0.463 | |
| SOC_ROM_SPI_CS_L | Default | d | 0.475 | |
| SOC_ROM_SPI_MISO | Default | d | 0.436 | |
| SOC_ROM_SPI_MISO_R | Default | d | 0.413 | |
| SOC_ROM_SPI_MOSI | Default | d | 0.460 | |
| SOC_ROM_SPI_MOSI_R | Default | d | 0.478 | |
| SOC_ROM_SPI_RST_L | Default | d | 0.613 | |
| SOC_ROM_SPI_WP_L | Default | d | 0.550 | |
| SOC_S2R_ACK_L | Default | d | 0.790 | |
| SOC_SLEEP1_REQ | Default | d | 0.475 | |
| SOC_SPI_BOOT_STATUS | Default | d | 0.481 | |
| SOC_SWCLK | Default | d | 0.482 | |
| SOC_SWCLK_DBG | Default | d | 0.492 | |
| SOC_SWDIO | Default | d | 0.482 | |
| SOC_SWDIO_DBG | Default | d | 0.491 | |
| SOC_SWD_CLK | Default | d | 0.665 | |
| SOC_SWD_LS_EN | Default | d | 0.500 | |
| SOC_TO_PCH_ALS_UART_TXD | Default | d | 0.460 | |
| SOC_TO_PCH_UART_TXD | Default | d | 0.460 | |
| SOC_TO_STOCKHOLM_DEV_WAKE | Default | d | 0.478 | |
| SOC_TO_STOCKHOLM_DWLD_REQ | Default | d | 0.478 | |
| SOC_TO_STOCKHOLM_EN | Default | d | 0.470 | |
| SOC_UART_D2R | Default | d | 0.448 | |
| SOC_UART_LS_EN | Default | d | 0.573 | |
| SOC_UART_R2D | Default | d | 0.45 | |
| SOC_UART_RTS_L | Default | d | 0.570 | |
| SOC_USB_REXT | Default | d | 0.200 | |
| SOC_USB_VBUS | Default | d | 0.767 | |
| SOC_WDOG_RST | Default | d | 0.482 | |
| SOC_XTAL_24M_I | Default | d | 0.814 | |
| SOC_XTAL_24M_O | Default | d | 0.800 | |
| SOC_XTAL_24M_O_R | Default | d | 0.800 | |
| SPIROM_USE_MLB | Default | d | 0.71 | |
| SPI_ALT_CLK | Default | d | 0.73 | |
| SPI_ALT_CS_L | Default | d | 0.70 | |
| SPI_ALT_IO0_MOSI | Default | d | 0.62 | |
| SPI_ALT_IO1_MISO | Default | d | 0.60 | |
| SPI_ALT_IO2_WP_L | Default | d | 0.60 | |
| SPI_ALT_IO3_HOLD_L | Default | d | 0.63 | |
| SPI_CLK | Default | d | 0.560 | |
| SPI_CLK_R | Default | d | 0.550 | |
| SPI_CS0_L | Default | d | 0.660 | |
| SPI_CS0_R_L | Default | d | 0.670 | |
| SPI_DESCRIPTOR_OVERRIDE | Default | d | 1.747 | |
| SPI_DESCRIPTOR_OVERRIDE_L | Default | d | 0.748 | |
| SPI_IO2_R | Default | d | 0.560 | |
| SPI_IO2_STRAP_L | Default | d | 0.720 | |
| SPI_IO3_R | Default | d | 0.720 | |
| SPI_IO<2> | Default | d | 0.600 | |
| SPI_IO<3> | Default | d | 0.570 | |
| SPI_MISO | Default | d | 0.570 | |
| SPI_MISO_R | Default | d | 0.590 | |
| SPI_MLBROM_CS_L | Default | d | 0.664 | |
| SPI_MLB_CLK | Default | d | 0.71 | |
| SPI_MLB_CS_L | Default | d | 0.692 | |
| SPI_MLB_IO0_MOSI | Default | d | 0.607 | |
| SPI_MLB_IO1_MISO | Default | d | 0.589 | |
| SPI_MLB_IO2_WP_L | Default | d | 0.593 | |
| SPI_MLB_IO3_HOLD_L | Default | d | 0.60 | |
| SPI_MOSI | Default | d | 0.710 | |
| SPI_MOSI_R | Default | d | 0.300 | |
| SPI_MOSI_R_CONN | Default | d | 0.86 | |
| SPKRAMP_R_SCLK | Default | d | 0.356 | |
| SPKRAMP_TL_LRCLK | Default | d | 0.350 | |
| SPKRAMP_TL_OUT_NEG | Default | d | 0.583 | |
| SPKRAMP_TL_OUT_POS | Default | d | 0.579 | |
| SPKRAMP_TL_SCLK | Default | d | 0.350 | |
| SPKRAMP_TL_SDIN | Default | d | 0.350 | |
| SPKRAMP_TR_OUT_NEG | Default | d | 0.587 | |
| SPKRAMP_TR_OUT_POS | Default | d | 0.587 | |
| SPKRAMP_WL_LRCLK | Default | d | 0.358 | |
| SPKRAMP_WL_OUT_NEG | Default | d | 0.583 | |
| SPKRAMP_WL_OUT_POS | Default | d | 0.583 | |
| SPKRAMP_WL_SCLK | Default | d | 0.358 | |
| SPKRAMP_WL_SDIN | Default | d | 0.358 | |
| SPKRAMP_WR_LRCLK | Default | d | 0.357 | |
| SPKRAMP_WR_OUT_NEG | Default | d | 0.589 | |
| SPKRAMP_WR_OUT_POS | Default | d | 0.587 | |
| SPKRAMP_WR_SCLK | Default | d | 0.358 | |
| SPKRAMP_WR_SDIN | Default | d | 0.357 | |
| SPKRCONN_TL_OUT_NEG | Default | d | 0.583 | |
| SPKRCONN_TL_OUT_POS | Default | d | 0.579 | |
| SPKRCONN_TR_OUT_NEG | Default | d | 0.587 | |
| SPKRCONN_TR_OUT_POS | Default | d | 0.588 | |
| SPKRCONN_WL_OUT_NEG | Default | d | 0.583 | |
| SPKRCONN_WL_OUT_POS | Default | d | 0.583 | |
| SPKRCONN_WR_OUT_NEG | Default | d | 0.588 | |
| SPKRCONN_WR_OUT_POS | Default | d | 0.588 | |
| SPKR_ID0 | Default | d | 0.759 | |
| SPKR_ID0_NC | Default | d | 0.79 | |
| SPROM_CLK | Default | d | 0.653 | |
| SPROM_CS | Default | d | 0.675 | |
| SPROM_DIN | Default | d | 0.639 | |
| SPROM_DOUT | Default | d | 0.676 | |
| SSD_3V3_SS | Default | d | 0.753 | |
| SSD_BOOT_L | Default | d | 0.44 | |
| SSD_BOOT_LB_L | Default | d | 0.448 | |
| SSD_CLKREQ_L | Default | d | 1.753 | |
| SSD_CLKREQ_LB_L | Default | d | 0.766 | |
| SSD_CLKREQ_L_R | Default | d | 0.760 | |
| SSD_DEBUGI2C_SEL_PCH | Default | d | 0.563 | |
| SSD_DEBUG_I2C_CLK | Default | d | 0.654 | |
| SSD_DEBUG_I2C_CLK_CONN | Default | d | 0.677 | |
| SSD_DEBUG_I2C_DAT | Default | d | 0.658 | |
| SSD_DEBUG_I2C_DAT_CONN | Default | d | 0.670 | |
| SSD_DEBUG_MUX_OE | Default | d | 0.542 | |
| SSD_FVREF0 | Default | d | 0.469 | |
| SSD_GP0 | Default | d | 0.000 | |
| SSD_GP10 | Default | d | 0.772 | |
| SSD_GP12 | Default | d | 0.460 | |
| SSD_GP8 | Default | d | 0.001 | |
| SSD_GP9 | Default | d | 0.762 | |
| SSD_I2C_CLK | Default | d | 0.553 | |
| SSD_I2C_DAT | Default | d | 0.559 | |
| SSD_NAND_FA_ZQ | Default | d | 0.254 | |
| SSD_NAND_FE_RDY | Default | d | 0.570 | |
| SSD_NAND_FF_RDY | Default | d | 0.582 | |
| SSD_NAND_FG_RDY | Default | d | 0.573 | |
| SSD_P3V3_NAND_CT | Default | d | 0.753 | |
| SSD_PGOOD_L | Default | d | 0.543 | |
| SSD_PMIC_LDO | Default | d | 0.503 | |
| SSD_PWRCON0 | Default | d | 0.450 | |
| SSD_PWRCON1_R0 | Default | d | 0.532 | |
| SSD_PWRCON1_R1 | Default | d | 0.533 | |
| SSD_PWRCON1_R2 | Default | d | 0.545 | |
| SSD_PWRCON2 | Default | d | 0.440 | |
| SSD_PWRCON3 | Default | d | 0.439 | |
| SSD_PWR_EN | Default | d | 0.50 | |
| SSD_PWR_LB_EN | Default | d | 0.521 | |
| SSD_RESET_B_L | Default | d | 0.564 | |
| SSD_RESET_L | Default | d | 0.46 | |
| SSD_RESET_LB_L | Default | d | 0.767 | |
| SSD_SR_EN_L | Default | d | 0.570 | |
| SSD_SVREF1 | Default | d | 0.758 | |
| SSD_SZQ | Default | d | 0.255 | |
| SSD_VREF_CA | Default | d | 0.787 | |
| SSD_VREF_DQ | Default | d | 0.781 | |
| SSD_ZQ0 | Default | d | 0.255 | |
| SW1_EXT_ON | Default | d | 0.550 | |
| SYSCLK_CLK24M_X1 | Default | d | 0.470 | |
| SYSCLK_CLK24M_X2 | Default | d | 0.470 | |
| SYSCLK_CLK24M_X2_R | Default | d | 0.470 | |
| SYSCLK_CLK32K_CAMERA_BT_AP | Default | d | 0.42 | |
| SYSCLK_CLK32K_OSC_SOC | Default | d | OL | |
| SYSCLK_CLK32K_OSC_Y1901 | Default | d | 0.469 | |
| SYS_DETECT_L | Default | d | OL | |
| TBA_AUX_DET | Default | d | 0.61 | |
| TBA_BGATE | Default | d | 0.628 | |
| TBA_BOOT1 | Default | d | 0.58 | |
| TBA_BOOT1_RC | Default | d | 0.580 | |
| TBA_BOOT2 | Default | d | 0.58 | |
| TBA_BOOT2_RC | Default | d | 0.580 | |
| TBA_COMP | Default | d | 0.61 | |
| TBA_CSI_N | Default | d | 0.55 | |
| TBA_CSI_N | Default | v | 20.000 | |
| TBA_CSI_P | Default | d | 0.55 | |
| TBA_CSI_P | Default | v | 20.000 | |
| TBA_CSI_R_N | Default | d | 0.550 | |
| TBA_CSI_R_N | Default | v | 20.000 | |
| TBA_CSI_R_P | Default | d | 0.550 | |
| TBA_CSI_R_P | Default | v | 20,000 | |
| TBA_CSO_N | Default | d | 0.360 | |
| TBA_CSO_N | Default | v | 13.100 | |
| TBA_CSO_P | Default | d | 0.360 | |
| TBA_CSO_P | Default | v | 13.100 | |
| TBA_CSO_R_N | Default | d | 0.360 | |
| TBA_CSO_R_N | Default | v | 13.100 | |
| TBA_CSO_R_P | Default | d | 0.360 | |
| TBA_CSO_R_P | Default | v | 13.100 | |
| TBA_GATE_Q1 | Default | d | 0.83 | |
| TBA_GATE_Q2 | Default | d | 0.48 | |
| TBA_GATE_Q3 | Default | d | 0.47 | |
| TBA_GATE_Q4 | Default | d | 0.83 | |
| TBA_LX1 | Default | d | 0.38 | |
| TBA_LX2 | Default | d | 0.38 | |
| TBA_PHASE1 | Default | d | 0.360 | |
| TBA_PHASE1 | Default | v | 13,100 | |
| TBA_PHASE2 | Default | d | 0.360 | |
| TBA_PHASE2 | Default | v | 13,100 | |
| TBA_VDDA | Default | d | 0.44 | |
| TBA_VDDP | Default | d | 0.44 | |
| TBTTHMSNS_T_ALERT_L | Default | d | 0.57 | |
| TBTTHMSNS_T_D1_N | Default | d | 0.000 | |
| TBTTHMSNS_T_D1_P | Default | d | 0.620 | |
| TBTTHMSNS_T_THM_L | Default | d | 0.58 | |
| TBTTHMSNS_X_ALERT_L | Default | d | 0.56 | |
| TBTTHMSNS_X_D1_N | Default | d | 0.000 | |
| TBTTHMSNS_X_D1_P | Default | d | 0.620 | |
| TBTTHMSNS_X_THM_L | Default | d | 0.58 | |
| TBTTPOCRST_CT | Default | d | 0.748 | |
| TBTTPOCRST_SNS | Default | d | 1.400 | |
| TBTXPOCRST_CT | Default | d | 0.750 | |
| TBTXPOCRST_SNS | Default | d | 1.400 | |
| TBT_POC_RESET | Default | d | 0.720 | |
| TBT_TA_USB2_RBIAS | Default | d | 0.500 | |
| TBT_TB_LSTX | Default | d | 0.609 | |
| TBT_TB_USB2_RBIAS | Default | d | 0.500 | |
| TBT_T_CIO_PLUG_EVENT_L | Default | d | 0.605 | |
| TBT_T_CIO_PWR_EN | Default | d | 0.600 | |
| TBT_T_CLKREQ_L | Default | d | 0.605 | |
| TBT_T_CLKREQ_L_R | Default | d | 0.780 | |
| TBT_T_DPMUX_SEL | Default | d | 0.790 | |
| TBT_T_FORCE_PWR | Default | d | 0.607 | |
| TBT_T_HDMI_DDC_CLK | Default | d | 0.607 | |
| TBT_T_HDMI_DDC_DATA | Default | d | 0.606 | |
| TBT_T_PCIE_BIAS | Default | d | 0.780 | |
| TBT_T_PCI_RESET_L | Default | d | 0.561 | |
| TBT_T_RBIAS | Default | d | 0.780 | |
| TBT_T_ROM_HOLD_L | Default | d | 0.702 | |
| TBT_T_ROM_WP_L | Default | d | 0.600 | |
| TBT_T_RSENSE | Default | d | 0.000 | |
| TBT_T_SPI_CLK | Default | d | 0.574 | |
| TBT_T_SPI_CLK_DBG | Default | d | 0.673 | |
| TBT_T_SPI_CS_L | Default | d | 0.600 | |
| TBT_T_SPI_MISO | Default | d | 0.605 | |
| TBT_T_SPI_MOSI | Default | d | 0.611 | |
| TBT_T_TEST_PWR_GOOD | Default | d | 0.100 | |
| TBT_T_TMU_CLK_IN | Default | d | 0.577 | |
| TBT_T_TMU_CLK_OUT | Default | d | 0.579 | |
| TBT_T_USB_PWR_EN | Default | d | 0.598 | |
| TBT_T_XTAL25M_IN | Default | d | 0.827 | |
| TBT_T_XTAL25M_OUT_R | Default | d | 0.770 | |
| TBT_W_CLKREQ_L | Default | d | 0.783 | |
| TBT_W_PCI_RESET_L | Default | d | 0.786 | |
| TBT_W_USB_PWR_EN | Default | d | 0.590 | |
| TBT_XB_LSRX | Default | d | 0.606 | |
| TBT_XB_LSTX | Default | d | 0.606 | |
| TBT_X_CIO_PLUG_EVENT_L | Default | d | 0.608 | |
| TBT_X_CIO_PWR_EN | Default | d | 0.60 | |
| TBT_X_CLKREQ_L | Default | d | 0.613 | |
| TBT_X_CLKREQ_L_R | Default | d | 0.773 | |
| TBT_X_DPMUX_SEL | Default | d | 0.570 | |
| TBT_X_FORCE_PWR | Default | d | 0.60 | |
| TBT_X_HDMI_DDC_CLK | Default | d | 0.607 | |
| TBT_X_HDMI_DDC_DATA | Default | d | 0.608 | |
| TBT_X_PCIE_BIAS | Default | d | 0.785 | |
| TBT_X_PCI_RESET_L | Default | d | 0.570 | |
| TBT_X_RBIAS | Default | d | 0.78 | |
| TBT_X_ROM_HOLD_L | Default | d | 0.70 | |
| TBT_X_ROM_WP_L | Default | d | 0.60 | |
| TBT_X_RSENSE | Default | d | 0.000 | |
| TBT_X_SPI_CLK | Default | d | 0.57 | |
| TBT_X_SPI_CLK_DBG | Default | d | 0.677 | |
| TBT_X_SPI_CS_L | Default | d | 0.61 | |
| TBT_X_SPI_MISO | Default | d | 0.580 | |
| TBT_X_SPI_MOSI | Default | d | 0.612 | |
| TBT_X_TEST_EN | Default | d | 0.990 | |
| TBT_X_TEST_PWR_GOOD | Default | d | 0.990 | |
| TBT_X_TMU_CLK_IN | Default | d | 578.000 | |
| TBT_X_TMU_CLK_OUT | Default | d | 0.57 | |
| TBT_X_USB_PWR_EN | Default | d | 0.60 | |
| TBT_X_XTAL25M_IN | Default | d | 0.830 | |
| TBT_X_XTAL25M_OUT_R | Default | d | 0.760 | |
| TPAD_SPI_CLK | Default | d | 0.81 | |
| TPAD_SPI_CLK_CONN | Default | d | 0.81 | |
| TPAD_SPI_CLK_R | Default | d | 0.785 | |
| TPAD_SPI_CS_L | Default | d | 0.81 | |
| TPAD_SPI_CS_L_CONN | Default | d | 0.87 | |
| TPAD_SPI_CS_L_R | Default | d | 0.786 | |
| TPAD_SPI_IF_EN | Default | d | 0.540 | |
| TPAD_SPI_IF_EN_CONN | Default | d | 0.69 | |
| TPAD_SPI_INT_L | Default | d | 0.691 | |
| TPAD_SPI_INT_L_CONN | Default | d | 0.68 | |
| TPAD_SPI_MISO | Default | d | 0.78 | |
| TPAD_SPI_MISO_R | Default | d | 0.78 | |
| TPAD_SPI_MOSI | Default | d | 0.81 | |
| TPAD_SPI_MOSI_R | Default | d | 0.785 | |
| TP_BMON_IOUT | Default | d | OL | |
| TP_CARBON_INT1 | Default | d | OL | |
| TP_CARBON_INT2 | Default | d | OL | |
| TP_CPU_RSVD_AA14 | Default | d | 0.007 | |
| TP_CPU_RSVD_AE29 | Default | d | 0.004 | |
| TP_CPU_RSVD_R14 | Default | d | 0.007 | |
| TP_DPA_IG_HPD | Default | d | 0.640 | |
| TP_DPMUX_UC_P60 | Default | d | 0.639 | |
| TP_DPMUX_UC_P61 | Default | d | 0.638 | |
| TP_EG_BKLT_PWM | Default | d | 0.377 | |
| TP_GPUVCORE_IMON | Default | d | 0.604 | |
| TP_J3300_P2 | Default | d | 0.17 | |
| TP_J3300_P56 | Default | d | 0.17 | |
| TP_JB500_P2 | Default | d | OL | |
| TP_JB500_P56 | Default | d | OL | |
| TP_PCH_DMIC_CLK0 | Default | d | 0.789 | |
| TP_PCH_DMIC_CLK1 | Default | d | 0.790 | |
| TP_PCH_DMIC_DATA0 | Default | d | 0.789 | |
| TP_PCH_DMIC_DATA1 | Default | d | 0.790 | |
| TP_PVDDCI_GPU_EN | Default | d | 0.632 | |
| TP_Q3100_DRAIN | Default | d | 0.643 | |
| TP_Q3200_DRAIN | Default | d | 0.63 | |
| TP_QB300_DRAIN | Default | d | 0.628 | |
| TP_QB400_DRAIN | Default | d | 0.634 | |
| TP_SOC_CLKOUT | Default | d | 0.481 | |
| TP_SOC_JTAG_TDI | Default | d | 0.479 | |
| TP_SOC_JTAG_TDO | Default | d | 0.479 | |
| TP_SOC_JTAG_TRST_L | Default | d | 0.480 | |
| TP_SOC_TST_CKOUT | Default | d | 0.486 | |
| TP_SYS_ONEWIRE | Default | d | 0.747 | |
| TP_U9900_5 | Default | d | OL | |
| TP_UPC_TA_DBG_UART_RX | Default | d | 0.764 | |
| TP_UPC_TA_DBG_UART_TX | Default | d | 0.767 | |
| TP_UPC_TA_SWD_CLK | Default | d | 0.747 | |
| TP_UPC_TA_SWD_DATA | Default | d | 0.748 | |
| TP_UPC_TB_DBG_UART_RX | Default | d | 0.765 | |
| TP_UPC_TB_DBG_UART_TX | Default | d | 0.767 | |
| TP_UPC_TB_SWD_CLK | Default | d | 0.740 | |
| TP_UPC_TB_SWD_DATA | Default | d | 0.740 | |
| TP_UPC_XA_SWD_CLK | Default | d | 0.745 | |
| TP_UPC_XA_SWD_DATA | Default | d | 0.745 | |
| TP_UPC_XB_DBG_UART_RX | Default | d | 0.770 | |
| TP_UPC_XB_DBG_UART_TX | Default | d | 0.773 | |
| TP_UPC_XB_SWD_CLK | Default | d | 0.740 | |
| TP_UPC_XB_SWD_DATA | Default | d | 0.742 | |
| UNCONNECTED_397 | Default | d | OL | |
| UNCONNECTED_398 | Default | d | OL | |
| UPC_TA_DBG1 | Default | d | 0.775 | |
| UPC_TA_DBG2 | Default | d | 0.774 | |
| UPC_TA_DBG3 | Default | d | 0.769 | |
| UPC_TA_DBG4 | Default | d | 0.774 | |
| UPC_TA_FAULT_L | Default | d | 0.760 | |
| UPC_TA_GATE1 | Default | d | 0.653 | |
| UPC_TA_GATE2 | Default | d | 0.644 | |
| UPC_TA_HPD_RX | Default | d | 0.778 | |
| UPC_TA_I2C_ADDR | Default | d | 0.001 | |
| UPC_TA_R_OSC | Default | d | 0.534 | |
| UPC_TA_SPI_CLK | Default | d | 0.580 | |
| UPC_TA_SPI_CS_L | Default | d | 0.610 | |
| UPC_TA_SPI_MISO | Default | d | 0.619 | |
| UPC_TA_SPI_MOSI | Default | d | 0.615 | |
| UPC_TA_SS | Default | d | 0.533 | |
| UPC_TA_UART_RX | Default | d | 0.757 | |
| UPC_TA_UART_TX | Default | d | 0.722 | |
| UPC_TB_DBG3 | Default | d | 0.773 | |
| UPC_TB_DBG4 | Default | d | 0.773 | |
| UPC_TB_FAULT_L | Default | d | 0.757 | |
| UPC_TB_GATE1 | Default | d | 0.651 | |
| UPC_TB_GATE2 | Default | d | 0.643 | |
| UPC_TB_HPD_RX | Default | d | 776.000 | |
| UPC_TB_R_OSC | Default | d | 0.524 | |
| UPC_TB_SS | Default | d | 0.528 | |
| UPC_T_5V_EN | Default | d | 0.540 | |
| UPC_T_SPI_CLK | Default | d | 0.571 | |
| UPC_T_SPI_CS_L | Default | d | 0.595 | |
| UPC_T_SPI_MISO | Default | d | 0.600 | |
| UPC_T_SPI_MOSI | Default | d | 0.599 | |
| UPC_XA_DBG_UART_RX | Default | d | 0.770 | |
| UPC_XA_DBG_UART_TX | Default | d | 0.772 | |
| UPC_XA_FAULT_L | Default | d | 0.755 | |
| UPC_XA_GATE1 | Default | d | 0.658 | |
| UPC_XA_GATE2 | Default | d | 0.649 | |
| UPC_XA_HPD_RX | Default | d | 0.001 | |
| UPC_XA_R_OSC | Default | d | 0.528 | |
| UPC_XA_SS | Default | d | 0.252 | |
| UPC_XA_UART_RX | Default | d | 0.759 | |
| UPC_XA_UART_TX | Default | d | 0.510 | |
| UPC_XB_FAULT_L | Default | d | 0.750 | |
| UPC_XB_GATE1 | Default | d | 0.649 | |
| UPC_XB_GATE2 | Default | d | 0.64 | |
| UPC_XB_HPD_RX | Default | d | 0.000 | |
| UPC_XB_R_OSC | Default | d | 0.528 | |
| UPC_XB_SPI_CLK | Default | d | 0.591 | |
| UPC_XB_SPI_CS_L | Default | d | 0.624 | |
| UPC_XB_SPI_MISO | Default | d | 0.630 | |
| UPC_XB_SPI_MOSI | Default | d | 0.638 | |
| UPC_XB_SS | Default | d | 0.526 | |
| UPC_X_5V_EN | Default | d | 0.544 | |
| UPC_X_SPI_CLK | Default | d | 0.574 | |
| UPC_X_SPI_CS_L | Default | d | 0.598 | |
| UPC_X_SPI_MISO | Default | d | 0.601 | |
| USB2_COMP | Default | d | 0.114 | |
| USB2_ID | Default | d | 0.773 | |
| USB2_UPC_TA_N | Default | d | 0.570 | |
| USB2_UPC_TA_P | Default | d | 0.570 | |
| USB2_UPC_TB_N | Default | d | 0.610 | |
| USB2_UPC_TB_P | Default | d | 0.610 | |
| USB2_UPC_XA_N | Default | d | 0.600 | |
| USB2_UPC_XA_P | Default | d | 0.600 | |
| USB2_UPC_XB_N | Default | d | 0.610 | |
| USB2_UPC_XB_P | Default | d | 0.610 | |
| USB2_VBUSSENSE | Default | d | 0.775 | |
| USB3_EXTA_R2D_C_N | Default | d | 0.410 | |
| USB3_EXTA_R2D_C_P | Default | d | 0.410 | |
| USB3_EXTA_R2D_N | Default | d | 0.771 | |
| USB3_EXTA_R2D_P | Default | d | 0.772 | |
| USB3_TEST_D2R_N | Default | d | 0.45 | |
| USB3_TEST_D2R_P | Default | d | 0.45 | |
| USB3_TEST_R2D_N | Default | d | 0.42 | |
| USB3_TEST_R2D_P | Default | d | 0.42 | |
| USBC_TA_CC1 | Default | d | 0.605 | |
| USBC_TA_CC2 | Default | d | 0.614 | |
| USBC_TA_D2R_N<1> | Default | d | 0.329 | |
| USBC_TA_D2R_N<2> | Default | d | 0.327 | |
| USBC_TA_D2R_P<1> | Default | d | 0.328 | |
| USBC_TA_D2R_P<2> | Default | d | 0.327 | |
| USBC_TA_R2D_N<1> | Default | d | OL | |
| USBC_TA_R2D_N<2> | Default | d | OL | |
| USBC_TA_R2D_P<1> | Default | d | OL | |
| USBC_TA_R2D_P<2> | Default | d | OL | |
| USBC_TA_SBU1 | Default | d | 0.873 | |
| USBC_TA_SBU2 | Default | d | 0.835 | |
| USBC_TA_USB_BOT_N | Default | d | OL | |
| USBC_TA_USB_BOT_P | Default | d | OL | |
| USBC_TA_USB_TOP_N | Default | d | 0.600 | |
| USBC_TA_USB_TOP_P | Default | d | OL | |
| USBC_TB_CC1 | Default | d | 0.598 | |
| USBC_TB_CC2 | Default | d | 0.608 | |
| USBC_TB_D2R_N<1> | Default | d | 0.329 | |
| USBC_TB_D2R_N<2> | Default | d | 0.329 | |
| USBC_TB_D2R_P<1> | Default | d | 0.329 | |
| USBC_TB_D2R_P<2> | Default | d | 0.329 | |
| USBC_TB_R2D_N<1> | Default | d | OL | |
| USBC_TB_R2D_N<2> | Default | d | OL | |
| USBC_TB_R2D_P<1> | Default | d | OL | |
| USBC_TB_R2D_P<2> | Default | d | OL | |
| USBC_TB_SBU1 | Default | d | 0.857 | |
| USBC_TB_SBU2 | Default | d | 0.819 | |
| USBC_TB_USB_BOT_N | Default | d | OL | |
| USBC_TB_USB_BOT_P | Default | d | OL | |
| USBC_TB_USB_TOP_N | Default | d | OL | |
| USBC_TB_USB_TOP_P | Default | d | OL | |
| USBC_T_RESET_L | Default | d | 0.733 | |
| USBC_T_RESET_L_R | Default | d | 0.549 | |
| USBC_XA_CC1 | Default | d | 0.602 | |
| USBC_XA_CC2 | Default | d | 0.60 | |
| USBC_XA_D2R_N<2> | Default | d | 0.357 | |
| USBC_XA_D2R_P<2> | Default | d | 0.358 | |
| USBC_XA_R2D_N<2> | Default | d | OL | |
| USBC_XA_R2D_P<2> | Default | d | OL | |
| USBC_XA_SBU1 | Default | d | 0.869 | |
| USBC_XA_SBU2 | Default | d | 0.864 | |
| USBC_XA_USB_DBG_BOT_N | Default | d | OL | |
| USBC_XA_USB_DBG_BOT_P | Default | d | OL | |
| USBC_XB_CC1 | Default | d | 0.60 | |
| USBC_XB_CC2 | Default | d | 0.61 | |
| USBC_XB_D2R_N<1> | Default | d | 0.355 | |
| USBC_XB_D2R_N<2> | Default | d | 0.358 | |
| USBC_XB_D2R_P<1> | Default | d | 0.356 | |
| USBC_XB_D2R_P<2> | Default | d | 0.357 | |
| USBC_XB_R2D_N<1> | Default | d | OL | |
| USBC_XB_R2D_N<2> | Default | d | OL | |
| USBC_XB_R2D_P<1> | Default | d | OL | |
| USBC_XB_R2D_P<2> | Default | d | OL | |
| USBC_XB_SBU1 | Default | d | 0.789 | |
| USBC_XB_SBU2 | Default | d | 0.790 | |
| USBC_XB_USB_BOT_N | Default | d | OL | |
| USBC_XB_USB_BOT_P | Default | d | OL | |
| USBC_XB_USB_TOP_N | Default | d | OL | |
| USBC_XB_USB_TOP_P | Default | d | OL | |
| USBC_X_RESET_L | Default | d | 0.732 | |
| USBC_X_RESET_L_R | Default | d | 0.540 | |
| USB_TEST_N | Default | d | 0.63 | |
| USB_TEST_P | Default | d | 0.62 | |
| USB_UPC_PCH_TA_N | Default | d | 0.570 | |
| USB_UPC_PCH_TA_P | Default | d | 0.570 | |
| USB_UPC_PCH_TB_N | Default | d | 0.570 | |
| USB_UPC_PCH_TB_P | Default | d | 0.570 | |
| USB_UPC_PCH_XA_N | Default | d | 0.575 | |
| USB_UPC_PCH_XA_P | Default | d | 0.575 | |
| USB_UPC_PCH_XB_N | Default | d | 0.580 | |
| USB_UPC_PCH_XB_P | Default | d | 0.580 | |
| USB_UPC_TA_F_N | Default | d | 0.570 | |
| USB_UPC_TA_F_P | Default | d | 0.570 | |
| USB_UPC_TA_N | Default | d | 0.690 | |
| USB_UPC_TA_P | Default | d | 0.690 | |
| USB_UPC_TB_F_N | Default | d | 0.610 | |
| USB_UPC_TB_F_P | Default | d | 0.610 | |
| USB_UPC_TB_N | Default | d | 0.709 | |
| USB_UPC_TB_P | Default | d | 0.705 | |
| USB_UPC_XA_F_N | Default | d | 0.600 | |
| USB_UPC_XA_F_P | Default | d | 0.600 | |
| USB_UPC_XA_N | Default | d | 0.640 | |
| USB_UPC_XA_P | Default | d | 0.640 | |
| USB_UPC_XB_F_N | Default | d | 0.610 | |
| USB_UPC_XB_F_P | Default | d | 0.610 | |
| USB_UPC_XB_N | Default | d | 0.640 | |
| USB_UPC_XB_P | Default | d | 0.640 | |
| VDDCIS0_CS_N | Default | d | 0.019 | |
| VDDCIS0_CS_P | Default | d | 0.019 | |
| VR0V9_IND_TBT_T | Default | d | 0.245 | |
| VR0V9_IND_TBT_T | Default | v | 0.900 | |
| VR0V9_IND_TBT_X | Default | d | 0.220 | |
| VR0V9_IND_TBT_X | Default | v | 0.900 | |
| VREF_AMP_TL | Default | d | 0.000 | |
| VREF_AMP_TR | Default | d | 0.574 | |
| VRVDDCI_R | Default | d | 0.018 | |
| VRVDDCI_R | Default | r | 26.24R | |
| VRVDDCI_R | Default | v | 0.900 | |
| VR_PHASE_GPU_VDDCI | Default | d | 0.018 | |
| VR_PHASE_GPU_VDDCI | Default | r | 26.24R | |
| VR_PHASE_GPU_VDDCI | Default | v | 0.900 | |
| WIFI_SROM_ORG | Default | d | 0.695 | |
| WIFI_SW_CAP | Default | d | 0.670 | |
| WLAN_1P2V_EN | Default | d | 0.579 | |
| WLAN_3V3_VMON | Default | d | OL | |
| WLAN_JTAG_SEL | Default | d | 0.600 | |
| WLAN_JTAG_TCK | Default | d | 0.572 | |
| WLAN_JTAG_TDI | Default | d | 0.579 | |
| WLAN_JTAG_TMS | Default | d | 0.608 | |
| WLAN_JTAG_TRST_L | Default | d | 0.570 | |
| WLAN_STRAP_0 | Default | d | 0.500 | |
| WLAN_STRAP_1 | Default | d | 0.460 | |
| WLAN_UART_RX | Default | d | 0.600 | |
| WLAN_UART_TX | Default | d | 0.608 | |
| WL_CLK32K | Default | d | 0.486 | |
| X29THMSNS_A0 | Default | d | 0.627 | |
| XDP_BPM_L<0> | Default | d | 0.299 | |
| XDP_BPM_L<1> | Default | d | 0.298 | |
| XDP_BPM_L<2> | Default | d | 0.300 | |
| XDP_BPM_L<3> | Default | d | 0.302 | |
| XDP_CPU_PRDY_L | Default | d | 0.26 | |
| XDP_CPU_PREQ_L | Default | d | 0.29 | |
| XDP_CPU_PWRBTN_L | Default | d | 0.740 | |
| XDP_CPU_TCK | Default | d | 0.052 | |
| XDP_CPU_TDI | Default | d | 0.257 | |
| XDP_CPU_TDO | Default | d | 0.232 | |
| XDP_CPU_TMS | Default | d | 0.258 | |
| XDP_CPU_TRST_L | Default | d | 0.307 | |
| XDP_DBRESET_L | Default | d | 0.741 | |
| XDP_PCH_OBSDATA_A0 | Default | d | 0.787 | |
| XDP_PCH_OBSDATA_A1 | Default | d | 0.788 | |
| XDP_PCH_OBSDATA_A2 | Default | d | 0.788 | |
| XDP_PCH_OBSDATA_A3 | Default | d | 0.788 | |
| XDP_PCH_OBSDATA_B0 | Default | d | 0.788 | |
| XDP_PCH_OBSDATA_B1 | Default | d | 0.788 | |
| XDP_PCH_OBSDATA_B2 | Default | d | 0.789 | |
| XDP_PCH_OBSDATA_B3 | Default | d | 0.790 | |
| XDP_PCH_OBSDATA_C0 | Default | d | 0.754 | |
| XDP_PCH_OBSDATA_C1 | Default | d | 0.752 | |
| XDP_PCH_OBSDATA_C2 | Default | d | 0.760 | |
| XDP_PCH_OBSDATA_C3 | Default | d | 0.753 | |
| XDP_PCH_OBSDATA_D0 | Default | d | 0.789 | |
| XDP_PCH_OBSDATA_D1 | Default | d | 0.790 | |
| XDP_PCH_OBSDATA_D2 | Default | d | 0.789 | |
| XDP_PCH_OBSDATA_D3 | Default | d | 0.790 | |
| XDP_PCH_OBSFN_C0 | Default | d | 0.788 | |
| XDP_PCH_OBSFN_C1 | Default | d | 0.789 | |
| XDP_PCH_TCK | Default | d | 0.423 | |
| XDP_PCH_TDI | Default | d | 0.261 | |
| XDP_PCH_TDO | Default | d | 0.243 | |
| XDP_PCH_TMS | Default | d | 0.262 | |
| XDP_PCH_TRST_L | Default | d | 0.29 | |
| XDP_PM_RSMRST_L | Default | d | 1.480 | |
| XDP_PRESENT_CPU | Default | d | 1.308 | |
| XDP_PRESENT_L | Default | d | 0.513 | |
Component values
- v = value (1uF, 410R)
- r = rating (25V)
- c = Manufacturer code
- p = Package (SOT23-5)
- m = misc
- s = status ('-' = no stuff )
| Component | Type | Value |
| C10A0 |
s |
- |
| C10A2 |
s |
- |
| C10A3 |
s |
- |
| C10A8 |
s |
- |
| C10A9 |
s |
- |
| C10B0 |
s |
- |
| C10B2 |
s |
- |
| C10B6 |
s |
- |
| C10B7 |
s |
- |
| C10B8 |
s |
- |
| C10B9 |
s |
- |
| C10C3 |
s |
- |
| C10C4 |
s |
- |
| C10C5 |
s |
- |
| C10D5 |
s |
- |
| C10E0 |
s |
- |
| C10E1 |
s |
- |
| C10E2 |
s |
- |
| C10E3 |
s |
- |
| C10Z1 |
s |
- |
| C10Z6 |
s |
- |
| C10Z7 |
s |
- |
| C10Z8 |
s |
- |
| C10Z9 |
s |
- |
| C10ZA |
s |
- |
| C10ZB |
s |
- |
| C10ZC |
s |
- |
| C11A0 |
s |
- |
| C11A1 |
s |
- |
| C11A2 |
s |
- |
| C11A3 |
s |
- |
| C11A4 |
s |
- |
| C11A5 |
s |
- |
| C11A6 |
s |
- |
| C11A8 |
s |
- |
| C11A9 |
s |
- |
| C11B0 |
s |
- |
| C11B2 |
s |
- |
| C11B4 |
s |
- |
| C11B5 |
s |
- |
| C11B6 |
s |
- |
| C11B7 |
s |
- |
| C11C1 |
s |
- |
| C11C2 |
s |
- |
| C11C3 |
s |
- |
| C11C6 |
s |
- |
| C11C8 |
s |
- |
| C11D1 |
s |
- |
| C11D2 |
s |
- |
| C11D3 |
s |
- |
| C11E0 |
s |
- |
| C11E1 |
s |
- |
| C11E2 |
s |
- |
| C11E5 |
s |
- |
| C11F0 |
s |
- |
| C11F3 |
s |
- |
| C11F6 |
s |
- |
| C11I0 |
s |
- |
| C11I1 |
s |
- |
| C11I3 |
s |
- |
| C11I7 |
s |
- |
| C11J0 |
s |
- |
| C11J1 |
s |
- |
| C3431 |
s |
- |
| C4080 |
s |
- |
| C4300 |
s |
- |
| C4511 |
s |
- |
| C5134 |
s |
- |
| C5250 |
s |
- |
| C5257 |
s |
- |
| C5260 |
s |
- |
| C5270 |
s |
- |
| C5552 |
s |
- |
| C5553 |
s |
- |
| C5569 |
s |
- |
| C5665 |
s |
- |
| C5729 |
s |
- |
| C5901 |
s |
- |
| C5911 |
s |
- |
| C6282 |
s |
- |
| C6283 |
s |
- |
| C6286 |
s |
- |
| C6287 |
s |
- |
| C6320 |
s |
- |
| C6321 |
s |
- |
| C6322 |
s |
- |
| C6380 |
s |
- |
| C7218 |
s |
- |
| C7228 |
s |
- |
| C7238 |
s |
- |
| C7378 |
s |
- |
| C7418 |
s |
- |
| C7428 |
s |
- |
| C7917 |
s |
- |
| C7969 |
s |
- |
| C8009 |
s |
- |
| C8029 |
s |
- |
| C8209 |
s |
- |
| C8401 |
s |
- |
| C8430 |
s |
- |
| C8752 |
s |
- |
| C8753 |
s |
- |
| C9302 |
s |
- |
| C9382 |
s |
- |
| CA200 |
s |
- |
| CA201 |
s |
- |
| CA380 |
s |
- |
| CA432 |
s |
- |
| CA433 |
s |
- |
| CA482 |
s |
- |
| CA483 |
s |
- |
| CA496 |
s |
- |
| CA498 |
s |
- |
| CA532 |
s |
- |
| CA533 |
s |
- |
| CA582 |
s |
- |
| CA583 |
s |
- |
| CA662 |
s |
- |
| CA664 |
s |
- |
| CA665 |
s |
- |
| CA668 |
s |
- |
| CA880 |
s |
- |
| CA881 |
s |
- |
| CC70A |
s |
- |
| CC785 |
s |
- |
| CC803 |
s |
- |
| CC804 |
s |
- |
| CC830 |
s |
- |
| CC832 |
s |
- |
| CC835 |
s |
- |
| CC837 |
s |
- |
| D3400 |
s |
- |
| D5557 |
s |
- |
| L1602 |
M |
- |
| R0510 |
v |
24.9 |
| R0521 |
v |
49.9 |
| R0522 |
v |
49.9 |
| R0523 |
v |
49.9 |
| R0524 |
v |
30 |
| R0525 |
v |
20 |
| R0526 |
v |
20 |
| R0530 |
v |
24.9 |
| R0601 |
v |
1K |
| R0603 |
v |
499 |
| R0604 |
v |
49.9 |
| R0605 |
v |
1K |
| R0611 |
v |
10K |
| R0612 |
v |
200 |
| R0613 |
v |
121 |
| R0614 |
v |
162 |
| R0640 |
s |
- |
| R0640 |
v |
1K |
| R0641 |
s |
- |
| R0641 |
v |
1K |
| R0642 |
s |
- |
| R0642 |
v |
1K |
| R0643 |
s |
- |
| R0643 |
v |
1K |
| R0644 |
v |
1K |
| R0645 |
v |
1K |
| R0646 |
v |
1K |
| R0647 |
s |
- |
| R0647 |
v |
1K |
| R0648 |
s |
- |
| R0648 |
v |
1K |
| R0649 |
s |
- |
| R0649 |
v |
1K |
| R0690 |
v |
49.9 |
| R0701 |
v |
0 |
| R0702 |
v |
0 |
| R0703 |
s |
- |
| R0703 |
v |
0 |
| R0704 |
v |
0 |
| R0800 |
v |
56.2 |
| R0802 |
v |
100 |
| R0810 |
v |
220 |
| R0811 |
v |
0 |
| R0812 |
v |
0 |
| R0840 |
v |
1K |
| R0841 |
v |
60.4 |
| R0861 |
v |
100 |
| R0864 |
v |
100 |
| R0865 |
v |
100 |
| R0866 |
v |
100 |
| R0961 |
v |
100 |
| R0963 |
v |
100 |
| R0965 |
v |
100 |
| R0966 |
v |
100 |
| R1201 |
v |
1M |
| R1202 |
v |
20K |
| R1203 |
v |
20K |
| R1204 |
s |
- |
| R1204 |
v |
0 |
| R1205 |
v |
100K |
| R1206 |
v |
10K |
| R1207 |
v |
100K |
| R1208 |
v |
10K |
| R1209 |
v |
100K |
| R1210 |
v |
1K |
| R1211 |
v |
100K |
| R1212 |
v |
10K |
| R1213 |
v |
10K |
| R1214 |
v |
100K |
| R1215 |
v |
100K |
| R1216 |
v |
100K |
| R1230 |
v |
100K |
| R1231 |
v |
100K |
| R1232 |
v |
100K |
| R1233 |
v |
100K |
| R1234 |
v |
2.7K |
| R1235 |
v |
22 |
| R1236 |
v |
100K |
| R1237 |
v |
100K |
| R1238 |
v |
47K |
| R1239 |
v |
47K |
| R1240 |
v |
47K |
| R1241 |
v |
100K |
| R1242 |
v |
100K |
| R1243 |
v |
100K |
| R1244 |
v |
100K |
| R1245 |
v |
100K |
| R1246 |
v |
100K |
| R1247 |
v |
3.0K |
| R1248 |
v |
100K |
| R1251 |
v |
100K |
| R1300 |
v |
47K |
| R1301 |
v |
47K |
| R1302 |
v |
47K |
| R1303 |
v |
1K |
| R1304 |
v |
47K |
| R1305 |
v |
47K |
| R1306 |
v |
47K |
| R1307 |
v |
150K |
| R1308 |
v |
0 |
| R1309 |
v |
620 |
| R1310 |
v |
33 |
| R1311 |
v |
33 |
| R1312 |
v |
33 |
| R1313 |
v |
33 |
| R1314 |
v |
33 |
| R1315 |
v |
13 |
| R1316 |
v |
100K |
| R1317 |
v |
100K |
| R1318 |
s |
- |
| R1318 |
v |
1K |
| R1319 |
v |
33 |
| R1320 |
v |
33 |
| R1321 |
v |
33 |
| R1322 |
v |
33 |
| R1323 |
v |
33 |
| R1324 |
v |
0 |
| R1325 |
v |
33 |
| R1326 |
v |
150K |
| R1327 |
v |
33 |
| R1328 |
v |
33 |
| R1329 |
v |
33 |
| R1330 |
v |
33 |
| R1331 |
v |
100K |
| R1341 |
v |
1K |
| R1400 |
v |
100 |
| R1410 |
v |
1K |
| R1411 |
v |
1K |
| R1420 |
v |
10K |
| R1421 |
v |
10K |
| R1440 |
v |
33 |
| R1441 |
v |
33 |
| R1442 |
v |
33 |
| R1443 |
v |
33 |
| R1444 |
v |
33 |
| R1460 |
v |
10K |
| R1461 |
v |
10K |
| R1462 |
v |
100K |
| R1470 |
v |
113 |
| R1502 |
v |
47K |
| R1503 |
v |
47K |
| R1504 |
v |
47K |
| R1505 |
v |
47K |
| R1506 |
v |
47K |
| R1507 |
v |
47K |
| R1508 |
v |
1K |
| R1509 |
v |
1K |
| R1511 |
v |
100K |
| R1512 |
v |
10K |
| R1513 |
v |
100K |
| R1515 |
v |
100K |
| R1520 |
v |
47K |
| R1521 |
v |
47K |
| R1522 |
v |
47K |
| R1523 |
v |
47K |
| R1524 |
v |
100K |
| R1525 |
v |
100K |
| R1526 |
v |
100K |
| R1527 |
v |
1K |
| R1528 |
v |
1K |
| R1529 |
v |
100K |
| R1530 |
v |
1K |
| R1531 |
v |
1K |
| R1532 |
v |
1K |
| R1533 |
v |
1K |
| R1534 |
v |
1K |
| R1535 |
v |
100K |
| R1536 |
v |
100K |
| R1537 |
v |
100K |
| R1538 |
v |
100K |
| R1539 |
v |
100K |
| R1540 |
v |
1K |
| R1541 |
v |
1K |
| R1542 |
v |
1K |
| R1543 |
v |
1K |
| R1544 |
v |
1K |
| R1545 |
s |
- |
| R1545 |
v |
1K |
| R1546 |
v |
100K |
| R1547 |
v |
100K |
| R1548 |
v |
100K |
| R1549 |
v |
100K |
| R1550 |
v |
100K |
| R1551 |
v |
47K |
| R1552 |
v |
100K |
| R1553 |
v |
10K |
| R1554 |
v |
10K |
| R1555 |
v |
10K |
| R1556 |
v |
100K |
| R1557 |
v |
100K |
| R1558 |
v |
100K |
| R1559 |
v |
100K |
| R1560 |
v |
100K |
| R1561 |
v |
100K |
| R1562 |
v |
100K |
| R1563 |
v |
100K |
| R1599 |
v |
100K |
| R1800 |
v |
1K |
| R1801 |
v |
1K |
| R1802 |
v |
10 |
| R1803 |
v |
1K |
| R1804 |
v |
1K |
| R1806 |
v |
0 |
| R1810 |
v |
51 |
| R1813 |
v |
51 |
| R1821 |
v |
0 |
| R1822 |
v |
0 |
| R1823 |
v |
0 |
| R1824 |
v |
0 |
| R1830 |
v |
1K |
| R1831 |
v |
1.5K |
| R1832 |
s |
- |
| R1832 |
v |
49.9 |
| R1835 |
v |
0 |
| R1850 |
v |
100K |
| R1890 |
v |
51 |
| R1891 |
v |
51 |
| R1892 |
v |
51 |
| R1897 |
s |
- |
| R1897 |
v |
51 |
| R1898 |
s |
- |
| R1898 |
v |
51 |
| R1900 |
v |
0 |
| R1901 |
v |
1M |
| R1910 |
v |
100K |
| R1930 |
v |
1K |
| R2000 |
v |
100K |
| R2001 |
v |
100K |
| R2002 |
v |
100K |
| R2003 |
s |
- |
| R2003 |
v |
10K |
| R2004 |
v |
100K |
| R2005 |
v |
100K |
| R2006 |
v |
100K |
| R2007 |
v |
22 |
| R2012 |
v |
3.3 |
| R2013 |
v |
3.3 |
| R2014 |
v |
3.3 |
| R2015 |
v |
3.3 |
| R2016 |
v |
3.3 |
| R2017 |
v |
0 |
| R2018 |
s |
- |
| R2018 |
v |
0 |
| R2026 |
s |
- |
| R2026 |
v |
0 |
| R2043 |
v |
0 |
| R2050 |
v |
2.2K |
| R2051 |
v |
2.2K |
| R2052 |
v |
2.2K |
| R2070 |
v |
100K |
| R2072 |
v |
4.99K |
| R2073 |
s |
- |
| R2073 |
v |
0 |
| R2080 |
v |
47K |
| R2081 |
v |
47K |
| R2082 |
v |
47K |
| R2083 |
v |
47K |
| R2084 |
v |
1K |
| R2085 |
v |
1K |
| R2086 |
v |
1K |
| R2087 |
v |
1K |
| R2089 |
v |
100K |
| R2090 |
v |
20K |
| R2091 |
v |
20K |
| R2092 |
v |
20K |
| R2093 |
v |
20K |
| R2095 |
v |
20K |
| R2220 |
v |
24.9 |
| R2221 |
v |
8.2K |
| R2222 |
v |
8.2K |
| R2223 |
v |
10 |
| R2240 |
v |
24.9 |
| R2241 |
v |
8.2K |
| R2242 |
v |
8.2K |
| R2243 |
v |
10 |
| R2260 |
v |
24.9 |
| R2261 |
v |
8.2K |
| R2262 |
v |
8.2K |
| R2263 |
v |
5.1 |
| R2300 |
v |
243 |
| R2301 |
v |
243 |
| R2400 |
v |
243 |
| R2401 |
v |
243 |
| R2500 |
v |
243 |
| R2501 |
v |
243 |
| R2600 |
v |
243 |
| R2601 |
v |
243 |
| R2700 |
v |
68 |
| R2701 |
v |
68 |
| R2702 |
v |
68 |
| R2703 |
v |
68 |
| R2704 |
v |
68 |
| R2705 |
v |
39 |
| R2706 |
v |
39 |
| R2707 |
v |
82 |
| R2708 |
v |
82 |
| R2709 |
v |
68 |
| R2710 |
v |
68 |
| R2711 |
v |
NIS |
| R2712 |
v |
68 |
| R2713 |
v |
68 |
| R2714 |
v |
68 |
| R2715 |
v |
68 |
| R2716 |
v |
68 |
| R2717 |
v |
68 |
| R2718 |
v |
68 |
| R2719 |
v |
39 |
| R2720 |
v |
39 |
| R2721 |
v |
82 |
| R2722 |
v |
82 |
| R2723 |
v |
68 |
| R2724 |
v |
68 |
| R2725 |
v |
68 |
| R2726 |
v |
68 |
| R2727 |
v |
68 |
| R2728 |
v |
82 |
| R2729 |
v |
82 |
| R2730 |
v |
82 |
| R2740 |
v |
68 |
| R2741 |
v |
68 |
| R2742 |
v |
68 |
| R2743 |
v |
68 |
| R2744 |
v |
68 |
| R2745 |
v |
39 |
| R2746 |
v |
39 |
| R2747 |
v |
82 |
| R2748 |
v |
82 |
| R2749 |
v |
68 |
| R2750 |
v |
68 |
| R2751 |
v |
68 |
| R2752 |
v |
68 |
| R2753 |
v |
68 |
| R2754 |
v |
68 |
| R2755 |
v |
68 |
| R2756 |
v |
68 |
| R2757 |
v |
68 |
| R2758 |
v |
68 |
| R2759 |
v |
39 |
| R2760 |
v |
39 |
| R2761 |
v |
82 |
| R2762 |
v |
82 |
| R2763 |
v |
68 |
| R2764 |
v |
68 |
| R2765 |
v |
68 |
| R2766 |
v |
68 |
| R2767 |
v |
68 |
| R2768 |
v |
82 |
| R2769 |
v |
82 |
| R2770 |
v |
82 |
| R2825 |
v |
100 |
| R2827 |
v |
100K |
| R2829 |
v |
100 |
| R2830 |
v |
100K |
| R2831 |
v |
100K |
| R2834 |
v |
2.2K |
| R2835 |
v |
2.2K |
| R2836 |
v |
2.2K |
| R2837 |
v |
2.2K |
| R2850 |
v |
14K |
| R2851 |
v |
3.01K |
| R2852 |
v |
14K |
| R2853 |
v |
499 |
| R2854 |
v |
499 |
| R2855 |
v |
4.75K |
| R2860 |
v |
1M |
| R2861 |
v |
1M |
| R2862 |
v |
100K |
| R2870 |
v |
1M |
| R2871 |
v |
1M |
| R2872 |
v |
100K |
| R2890 |
v |
3.3K |
| R2891 |
v |
3.3K |
| R2892 |
v |
3.3K |
| R2893 |
v |
3.3K |
| R3006 |
s |
- |
| R3006 |
v |
1M |
| R3007 |
v |
0 |
| R3025 |
v |
15 |
| R3026 |
v |
100K |
| R3032 |
v |
100K |
| R3033 |
v |
100K |
| R3034 |
v |
100K |
| R3035 |
s |
- |
| R3035 |
v |
0 |
| R3036 |
s |
- |
| R3036 |
v |
0 |
| R3038 |
v |
10K |
| R3040 |
v |
1M |
| R3041 |
v |
33 |
| R3042 |
v |
33 |
| R3043 |
v |
0 |
| R3044 |
v |
0 |
| R3067 |
v |
100K |
| R3068 |
v |
100K |
| R3069 |
v |
100K |
| R3070 |
v |
100K |
| R3076 |
v |
0 |
| R3077 |
v |
0 |
| R3078 |
v |
0 |
| R3079 |
v |
0 |
| R3081 |
s |
- |
| R3081 |
v |
0 |
| R3082 |
s |
- |
| R3082 |
v |
0 |
| R3084 |
s |
- |
| R3084 |
v |
0 |
| R3085 |
s |
- |
| R3085 |
v |
0 |
| R3086 |
v |
0 |
| R3087 |
v |
0 |
| R3088 |
s |
- |
| R3088 |
v |
1 |
| R3089 |
s |
- |
| R3089 |
v |
1 |
| R3090 |
v |
15 |
| R3091 |
v |
15 |
| R3092 |
v |
15 |
| R3093 |
v |
15 |
| R3094 |
v |
100 |
| R3095 |
v |
15 |
| R3096 |
v |
15 |
| R3097 |
v |
15 |
| R3098 |
v |
15 |
| R3103 |
v |
15K |
| R3105 |
v |
1M |
| R3108 |
v |
1M |
| R3109 |
v |
1M |
| R3110 |
v |
100K |
| R3111 |
v |
100K |
| R3203 |
v |
15K |
| R3205 |
v |
1M |
| R3208 |
v |
1M |
| R3209 |
v |
1M |
| R3210 |
v |
100K |
| R3211 |
v |
100K |
| R3400 |
s |
- |
| R3400 |
v |
0 |
| R3401 |
v |
0 |
| R3402 |
v |
100K |
| R3403 |
v |
24.9K |
| R3404 |
v |
100K |
| R3431 |
s |
- |
| R3431 |
v |
10K |
| R3500 |
v |
11K |
| R3501 |
v |
2.2 |
| R3502 |
v |
10K |
| R3503 |
v |
27.4K |
| R3504 |
v |
10K |
| R3509 |
v |
2.2 |
| R3513 |
s |
- |
| R3513 |
v |
0 |
| R3517 |
v |
191K |
| R3518 |
v |
95.3K |
| R3521 |
v |
2.74K |
| R3530 |
v |
0.002 |
| R3531 |
v |
27.4K |
| R3539 |
v |
0 |
| R3572 |
v |
2.74K |
| R3701 |
s |
- |
| R3701 |
v |
1K |
| R3712 |
v |
10K |
| R3731 |
s |
- |
| R3731 |
v |
10K |
| R3734 |
v |
10K |
| R3735 |
v |
0 |
| R3751 |
v |
100K |
| R3752 |
v |
100K |
| R3753 |
v |
100K |
| R3754 |
v |
1K |
| R3759 |
v |
270K |
| R3762 |
v |
10K |
| R3764 |
v |
0 |
| R3765 |
v |
0 |
| R3766 |
v |
100K |
| R3767 |
v |
100K |
| R3774 |
v |
0 |
| R3775 |
v |
0 |
| R3776 |
v |
100K |
| R3777 |
v |
100K |
| R3810 |
v |
0 |
| R3814 |
v |
0 |
| R3820 |
v |
0 |
| R3824 |
v |
0 |
| R3834 |
v |
0 |
| R3854 |
v |
0 |
| R3856 |
v |
232K |
| R3857 |
v |
100K |
| R3859 |
v |
0 |
| R3900 |
v |
499 |
| R3901 |
v |
240 |
| R3902 |
v |
240 |
| R3904 |
v |
2.2K |
| R3905 |
v |
2.2K |
| R3906 |
v |
1K |
| R3907 |
v |
1K |
| R3911 |
v |
2.2K |
| R3912 |
v |
2.2K |
| R3915 |
v |
2.2K |
| R3916 |
v |
2.2K |
| R3917 |
v |
4.7K |
| R3918 |
v |
4.7K |
| R3925 |
s |
- |
| R3925 |
v |
0 |
| R3940 |
s |
- |
| R3940 |
v |
100K |
| R3941 |
v |
10K |
| R3942 |
v |
10K |
| R3943 |
v |
78.7K |
| R3951 |
v |
10K |
| R3952 |
s |
- |
| R3952 |
v |
1K |
| R3953 |
s |
- |
| R3953 |
v |
1K |
| R3960 |
v |
3.0K |
| R3961 |
v |
3.0K |
| R3970 |
v |
10K |
| R3971 |
v |
100K |
| R3972 |
v |
300K |
| R3973 |
v |
10K |
| R3980 |
s |
- |
| R3980 |
v |
0 |
| R3981 |
v |
0 |
| R3990 |
v |
0 |
| R4001 |
v |
200 |
| R4003 |
v |
4.02K |
| R4004 |
v |
4.02K |
| R4010 |
v |
499K |
| R4017 |
s |
- |
| R4017 |
v |
2.2K |
| R4020 |
v |
0.00 |
| R4022 |
v |
10K |
| R4023 |
v |
100K |
| R4024 |
v |
100K |
| R4035 |
v |
47K |
| R4036 |
v |
10K |
| R4037 |
v |
10K |
| R4042 |
s |
- |
| R4042 |
v |
10K |
| R4070 |
v |
47K |
| R4071 |
v |
0 |
| R4080 |
s |
- |
| R4080 |
v |
200K |
| R4082 |
v |
10K |
| R4100 |
v |
2.2K |
| R4101 |
v |
2.2K |
| R4102 |
v |
2.2K |
| R4103 |
s |
- |
| R4103 |
v |
2.2K |
| R4104 |
s |
- |
| R4104 |
v |
2.2K |
| R4105 |
v |
2.2K |
| R4106 |
s |
- |
| R4106 |
v |
2.2K |
| R4200 |
v |
0 |
| R4201 |
v |
0 |
| R4202 |
v |
0 |
| R4203 |
v |
0 |
| R4301 |
v |
100K |
| R4302 |
v |
100K |
| R4303 |
v |
100K |
| R4305 |
v |
10K |
| R4307 |
s |
- |
| R4307 |
v |
3.92K |
| R4308 |
v |
200K |
| R4315 |
v |
0 |
| R4320 |
v |
0 |
| R4321 |
v |
0 |
| R4400 |
v |
100K |
| R4420 |
v |
100 |
| R4421 |
v |
100 |
| R4440 |
v |
47K |
| R4441 |
v |
47K |
| R4442 |
v |
47K |
| R4443 |
v |
47K |
| R4444 |
v |
100K |
| R4450 |
v |
100 |
| R4451 |
v |
0 |
| R4452 |
v |
0 |
| R4453 |
v |
0 |
| R4454 |
v |
0 |
| R4455 |
v |
0 |
| R4456 |
v |
0 |
| R4457 |
v |
0 |
| R4460 |
v |
100K |
| R4470 |
v |
100K |
| R4471 |
v |
1K |
| R4472 |
v |
1K |
| R4480 |
s |
- |
| R4480 |
v |
10K |
| R4481 |
v |
4.7K |
| R4485 |
s |
- |
| R4485 |
v |
4.7K |
| R4490 |
s |
- |
| R4490 |
v |
0 |
| R4491 |
v |
24K |
| R4492 |
v |
100K |
| R4510 |
v |
0 |
| R4520 |
s |
- |
| R4520 |
v |
0 |
| R4530 |
v |
100K |
| R4531 |
s |
- |
| R4531 |
v |
0 |
| R4540 |
v |
100K |
| R4541 |
s |
- |
| R4541 |
v |
0 |
| R4911 |
v |
0 |
| R4912 |
v |
0 |
| R4915 |
s |
- |
| R4915 |
v |
0 |
| R4916 |
v |
0 |
| R4920 |
v |
2.2K |
| R4921 |
v |
2.2K |
| R4950 |
v |
0 |
| R4951 |
v |
56 |
| R4953 |
v |
680 |
| R4954 |
v |
680 |
| R5002 |
v |
1M |
| R5112 |
v |
22 |
| R5134 |
v |
33 |
| R5151 |
v |
330 |
| R5158 |
v |
100 |
| R5159 |
v |
100 |
| R5166 |
v |
100K |
| R5167 |
v |
100K |
| R5168 |
v |
100K |
| R5169 |
v |
100K |
| R5170 |
v |
10K |
| R5171 |
s |
- |
| R5171 |
v |
330K |
| R5172 |
v |
10K |
| R5175 |
v |
20K |
| R5176 |
v |
20K |
| R5177 |
s |
- |
| R5177 |
v |
10K |
| R5178 |
s |
- |
| R5178 |
v |
10K |
| R5179 |
s |
- |
| R5179 |
v |
10K |
| R5180 |
s |
- |
| R5180 |
v |
10K |
| R5182 |
v |
1K |
| R5183 |
v |
1K |
| R5185 |
v |
100K |
| R5186 |
v |
10K |
| R5187 |
s |
- |
| R5187 |
v |
100K |
| R5191 |
v |
100K |
| R5192 |
v |
100K |
| R5196 |
v |
100K |
| R5197 |
v |
100K |
| R5210 |
v |
100 |
| R5211 |
v |
100 |
| R5214 |
v |
100 |
| R5216 |
v |
100 |
| R5217 |
s |
- |
| R5217 |
v |
100 |
| R5220 |
v |
100 |
| R5221 |
v |
100 |
| R5226 |
v |
0 |
| R5252 |
v |
10K |
| R5253 |
v |
10K |
| R5255 |
v |
10K |
| R5256 |
v |
100K |
| R5257 |
v |
0 |
| R5258 |
v |
0 |
| R5259 |
v |
0 |
| R5260 |
v |
10 |
| R5273 |
v |
10K |
| R5274 |
v |
100K |
| R5275 |
s |
- |
| R5275 |
v |
0 |
| R5276 |
s |
- |
| R5276 |
v |
0 |
| R5277 |
v |
0 |
| R5278 |
v |
0 |
| R5280 |
v |
100K |
| R5281 |
v |
10K |
| R5294 |
s |
- |
| R5294 |
v |
10K |
| R5295 |
s |
- |
| R5295 |
v |
10K |
| R5300 |
v |
1K |
| R5301 |
v |
1K |
| R5305 |
v |
2.0K |
| R5306 |
v |
2.0K |
| R5310 |
v |
8.2K |
| R5311 |
v |
8.2K |
| R5320 |
v |
1.5K |
| R5321 |
v |
1.5K |
| R5350 |
v |
1.5K |
| R5351 |
v |
1.5K |
| R5360 |
v |
2.0K |
| R5361 |
v |
2.0K |
| R5370 |
v |
1K |
| R5371 |
v |
1K |
| R5372 |
v |
0 |
| R5373 |
v |
0 |
| R5380 |
v |
2.0K |
| R5381 |
v |
2.0K |
| R5390 |
v |
2.0K |
| R5391 |
v |
2.0K |
| R5400 |
v |
0.001 |
| R5405 |
v |
15K |
| R5409 |
v |
4.53K |
| R5410 |
s |
- |
| R5410 |
v |
0.005 |
| R5415 |
v |
15K |
| R5419 |
v |
453K |
| R5429 |
v |
300K |
| R5439 |
v |
45.3K |
| R5440 |
s |
- |
| R5440 |
v |
0.005 |
| R5445 |
v |
15K |
| R5449 |
v |
453K |
| R5455 |
v |
6.04K |
| R5459 |
v |
453K |
| R5460 |
s |
- |
| R5460 |
v |
0.005 |
| R5461 |
v |
24.9K |
| R5465 |
v |
10K |
| R5467 |
v |
10K |
| R5468 |
v |
10K |
| R5469 |
v |
4.53K |
| R5481 |
v |
100K |
| R5482 |
v |
100K |
| R5488 |
v |
27.4K |
| R5489 |
v |
5.49K |
| R5491 |
v |
69.8K |
| R5492 |
v |
200K |
| R5498 |
v |
31.6K |
| R5499 |
v |
4.75K |
| R5510 |
s |
- |
| R5510 |
v |
0.005 |
| R5515 |
s |
- |
| R5515 |
v |
20K |
| R5519 |
v |
4.53K |
| R5520 |
s |
- |
| R5520 |
v |
0.005 |
| R5525 |
s |
- |
| R5525 |
v |
20K |
| R5529 |
v |
453K |
| R5530 |
s |
- |
| R5530 |
v |
0.005 |
| R5532 |
v |
120 |
| R5533 |
v |
120 |
| R5534 |
v |
17.4K |
| R5535 |
v |
100K |
| R5539 |
v |
4.53K |
| R5540 |
s |
- |
| R5540 |
v |
20K |
| R5541 |
v |
715K |
| R5542 |
v |
2.55K |
| R5543 |
v |
2.55K |
| R5544 |
v |
715K |
| R5545 |
v |
4.42K |
| R5546 |
v |
4.42K |
| R5547 |
v |
4.42K |
| R5548 |
v |
4.42K |
| R5549 |
v |
4.53K |
| R5550 |
v |
4.42K |
| R5551 |
v |
4.42K |
| R5552 |
v |
0 |
| R5553 |
v |
255K |
| R5554 |
v |
294K |
| R5555 |
v |
84.5K |
| R5556 |
v |
12K |
| R5557 |
s |
- |
| R5557 |
v |
0 |
| R5565 |
s |
- |
| R5565 |
v |
51K |
| R5569 |
s |
- |
| R5569 |
v |
453K |
| R5575 |
s |
- |
| R5575 |
v |
20K |
| R5579 |
v |
4.53K |
| R5580 |
s |
- |
| R5580 |
v |
0.005 |
| R5585 |
s |
- |
| R5585 |
v |
20K |
| R5589 |
v |
4.53K |
| R5595 |
s |
- |
| R5595 |
v |
20K |
| R5599 |
v |
453K |
| R5610 |
s |
- |
| R5610 |
v |
0.005 |
| R5615 |
s |
- |
| R5615 |
v |
20K |
| R5619 |
v |
453K |
| R5625 |
v |
51K |
| R5629 |
v |
453K |
| R5630 |
s |
- |
| R5630 |
v |
0.005 |
| R5635 |
s |
- |
| R5635 |
v |
20K |
| R5639 |
v |
453K |
| R5640 |
s |
- |
| R5640 |
v |
0.005 |
| R5645 |
s |
- |
| R5645 |
v |
20K |
| R5649 |
v |
453K |
| R5650 |
s |
- |
| R5650 |
v |
0.005 |
| R5655 |
s |
- |
| R5655 |
v |
20K |
| R5659 |
v |
453K |
| R5660 |
v |
47 |
| R5661 |
v |
16K |
| R5662 |
v |
1K |
| R5664 |
v |
15K |
| R5665 |
v |
0 |
| R5666 |
s |
- |
| R5666 |
v |
0 |
| R5667 |
v |
0 |
| R5668 |
s |
- |
| R5668 |
v |
0 |
| R5669 |
v |
0 |
| R5680 |
s |
- |
| R5680 |
v |
0.005 |
| R5685 |
s |
- |
| R5685 |
v |
20K |
| R5689 |
v |
453K |
| R5690 |
s |
- |
| R5690 |
v |
0.005 |
| R5695 |
s |
- |
| R5695 |
v |
20K |
| R5699 |
v |
453K |
| R5700 |
v |
10 |
| R5710 |
v |
10 |
| R5712 |
v |
100K |
| R5720 |
v |
0.025 |
| R5725 |
s |
- |
| R5725 |
v |
20K |
| R5729 |
s |
- |
| R5729 |
v |
453K |
| R5730 |
s |
- |
| R5730 |
v |
0.005 |
| R5735 |
s |
- |
| R5735 |
v |
20K |
| R5739 |
v |
453K |
| R5740 |
s |
- |
| R5740 |
v |
20K |
| R5741 |
v |
715K |
| R5750 |
s |
- |
| R5755 |
s |
- |
| R5775 |
s |
- |
| R5852 |
s |
- |
| R5930 |
s |
- |
| R5940 |
s |
- |
| R5950 |
s |
- |
| R5951 |
s |
- |
| R5960 |
s |
- |
| R5970 |
s |
- |
| R5971 |
s |
- |
| R6360 |
s |
- |
| R7107 |
s |
- |
| R7218 |
s |
- |
| R7228 |
s |
- |
| R7238 |
s |
- |
| R7378 |
s |
- |
| R7418 |
s |
- |
| R7428 |
s |
- |
| R7820 |
s |
- |
| R7864 |
s |
- |
| R7917 |
s |
- |
| R7918 |
s |
- |
| R7969 |
s |
- |
| R8009 |
s |
- |
| R8024 |
s |
- |
| R8029 |
s |
- |
| R8502 |
s |
- |
| R8503 |
s |
- |
| R8520 |
s |
- |
| R8920 |
s |
- |
| R8927 |
s |
- |
| R8929 |
s |
- |
| R8960 |
s |
- |
| R8964 |
s |
- |
| R8967 |
s |
- |
| R8975 |
s |
- |
| R9100 |
s |
- |
| R9101 |
s |
- |
| R9110 |
s |
- |
| R9111 |
s |
- |
| R9200 |
s |
- |
| R9201 |
s |
- |
| R9210 |
s |
- |
| R9211 |
s |
- |
| R9502 |
s |
- |
| R9503 |
s |
- |
| R9802 |
s |
- |
| R9820 |
s |
- |
| R9829 |
s |
- |
| R9830 |
s |
- |
| R9831 |
s |
- |
| R9840 |
s |
- |
| R9854 |
s |
- |
| R9856 |
s |
- |
| R9871 |
s |
- |
| RA200 |
s |
- |
| RA202 |
s |
- |
| RA203 |
s |
- |
| RA204 |
s |
- |
| RA205 |
s |
- |
| RA206 |
s |
- |
| RA207 |
s |
- |
| RA303 |
s |
- |
| RA304 |
s |
- |
| RA309 |
s |
- |
| RA367 |
s |
- |
| RA383 |
s |
- |
| RA432 |
s |
- |
| RA433 |
s |
- |
| RA435 |
s |
- |
| RA482 |
s |
- |
| RA483 |
s |
- |
| RA485 |
s |
- |
| RA532 |
s |
- |
| RA533 |
s |
- |
| RA535 |
s |
- |
| RA582 |
s |
- |
| RA583 |
s |
- |
| RA585 |
s |
- |
| RA663 |
s |
- |
| RA665 |
s |
- |
| RA684 |
s |
- |
| RA686 |
s |
- |
| RA687 |
s |
- |
| RA704 |
s |
- |
| RA730 |
s |
- |
| RA731 |
s |
- |
| RA732 |
s |
- |
| RA733 |
s |
- |
| RA734 |
s |
- |
| RA770 |
s |
- |
| RA771 |
s |
- |
| RA772 |
s |
- |
| RA773 |
s |
- |
| RA775 |
s |
- |
| RA776 |
s |
- |
| RA777 |
s |
- |
| RA778 |
s |
- |
| RA77A |
s |
- |
| RA77C |
s |
- |
| RA780 |
s |
- |
| RA782 |
s |
- |
| RA783 |
s |
- |
| RA786 |
s |
- |
| RA788 |
s |
- |
| RA789 |
s |
- |
| RA78B |
s |
- |
| RA78E |
s |
- |
| RA793 |
s |
- |
| RA79A |
s |
- |
| RA79B |
s |
- |
| RA880 |
s |
- |
| RA881 |
s |
- |
| RB206 |
s |
- |
| RB250 |
s |
- |
| RB251 |
s |
- |
| RB255 |
s |
- |
| RB288 |
s |
- |
| RB289 |
s |
- |
| RB354 |
s |
- |
| RB600 |
s |
- |
| RB604 |
s |
- |
| RB713 |
s |
- |
| U4080 |
s |
- |
| XW4300 |
s |
- |