Netname | Condition | Type | Value | Comment |
---|---|---|---|---|
1V8_SWCH_EN | Default | d | 0.754 | |
1V8_SWCH_SLEW | Default | d | OL | |
ACT_GND | Default | d | 0.000 | |
AGND_P1V8PRIM | Default | d | 0.000 | |
ALL_SYS_PWRGD | Default | d | 0.753 | |
AP_PCIE_WAKE_L | Default | d | 0.525 | |
AUD_CONN_HP_LEFT | Default | d | 0.698 | |
AUD_CONN_HP_RIGHT | Default | d | 0.691 | |
AUD_CONN_HP_SENSE_L | Default | d | 1.466 | |
AUD_CONN_HP_SENSE_R | Default | d | 1.467 | |
AUD_CONN_RING2 | Default | d | 0.000 | |
AUD_CONN_RING2_XW | Default | d | 0.648 | |
AUD_CONN_RING_SENSE | Default | d | 0.655 | |
AUD_CONN_SLEEVE | Default | d | 0.000 | |
AUD_CONN_SLEEVE_XW | Default | d | 0.648 | |
AUD_CONN_TIP_SENSE | Default | d | 1.467 | |
AUD_DMIC0_DATA_CONN | Default | d | 0.586 | |
AUD_DMIC1_DATA_CONN | Default | d | 0.582 | |
AUD_HP_PORT_CH_GND | Default | d | 0.001 | |
AUD_HP_PORT_L | Default | d | 0.698 | |
AUD_HP_PORT_R | Default | d | 0.691 | |
AUD_HP_PORT_US_GND | Default | d | 0.000 | |
AUD_HP_SENSE_L | Default | d | 1.272 | |
AUD_HP_SENSE_R | Default | d | 1.278 | |
AUD_HS_MIC_N | Default | d | 0.632 | |
AUD_HS_MIC_P | Default | d | 0.625 | |
AUD_PWR_EN | Default | d | 0.771 | |
AUD_RING_SENSE | Default | d | 0.634 | |
AUD_TIP_SENSE | Default | d | 1.605 | |
BKLT_EN_R | Default | d | 0.548 | |
BKLT_ISET_KEYB | Default | d | 0.679 | |
BKLT_KEYB1 | Default | d | 0.662 | |
BKLT_KEYB2 | Default | d | 0.658 | |
BKLT_PWM_KEYB_3V3 | Default | d | 0.568 | |
BKLT_PWM_MLB2TCON | Default | d | 0.795 | |
BKLT_SCL | Default | d | 0.558 | |
BKLT_SD | Default | d | 0.602 | |
BKLT_SDA | Default | d | 0.558 | |
BKLT_SENSE_OUT | Default | d | 0.731 | |
BOARD_REV1 | Default | d | 0.475 | |
BOARD_REV2 | Default | d | 0.474 | |
BOOT_CONFIG0 | Default | d | 0.480 | |
BOOT_CONFIG1 | Default | d | 0.477 | |
BOOT_CONFIG2 | Default | d | 0.477 | |
BT_DEV_WAKE | Default | d | 0.474 | |
BT_GPIO_4 | Default | d | 0.705 | |
BT_HOST_WAKE | Default | d | 0.474 | |
BT_PWR_EN | Default | d | 0.485 | |
BT_ROM_BOOT_HPN_L | Default | d | 0.508 | |
BT_SFLASH_CS_L | Default | d | 0.696 | |
BT_SFLASH_HOLD_L | Default | d | 0.460 | |
BT_SFLASH_WP_L | Default | d | 0.455 | |
BT_SPI2_CLK | Default | d | 0.468 | |
BT_SPI2_CSN | Default | d | 0.712 | |
BT_SPI2_MISO | Default | d | 0.458 | |
BT_SPI2_MOSI | Default | d | 0.456 | |
CAPSLOCK_LED_EN | Default | d | 0.556 | |
CAP_PCPU_S0SW | Default | d | 0.568 | |
CHGR_AMON | Default | d | 0.627 | |
CHGR_AUX_DET | Default | d | 0.639 | |
CHGR_BMON | Default | d | 0.626 | |
CHGR_BOOT1 | Default | d | 0.607 | |
CHGR_BOOT1_RC | Default | d | 0.605 | |
CHGR_BOOT2 | Default | d | 0.602 | |
CHGR_BOOT2_RC | Default | d | 0.602 | |
CHGR_COMP | Default | d | 0.639 | |
CHGR_CSI_N | Default | d | 0.563 | |
CHGR_CSI_P | Default | d | 0.564 | |
CHGR_CSI_R_N | Default | d | 0.562 | |
CHGR_CSI_R_P | Default | d | 0.562 | |
CHGR_CSO_N | Default | d | 0.510 | |
CHGR_CSO_P | Default | d | 0.509 | |
CHGR_CSO_R_N | Default | d | 0.510 | |
CHGR_CSO_R_P | Default | d | 0.510 | |
CHGR_EN_MVR | Default | d | 0.620 | |
CHGR_EN_MVR_R | Default | d | 0.606 | |
CHGR_GATE_Q1 | Default | d | 0.822 | |
CHGR_GATE_Q2 | Default | d | 0.469 | |
CHGR_GATE_Q3 | Default | d | 0.490 | |
CHGR_GATE_Q4 | Default | d | 0.804 | |
CHGR_INT_L | Default | d | 0.619 | |
CHGR_LX1 | Default | d | 0.528 | |
CHGR_LX2 | Default | d | 0.528 | |
CHGR_PBUS | Default | d | 0.506 | |
CHGR_RST_IN | Default | d | 0.630 | |
CHGR_RST_IN_R | Default | d | 0.677 | |
CHGR_VBAT | Default | d | 0.646 | |
CODEC_INT_L | Default | d | 0.478 | |
CODEC_RESET_L | Default | d | 0.474 | |
CODEC_WAKE_L | Default | d | 0.474 | |
COMP_A_CPUCORE | Default | d | 0.624 | |
COMP_A_CPUCORE_L | Default | d | 2.080 | |
CORE_ISUMN_R | Default | d | 1.940 | |
CPUCORE1_GH | Default | d | OL | |
CPUCORE1_GL0 | Default | d | 0.435 | |
CPUCORE2_GH | Default | d | OL | |
CPUCORE2_GL0 | Default | d | 0.440 | |
CPUCORE3_GL0 | Default | d | 0.438 | |
CPUCORE_FCCM | Default | d | 0.596 | |
CPUCORE_ISEN1 | Default | d | 0.624 | |
CPUCORE_ISEN2 | Default | d | 0.624 | |
CPUCORE_ISEN3 | Default | d | 0.626 | |
CPUCORE_ISNS1_N | Default | d | 0.090 | |
CPUCORE_ISNS1_P | Default | d | 0.090 | |
CPUCORE_ISNS2_N | Default | d | 0.090 | |
CPUCORE_ISNS2_P | Default | d | 0.090 | |
CPUCORE_ISNS3_N | Default | d | 0.090 | |
CPUCORE_ISNS3_P | Default | d | 0.090 | |
CPUCORE_ISUMN | Default | d | 0.089 | |
CPUCORE_ISUMN_R | Default | d | 0.484 | |
CPUCORE_ISUMP | Default | d | 0.421 | |
CPUCORE_PWM1 | Default | d | 0.609 | |
CPUCORE_PWM2 | Default | d | 0.609 | |
CPUCORE_PWM3 | Default | d | 0.610 | |
CPUCORE_SW1 | Default | d | 0.090 | |
CPUCORE_SW1 | Default | r | 90.000R | |
CPUCORE_SW2 | Default | d | 0.090 | |
CPUCORE_SW2 | Default | r | 90.000R | |
CPUCORE_SW3 | Default | d | 0.090 | |
CPUCORE_SW3 | Default | r | 90.000R | |
CPUTHMSNS_D5_N | Default | d | 0.000 | |
CPUTHMSNS_D5_P | Default | d | 0.652 | |
CPUVASENSE_IN | Default | d | 0.384 | |
CPUVR_PGOOD | Default | d | 0.594 | |
CPUVR_VIDALERT_L_R | Default | d | 0.170 | |
CPUVR_VIDSCLK_R | Default | d | 0.134 | |
CPUVR_VIDSOUT_R | Default | d | 0.135 | |
CPUVSENSE_IN | Default | d | 0.089 | |
CPU_BPM_L<0> | Default | d | 0.237 | |
CPU_BPM_L<1> | Default | d | 0.236 | |
CPU_C10_GATE_L | Default | d | 0.511 | |
CPU_CATERR_L | Default | d | 0.135 | |
CPU_CFG<0> | Default | d | 0.229 | |
CPU_DDR0_ALERT_L | Default | d | 0.000 | |
CPU_DDR1_ALERT_L | Default | d | 0.000 | |
CPU_DDR_RCOMP<2> | Default | d | 0.100 | |
CPU_PECI | Default | d | 0.277 | |
CPU_PROCHOT_L | Default | d | 0.444 | |
CPU_PROCHOT_OUT_L | Default | d | 0.458 | |
CPU_PROCHOT_R_L | Default | d | 0.228 | |
CPU_SMC_THRMTRIP_L | Default | d | 0.473 | |
CPU_VCCSENSE_N | Default | d | 0.002 | |
CPU_VCCSENSE_P | Default | d | 0.090 | |
CPU_VIDALERT_L | Default | d | 0.169 | |
CPU_VIDSCLK | Default | d | 0.134 | |
CPU_VIDSOUT | Default | d | 0.135 | |
CPU_VR_EN | Default | d | 0.586 | |
CPU_VR_EN_R | Default | d | 0.585 | |
CPU_VR_PROCHOT_L | Default | d | 0.529 | |
DDR_VIEW_0 | Default | d | 0.306 | |
DDR_VIEW_1 | Default | d | 0.305 | |
DFR_DISP_INT | Default | d | 0.480 | |
DFR_DISP_RESET_L | Default | d | 0.482 | |
DFR_DISP_TE | Default | d | 0.483 | |
DFR_DISP_VSYNC | Default | d | OL | |
DFR_PWR_EN | Default | d | 0.480 | |
DFR_TOUCH_CLK32K_RESET_L | Default | d | 0.486 | |
DFR_TOUCH_INT_L | Default | d | 0.481 | |
DFR_TOUCH_LID_OPEN_L | Default | d | OL | |
DFR_TOUCH_RESET_L | Default | d | 0.484 | |
DISP_RCOMP | Default | d | 0.141 | |
DP_INT_HPD | Default | d | 2.257 | |
EADC1_BMON_DISCRETE_ISENSE | Default | d | OL | |
EADC1_DDR1V8_ISENSE | Default | d | OL | |
EADC1_KBBLT_ISENSE | Default | d | OL | |
EADC1_MESA_ISENSE | Default | d | OL | |
EADC1_PP1V8_WLANBT_ISENSE | Default | d | OL | |
EDP_BKLT_EN | Default | d | 0.550 | |
EDP_INT_AUX_N | Default | d | 0.387 | |
EDP_INT_AUX_P | Default | d | 0.372 | |
EDP_INT_ML_N<0> | Default | d | 0.345 | |
EDP_INT_ML_N<1> | Default | d | 0.346 | |
EDP_INT_ML_N<2> | Default | d | 0.345 | |
EDP_INT_ML_N<3> | Default | d | 0.345 | |
EDP_INT_ML_P<0> | Default | d | 0.338 | |
EDP_INT_ML_P<1> | Default | d | 0.337 | |
EDP_INT_ML_P<2> | Default | d | 0.340 | |
EDP_INT_ML_P<3> | Default | d | 0.338 | |
EDP_PANEL_PWR_BUF_EN | Default | d | 0.700 | |
EDP_PANEL_PWR_DLY_EN | Default | d | 0.810 | |
EDP_PANEL_PWR_EN | Default | d | 0.554 | |
EEPROM_WC_L | Default | d | 0.577 | |
ESPI_CS_L | Default | d | 0.457 | |
ESPI_RESET_L | Default | d | 0.461 | |
FAN_LT_PWM | Default | d | 0.788 | |
FAN_LT_TACH | Default | d | OL | |
FAN_RT_PWM | Default | d | 0.773 | |
FAN_RT_TACH | Default | d | OL | |
FB_A_CORE_R | Default | d | 2.067 | |
FB_A_CORE_RC | Default | d | 1.615 | |
FB_A_CPUCORE | Default | d | 0.609 | |
FB_CORE | Default | d | 0.093 | |
FB_CORE_R | Default | d | 0.090 | |
FB_CORE_RC | Default | d | OL | |
FIVR_PROBE_ANA_0 | Default | d | 0.585 | |
FIVR_PROBE_ANA_1 | Default | d | 0.585 | |
FIVR_PROBE_DIG_1 | Default | d | 0.243 | |
FIVR_VLOAD_CCF | Default | d | 0.004 | |
FIVR_VLOAD_CORE0 | Default | d | 0.002 | |
FIVR_VLOAD_CORE1 | Default | d | 0.003 | |
FIVR_VLOAD_CORE3 | Default | d | 0.002 | |
FIVR_VLOAD_SA | Default | d | 0.004 | |
FIVR_VLOAD_TCSS | Default | d | 0.011 | |
GND | Default | d | 0.000 | |
HS_OTHER3V3_IOUT | Default | d | 0.725 | |
HS_OTHER5V_IOUT | Default | d | 0.725 | |
HW_ID1 | Default | d | 0.494 | |
I2C_ALS_SCL | Default | d | 0.463 | |
I2C_ALS_SDA | Default | d | 0.463 | |
I2C_BKLT_SCL | Default | d | 0.558 | |
I2C_BKLT_SDA | Default | d | 0.554 | |
I2C_CODEC_SCL | Default | d | 0.475 | |
I2C_CODEC_SDA | Default | d | 0.475 | |
I2C_DFR_SCL | Default | d | 0.492 | |
I2C_DFR_SCL_R | Default | d | 0.511 | |
I2C_DFR_SDA | Default | d | 0.492 | |
I2C_DFR_SDA_R | Default | d | 0.511 | |
I2C_DISP_LS_EN | Default | d | 0.495 | |
I2C_DISP_SCL | Default | d | 0.454 | |
I2C_DISP_SDA | Default | d | 0.452 | |
I2C_FTCAM_ISOL_SCL | Default | d | 0.707 | |
I2C_FTCAM_ISOL_SDA | Default | d | 0.717 | |
I2C_FTCAM_SCL | Default | d | 0.440 | |
I2C_FTCAM_SDA | Default | d | 0.444 | |
I2C_KBD_SCL | Default | d | 0.686 | |
I2C_KBD_SDA | Default | d | 0.662 | |
I2C_PMU_SCL | Default | d | 0.476 | |
I2C_PMU_SDA | Default | d | 0.473 | |
I2C_PWR_SCL | Default | d | 0.476 | |
I2C_PWR_SDA | Default | d | 0.476 | |
I2C_SEP_SCL | Default | d | 0.472 | |
I2C_SEP_SDA | Default | d | 0.470 | |
I2C_SNS0_S0_SCL | Default | d | 0.470 | |
I2C_SNS0_S0_SDA | Default | d | 0.469 | |
I2C_SNS1_S0_SCL | Default | d | 0.472 | |
I2C_SNS1_S0_SDA | Default | d | 0.471 | |
I2C_SNS_G3S_SCL | Default | d | 0.472 | |
I2C_SNS_G3S_SDA | Default | d | 0.472 | |
I2C_SPKRAMP_L_SCL | Default | d | 0.383 | |
I2C_SPKRAMP_L_SDA | Default | d | 0.383 | |
I2C_SPKRAMP_R_SCL | Default | d | 0.383 | |
I2C_SPKRAMP_R_SDA | Default | d | 0.382 | |
I2C_SSD_SCL | Default | d | 0.472 | |
I2C_SSD_SDA | Default | d | 0.472 | |
I2C_TCON_SCL | Default | d | 0.500 | |
I2C_TCON_SDA | Default | d | 0.499 | |
I2C_TPAD_3V3_SCL | Default | d | 0.948 | |
I2C_TPAD_3V3_SCL_R | Default | d | 0.919 | |
I2C_TPAD_3V3_SDA | Default | d | 0.960 | |
I2C_TPAD_3V3_SDA_R | Default | d | 0.930 | |
I2C_TPAD_SDA_R | Default | d | 0.504 | |
I2C_UPC_R_INTM_L | Default | d | 0.590 | |
I2C_UPC_R_SCLM | Default | d | 0.551 | |
I2C_UPC_R_SDAM | Default | d | 0.553 | |
I2C_UPC_SCL | Default | d | 0.488 | |
I2C_UPC_SDA | Default | d | 0.491 | |
I2C_UPC_T_INTM_L | Default | d | 0.608 | |
I2C_UPC_T_SCLM | Default | d | 0.567 | |
I2C_UPC_T_SDAM | Default | d | 0.568 | |
I2C_UPC_WR_SCL2 | Default | d | 0.485 | |
I2C_UPC_WR_SDA2 | Default | d | 0.487 | |
I2C_UPC_W_INTM_L | Default | d | 0.595 | |
I2C_UPC_W_SCLM | Default | d | 0.555 | |
I2C_UPC_W_SDAM | Default | d | 0.556 | |
I2C_UPC_XT_SCL2 | Default | d | 0.509 | |
I2C_UPC_XT_SDA2 | Default | d | 0.511 | |
I2C_UPC_X_INTM_L | Default | d | 0.598 | |
I2C_UPC_X_SCLM | Default | d | 0.565 | |
I2C_UPC_X_SDAM | Default | d | 0.565 | |
I2S_CODEC_BCLK | Default | d | 0.485 | |
I2S_CODEC_D2R | Default | d | 0.472 | |
I2S_CODEC_LRCLK_R | Default | d | 0.490 | |
I2S_CODEC_R2D | Default | d | 0.463 | |
I2S_CODEC_R2D_R | Default | d | 0.460 | |
I2S_SPKRAMP_L_BCLK | Default | d | 0.384 | |
I2S_SPKRAMP_L_BCLK_R | Default | d | 0.404 | |
I2S_SPKRAMP_L_D2R | Default | d | 0.373 | |
I2S_SPKRAMP_L_D2R_R1 | Default | d | 0.383 | |
I2S_SPKRAMP_L_D2R_R2 | Default | d | 0.383 | |
I2S_SPKRAMP_L_LRCLK_R | Default | d | 0.381 | |
I2S_SPKRAMP_L_R2D | Default | d | 0.383 | |
I2S_SPKRAMP_R_BCLK | Default | d | 0.384 | |
I2S_SPKRAMP_R_BCLK_R | Default | d | 0.402 | |
I2S_SPKRAMP_R_D2R | Default | d | 0.475 | |
I2S_SPKRAMP_R_D2R_R1 | Default | d | 0.382 | |
I2S_SPKRAMP_R_D2R_R2 | Default | d | 0.383 | |
I2S_SPKRAMP_R_LRCLK | Default | d | 0.399 | |
I2S_SPKRAMP_R_LRCLK_R | Default | d | 0.381 | |
I2S_SPKRAMP_R_R2D | Default | d | 0.383 | |
I2S_SPKRAMP_R_R2D_R | Default | d | 0.401 | |
IMON_A_CPUCORE | Default | d | 0.625 | |
IOXP1_INT_L | Default | d | 0.646 | |
IOXP1_RESET_L | Default | d | 0.744 | |
IOXP2_ADDR | Default | d | 0.719 | |
IOXP2_INT_L | Default | d | 0.645 | |
IOXP2_RESET_L | Default | d | 0.743 | |
IOXP_I2C_SCL | Default | d | 0.665 | |
IOXP_I2C_SDA | Default | d | 0.641 | |
IPD_LID_OPEN | Default | d | 0.721 | |
ISNS_ALSCAM_N | Default | d | OL | |
ISNS_ALSCAM_P | Default | d | OL | |
ISNS_CALPE_N | Default | d | OL | |
ISNS_CALPE_P | Default | d | OL | |
ISNS_CPUDDR_N | Default | d | 0.158 | |
ISNS_CPUDDR_P | Default | d | 0.158 | |
ISNS_CPUVDDQ_N | Default | d | OL | |
ISNS_CPUVDDQ_P | Default | d | OL | |
ISNS_DDRVDDQ_IOUT | Default | d | OL | |
ISNS_DDRVDDQ_N | Default | d | OL | |
ISNS_DDRVDDQ_P | Default | d | OL | |
ISNS_DDR_IOUT | Default | d | 0.720 | |
ISNS_DFR3V3_N | Default | d | OL | |
ISNS_DFR3V3_P | Default | d | OL | |
ISNS_DISCHGR_IOUT | Default | d | OL | |
ISNS_EADC_N | Default | d | OL | |
ISNS_EADC_P | Default | d | OL | |
ISNS_HS_3V3RTC_N | Default | d | OL | |
ISNS_HS_COMPUTING_N | Default | d | 0.510 | |
ISNS_HS_COMPUTING_P | Default | d | 0.510 | |
ISNS_HS_OTHER3V3_N | Default | d | 0.510 | |
ISNS_HS_OTHER3V3_P | Default | d | 0.510 | |
ISNS_HS_OTHER5V_N | Default | d | 0.510 | |
ISNS_HS_OTHER5V_P | Default | d | 0.510 | |
ISNS_KBBLT_N | Default | d | OL | |
ISNS_KBBLT_P | Default | d | OL | |
ISNS_LCDBKLT_N | Default | d | 0.510 | |
ISNS_LCDBKLT_P | Default | d | 0.510 | |
ISNS_LCDPANEL_N | Default | d | OL | |
ISNS_LCDPANEL_P | Default | d | OL | |
ISNS_MESA_IOUT | Default | d | OL | |
ISNS_MESA_N | Default | d | OL | |
ISNS_MESA_P | Default | d | OL | |
ISNS_OCARINA_IOUT | Default | d | 0.722 | |
ISNS_OCARINA_N | Default | d | 0.369 | |
ISNS_OCARINA_P | Default | d | 0.369 | |
ISNS_P1V8LPDDR_N | Default | d | OL | |
ISNS_P1V8LPDDR_P | Default | d | OL | |
ISNS_P1V8_WLANBT_N | Default | d | OL | |
ISNS_P1V8_WLANBT_P | Default | d | OL | |
ISNS_P5VUSBC_WR_IOUT | Default | d | 0.718 | |
ISNS_P5VUSBC_XT_IOUT | Default | d | 0.725 | |
ISNS_PP1V8_S5_N | Default | d | OL | |
ISNS_PP1V8_S5_P | Default | d | OL | |
ISNS_PP3V3_KBD_N | Default | d | OL | |
ISNS_PP3V3_KBD_P | Default | d | OL | |
ISNS_PP3V3_TPAD_N | Default | d | OL | |
ISNS_PP3V3_TPAD_P | Default | d | OL | |
ISNS_PP5V_LCD_N | Default | d | OL | |
ISNS_PP5V_LCD_P | Default | d | OL | |
ISNS_PP5V_TPAD_N | Default | d | OL | |
ISNS_PP5V_TPAD_P | Default | d | OL | |
ISNS_SPKRAMP_LEFT_N | Default | d | OL | |
ISNS_SPKRAMP_LEFT_P | Default | d | OL | |
ISNS_SSDNAND_IOUT | Default | d | 0.722 | |
ISNS_SSDNAND_N | Default | d | 0.510 | |
ISNS_SSDNAND_P | Default | d | 0.510 | |
ISNS_TBT_WR_N | Default | d | OL | |
ISNS_TBT_WR_P | Default | d | OL | |
ISNS_TBT_XT_N | Default | d | OL | |
ISNS_TBT_XT_P | Default | d | OL | |
ISNS_VCCINAUX_IOUT | Default | d | OL | |
ISNS_VCCINAUX_N | Default | d | 0.380 | |
ISNS_VCCINAUX_P | Default | d | 0.380 | |
ISNS_WLANBTP3V3_N | Default | d | OL | |
ISNS_WLANBTP3V3_P | Default | d | OL | |
ISUM_COREVR_VCC | Default | d | 0.533 | |
JTAG_ISP_TCK | Default | d | 0.515 | |
JTAG_ISP_TDI | Default | d | 0.509 | |
JTAG_ISP_TDO | Default | d | 0.514 | |
JTAG_TBT_R_TMS | Default | d | 0.552 | |
JTAG_TBT_T_TMS | Default | d | 0.608 | |
JTAG_TBT_W_TMS | Default | d | 0.553 | |
JTAG_TBT_X_TMS | Default | d | 0.600 | |
KBDBKLT_SW2 | Default | d | 0.427 | |
KBDLED_CATHODE1 | Default | d | 0.671 | |
KBDLED_CATHODE1_R | Default | d | OL | |
KBDLED_CATHODE2 | Default | d | 0.665 | |
KBDLED_CATHODE2_R | Default | d | OL | |
KBD_CAPSLOCK_LED | Default | d | 0.502 | |
KBD_CAP_CATHODE | Default | d | 0.503 | |
KBD_CONTROL_KEY | Default | d | 0.483 | |
KBD_CONTROL_L | Default | d | 0.461 | |
KBD_DRIVE_Y0 | Default | d | 0.572 | |
KBD_DRIVE_Y1 | Default | d | 0.568 | |
KBD_DRIVE_Y2 | Default | d | 0.565 | |
KBD_DRIVE_Y3 | Default | d | 0.568 | |
KBD_DRIVE_Y4 | Default | d | 0.580 | |
KBD_DRIVE_Y5 | Default | d | 0.571 | |
KBD_DRIVE_Y6 | Default | d | 0.513 | |
KBD_DRIVE_Y7 | Default | d | 0.510 | |
KBD_ID1 | Default | d | 0.787 | |
KBD_ID_DETECT1 | Default | d | 0.583 | |
KBD_INT_L | Default | d | 0.680 | |
KBD_LEFT_OPTION_KEY | Default | d | 0.482 | |
KBD_LEFT_OPTION_L | Default | d | 0.463 | |
KBD_RIGHT_SHIFT_KEY | Default | d | 0.485 | |
KBD_RIGHT_SHIFT_L | Default | d | 0.464 | |
KBD_SENSE_X0 | Default | d | 0.569 | |
KBD_SENSE_X1 | Default | d | 0.575 | |
KBD_SENSE_X10 | Default | d | 0.566 | |
KBD_SENSE_X11 | Default | d | 0.565 | |
KBD_SENSE_X12 | Default | d | 0.566 | |
KBD_SENSE_X2 | Default | d | 0.570 | |
KBD_SENSE_X3 | Default | d | 0.563 | |
KBD_SENSE_X4 | Default | d | 0.565 | |
KBD_SENSE_X5 | Default | d | 0.565 | |
KBD_SENSE_X6 | Default | d | 0.517 | |
KBD_SENSE_X7 | Default | d | 0.512 | |
KBD_SENSE_X8 | Default | d | 0.515 | |
KBD_SENSE_X9 | Default | d | 0.516 | |
L83_FILT | Default | d | 0.798 | |
L83_FLYC | Default | d | 0.390 | |
L83_FLYN | Default | d | 0.614 | |
L83_FLYP | Default | d | 0.410 | |
L83_HSBIAS_FILT | Default | d | 0.714 | |
L83_HSBIAS_FILT_REF | Default | d | 0.638 | |
L83_VCP_FILTN | Default | d | 0.736 | |
L83_VCP_FILTP | Default | d | 0.394 | |
L83_VCP_FILT_GND | Default | d | 0.000 | |
LCDBKLT_EN_L | Default | d | OL | |
LCDBKLT_FB | Default | d | 0.727 | |
LCDBKLT_FET_DRV_R | Default | d | 0.584 | |
LCDBKLT_SW | Default | d | 0.448 | |
LCDBKLT_TB_XWR | Default | d | 1.260 | |
LCD_PWR_SLEW | Default | d | 0.720 | |
LDO_CORE | Default | d | 0.378 | |
LED_CTRL | Default | d | 0.568 | |
LED_ISET | Default | d | 0.579 | |
LID_CTRL_DMIC | Default | d | 0.694 | |
LID_OPEN_LEFT | Default | d | 0.580 | |
LSX_HSW_P2R | Default | d | 0.530 | |
LSX_HSW_R2P | Default | d | 0.694 | |
MEM_BLDR_EN | Default | d | 0.470 | |
MEM_BLDR_EN_L | Default | d | 0.560 | |
MEM_RESET_L | Default | d | 0.459 | |
MEM_RESET_R_L | Default | d | 0.459 | |
MESA_BOOST_EN | Default | d | 0.553 | |
MESA_BOOST_EN_CONN | Default | d | 0.000 | |
MESA_INT | Default | d | 0.485 | |
MESA_INT_CONN | Default | d | 1.172 | |
MESA_PWR_EN | Default | d | 0.477 | |
MIPI_DFR_CLK_FILT_CONN_N | Default | d | 0.540 | |
MIPI_DFR_CLK_FILT_CONN_P | Default | d | 0.540 | |
MIPI_DFR_CLK_N | Default | d | 0.540 | |
MIPI_DFR_CLK_P | Default | d | 0.540 | |
MIPI_DFR_DATA_FILT_CONN_N | Default | d | 0.540 | |
MIPI_DFR_DATA_FILT_CONN_P | Default | d | 0.540 | |
MIPI_DFR_DATA_N | Default | d | 0.540 | |
MIPI_DFR_DATA_P | Default | d | 0.540 | |
MIPI_FTCAM_CLK_ISOL_FILT_CONN_N | Default | d | 0.500 | |
MIPI_FTCAM_CLK_ISOL_FILT_CONN_P | Default | d | 0.500 | |
MIPI_FTCAM_CLK_ISOL_N | Default | d | 0.500 | |
MIPI_FTCAM_CLK_ISOL_P | Default | d | 0.500 | |
MIPI_FTCAM_CLK_N | Default | d | 0.463 | |
MIPI_FTCAM_CLK_P | Default | d | 0.465 | |
MIPI_FTCAM_DATA_ISOL_FILT_CONN_N<0> | Default | d | 0.500 | |
MIPI_FTCAM_DATA_ISOL_FILT_CONN_P<0> | Default | d | 0.500 | |
MIPI_FTCAM_DATA_ISOL_N<0> | Default | d | 0.500 | |
MIPI_FTCAM_DATA_ISOL_P<0> | Default | d | 0.500 | |
MIPI_FTCAM_DATA_N<0> | Default | d | 0.471 | |
MIPI_FTCAM_DATA_P<0> | Default | d | 0.466 | |
NFC_GPIO2_AO | Default | d | 0.755 | |
NFC_GPIO3_AO | Default | d | 0.755 | |
NFC_XTAL1 | Default | d | 0.544 | |
NTC_A_CPUCORE | Default | d | 0.626 | |
NTC_A_CPUCORE_RP | Default | d | OL | |
ODT_1 | Default | d | 0.155 | |
ODT_2 | Default | d | 0.154 | |
ODT_3 | Default | d | 0.155 | |
ODT_4 | Default | d | 0.159 | |
OUT123_EN | Default | d | 0.304 | |
P0V6_BLDR_L | Default | d | 0.204 | |
P0V6_S3_COMP | Default | d | 0.689 | |
P0V6_S3_COMP_RC | Default | d | OL | |
P0V6_S3_FB | Default | d | 0.295 | |
P0V6_S3_FB_R | Default | d | 0.209 | |
P0V6_S3_FB_TOP | Default | d | 0.199 | |
P0V6_S3_SKIP | Default | d | 0.543 | |
P0V6_S3_SNUB | Default | d | 0.200 | |
P0V6_S3_SS | Default | d | 0.598 | |
P0V6_S3_SW | Default | d | 0.200 | |
P0V8SLPDDR_SW0 | Default | d | 0.052 | |
P0V8SLPDDR_SW1 | Default | d | 0.052 | |
P0V9SLPDDR_SW0 | Default | d | 0.070 | |
P0V9SLPDDR_SW1 | Default | d | 0.070 | |
P0V9_LX0_SSD0 | Default | d | 0.300 | |
P0V9_LX1_SSD0 | Default | d | 0.300 | |
P0V9_TBT_SVR_PGND_R | Default | d | 0.000 | |
P0V9_TBT_SVR_PGND_T | Default | d | 0.000 | |
P0V9_TBT_SVR_PGND_W | Default | d | 0.000 | |
P0V9_TBT_SVR_PGND_X | Default | d | 0.000 | |
P1V05_VCCST_EN | Default | d | 0.800 | |
P1V1REG_AGND | Default | d | 0.000 | |
P1V1REG_MODE | Default | d | 0.539 | |
P1V1REG_TRIP | Default | d | 0.746 | |
P1V1REG_VREF | Default | d | 0.646 | |
P1V1REG_VREF_R | Default | d | OL | |
P1V1S0SW_RAMP | Default | d | 0.692 | |
P1V1S3_PGOOD | Default | d | 0.543 | |
P1V1SLPDDR_RAMP | Default | d | 0.700 | |
P1V1SLPS2R_SW0 | Default | d | 0.241 | |
P1V1SLPS2R_SW1 | Default | d | 0.241 | |
P1V1_BLDR_L | Default | d | 0.168 | |
P1V1_BOOT_RC | Default | d | 0.623 | |
P1V1_DRVH | Default | d | 0.647 | |
P1V1_DRVH_R | Default | d | 0.650 | |
P1V1_DRVL | Default | d | 0.490 | |
P1V1_DRVL_R | Default | d | 0.457 | |
P1V1_PHASE | Default | d | 0.158 | |
P1V1_SLPDDR_SOCFET_EN | Default | d | 0.571 | |
P1V1_SNS | Default | d | 0.167 | |
P1V1_SNS_R | Default | d | 0.158 | |
P1V1_SW | Default | d | 0.158 | |
P1V1_VBST | Default | d | 0.621 | |
P1V2_WLANBT_VLX | Default | d | 0.320 | |
P1V5_WLANBT_VLX | Default | d | 0.338 | |
P1V8G3S_DSCHG_EN | Default | d | 0.473 | |
P1V8G3S_DSCHG_EN_L | Default | d | 0.565 | |
P1V8G3S_EN | Default | d | 0.566 | |
P1V8G3S_SS | Default | d | 0.623 | |
P1V8PRIM_EN | Default | d | 0.530 | |
P1V8PRIM_FB_R | Default | d | 1.961 | |
P1V8PRIM_FB_TOP | Default | d | 0.289 | |
P1V8PRIM_PGOOD | Default | d | 0.500 | |
P1V8SLPS2R_SW0 | Default | d | 0.359 | |
P1V8_DFR_R | Default | d | 0.720 | |
P1V8_G3S_DSCHG | Default | d | 0.313 | |
P1V8_G3S_EN_R | Default | d | OL | |
P1VPRIM_FB | Default | d | 0.503 | |
P1VPRIM_SW0 | Default | d | 0.514 | |
P2V5_SW2_TPS62180_SSD0 | Default | d | 0.425 | |
P3V3G3HRTC_FB | Default | d | 1.410 | |
P3V3G3HRTC_FB_R | Default | d | 0.380 | |
P3V3G3HRTC_PGOOD | Default | d | 0.692 | |
P3V3G3HRTC_PHASE1 | Default | d | 0.388 | |
P3V3G3HRTC_PHASE2 | Default | d | 0.388 | |
P3V3G3HRTC_RA_R | Default | d | 0.380 | |
P3V3G3HRTC_SS | Default | d | 0.537 | |
P3V3G3H_COMP2 | Default | d | 0.745 | |
P3V3G3H_COMP2_R | Default | d | OL | |
P3V3G3H_CSN2 | Default | d | 0.432 | |
P3V3G3H_CSP2 | Default | d | 1.293 | |
P3V3G3H_CSP2_R | Default | d | 0.432 | |
P3V3G3H_DRVH | Default | d | 0.996 | |
P3V3G3H_DRVL | Default | d | 0.561 | |
P3V3G3H_DRVL_R | Default | d | 0.561 | |
P3V3G3H_EN_R | Default | d | 0.592 | |
P3V3G3H_RF | Default | d | 0.589 | |
P3V3G3H_SW | Default | d | 0.430 | |
P3V3G3H_TG | Default | d | 0.998 | |
P3V3G3H_VBST | Default | d | 0.629 | |
P3V3G3H_VBST_R | Default | d | 0.629 | |
P3V3G3H_VFB2 | Default | d | 0.593 | |
P3V3G3H_VFB2_R | Default | d | 0.432 | |
P3V3G3H_VFB2_RR | Default | d | 1.361 | |
P3V3G3H_VSW | Default | d | 0.450 | |
P3V3G3S_EN | Default | d | 0.556 | |
P3V3G3S_SS | Default | d | 0.608 | |
P3V3MAIN_PGOOD | Default | d | 0.583 | |
P3V3TBT_T_RAMP_SWR | Default | d | 0.704 | |
P3V3TBT_T_RAMP_SXT | Default | d | 0.720 | |
P3V3TBT_X_RAMP_SWR | Default | d | 0.700 | |
P3V3TBT_X_RAMP_SXT | Default | d | 0.720 | |
P5VG3S_COMP1 | Default | d | 0.746 | |
P5VG3S_COMP1_R | Default | d | OL | |
P5VG3S_CSN1 | Default | d | 0.427 | |
P5VG3S_CSP1 | Default | d | 1.000 | |
P5VG3S_CSP1_R | Default | d | 0.427 | |
P5VG3S_EN | Default | d | 0.590 | |
P5VG3S_EN_R | Default | d | 0.590 | |
P5VG3S_PGOOD | Default | d | 0.584 | |
P5VG3S_SW | Default | d | 0.426 | |
P5VG3S_VBST | Default | d | 0.630 | |
P5VG3S_VBST_R | Default | d | 0.629 | |
P5VG3S_VFB1 | Default | d | 0.588 | |
P5VG3S_VFB1_R | Default | d | 0.426 | |
P5VG3S_VFB1_RR | Default | d | 0.625 | |
P5VG3S_VSW | Default | d | 0.433 | |
P5VP3V3_SKIPSEL | Default | d | 0.487 | |
P5VP3V3_VREF2 | Default | d | 0.492 | |
P5VP3V3_VREG3 | Default | d | 0.525 | |
P5VUSBC_AGND_VWR | Default | d | 0.000 | |
P5VUSBC_AGND_VXT | Default | d | 0.000 | |
P5VUSBC_BOOT_RC_VWR | Default | d | 0.605 | |
P5VUSBC_BOOT_RC_VXT | Default | d | 0.608 | |
P5VUSBC_DRVH_R_VWR | Default | d | 0.956 | |
P5VUSBC_DRVH_R_VXT | Default | d | 0.970 | |
P5VUSBC_DRVH_VWR | Default | d | 0.952 | |
P5VUSBC_DRVH_VXT | Default | d | 0.971 | |
P5VUSBC_FSEL_VWR | Default | d | 0.554 | |
P5VUSBC_NEG_WR | Default | d | 0.511 | |
P5VUSBC_NEG_XT | Default | d | 0.491 | |
P5VUSBC_OCSET_VWR | Default | d | 0.553 | |
P5VUSBC_OCSET_VXT | Default | d | 0.555 | |
P5VUSBC_PGOOD_VXT | Default | d | 0.556 | |
P5VUSBC_POS_WR | Default | d | 0.511 | |
P5VUSBC_POS_XT | Default | d | 0.491 | |
P5VUSBC_RTN_DIV_VWR | Default | d | 0.549 | |
P5VUSBC_RTN_DIV_VXT | Default | d | 0.551 | |
P5VUSBC_RTN_DIV_XW_VWR | Default | d | 0.000 | |
P5VUSBC_RTN_DIV_XW_VXT | Default | d | 0.000 | |
P5VUSBC_R_VWR | Default | d | 0.511 | |
P5VUSBC_R_VXT | Default | d | 0.491 | |
P5VUSBC_SENSE_DIV_VWR | Default | d | 0.547 | |
P5VUSBC_SENSE_DIV_VXT | Default | d | 0.550 | |
P5VUSBC_SENSE_DIV_XW_VWR | Default | d | 0.480 | |
P5VUSBC_SENSE_DIV_XW_VXT | Default | d | 0.491 | |
P5VUSBC_SET0_VWR | Default | d | 0.550 | |
P5VUSBC_SET0_VXT | Default | d | 0.556 | |
P5VUSBC_SET1_VWR | Default | d | 0.550 | |
P5VUSBC_SET1_VXT | Default | d | 0.555 | |
P5VUSBC_SET_R_VWR | Default | d | OL | |
P5VUSBC_SET_R_VXT | Default | d | OL | |
P5VUSBC_SREF_VWR | Default | d | 0.550 | |
P5VUSBC_SREF_VXT | Default | d | 0.553 | |
P5VUSBC_SW_VWR | Default | d | 0.511 | |
P5VUSBC_SW_VXT | Default | d | 0.484 | |
P5VUSBC_VBST_VWR | Default | d | 0.602 | |
P5VUSBC_VBST_VXT | Default | d | 0.606 | |
P5VUSBC_VO_VWR | Default | d | 0.551 | |
P5VUSBC_VO_VXT | Default | d | 0.554 | |
P5V_P3V3G3H_LDO_EN | Default | d | 0.593 | |
PANEL_P3V3_EN | Default | d | 0.947 | |
PANEL_P3V3_EN_D | Default | d | 0.840 | |
PANEL_P5V_EN | Default | d | 0.576 | |
PANEL_P5V_EN_D | Default | d | 1.028 | |
PBUSVSENS_EN_L | Default | d | 0.457 | |
PBUSVSENS_EN_L_DIV | Default | d | 0.457 | |
PBUS_DIVIDER | Default | d | 0.700 | |
PBUS_DIVIDER_OUT | Default | d | 0.662 | |
PBUS_DIVIDER_REF | Default | d | 0.667 | |
PBUS_S0_VSENSE | Default | d | OL | |
PBUS_S0_VSENSE_IN | Default | d | 0.486 | |
PCH_BATLOW_L | Default | d | 0.811 | |
PCH_BBR_FORCE_PWR | Default | d | 0.660 | |
PCH_BT_AUDIO_SYNC | Default | d | 0.540 | |
PCH_CLK38M4_XTALIN_R | Default | d | 0.838 | |
PCH_CLK38M4_XTALOUT_R | Default | d | 0.831 | |
PCH_CORE_VID0 | Default | d | 0.537 | |
PCH_CORE_VID1 | Default | d | 0.536 | |
PCH_I2C_UPC_SCL | Default | d | 0.497 | |
PCH_I2C_UPC_SDA | Default | d | 0.499 | |
PCH_PCIE_CLK100M_WLAN_N | Default | d | 0.312 | |
PCH_PCIE_CLK100M_WLAN_P | Default | d | 0.312 | |
PCH_PWRBTN_L | Default | d | 0.742 | |
PCH_RTC_RESET_L | Default | d | 0.764 | |
PCH_STRP_NO_REBOOT | Default | d | 0.594 | |
PCH_UART_DEBUG_D2R_1 | Default | d | 0.702 | |
PCH_UART_DEBUG_R2D_1 | Default | d | 0.690 | |
PCH_UPC_I2C_INT_L | Default | d | 0.510 | |
PCH_WLAN_AUDIO_SYNC | Default | d | 0.517 | |
PCH_WLAN_CLKREQ_L | Default | d | 0.805 | |
PCH_WLAN_CLKREQ_R_L | Default | d | 0.517 | |
PCH_WLAN_DEV_WAKE | Default | d | 0.577 | |
PCH_WLAN_PERST_L | Default | d | 0.812 | |
PCIE_CLK100M_SOC_N | Default | d | 0.303 | |
PCIE_CLK100M_SOC_P | Default | d | 0.304 | |
PCIE_CLK100M_SSD0_01_N | Default | d | 0.128 | |
PCIE_CLK100M_SSD0_01_P | Default | d | 0.128 | |
PCIE_CLK100M_SSD0_23_N | Default | d | 0.128 | |
PCIE_CLK100M_SSD0_23_P | Default | d | 0.128 | |
PCIE_SSD0_D2R_C_N<1> | Default | d | 0.332 | |
PCIE_SSD0_D2R_C_N<2> | Default | d | 0.343 | |
PCIE_SSD0_D2R_C_P<1> | Default | d | 0.337 | |
PCIE_SSD0_D2R_C_P<2> | Default | d | 0.342 | |
PCIE_SSD0_D2R_N<0> | Default | d | 0.406 | |
PCIE_SSD0_D2R_N<1> | Default | d | 0.407 | |
PCIE_SSD0_D2R_N<2> | Default | d | 0.410 | |
PCIE_SSD0_D2R_P<0> | Default | d | 0.403 | |
PCIE_SSD0_D2R_P<1> | Default | d | 0.404 | |
PCIE_SSD0_D2R_P<2> | Default | d | 0.408 | |
PCIE_SSD0_R2D_C_N<1> | Default | d | 0.339 | |
PCIE_SSD0_R2D_C_N<2> | Default | d | 0.344 | |
PCIE_SSD0_R2D_C_P<1> | Default | d | 0.340 | |
PCIE_SSD0_R2D_C_P<2> | Default | d | 0.343 | |
PCIE_SSD0_R2D_N<1> | Default | d | 0.411 | |
PCIE_SSD0_R2D_N<2> | Default | d | 0.416 | |
PCIE_SSD0_R2D_P<1> | Default | d | 0.410 | |
PCIE_SSD0_R2D_P<2> | Default | d | 0.414 | |
PCPU_S0SW_EN | Default | d | 0.509 | |
PDM_DMIC_CLK0 | Default | d | 0.531 | |
PDM_DMIC_CLK0_R | Default | d | 0.477 | |
PDM_DMIC_CLK1 | Default | d | 0.530 | |
PDM_DMIC_CLK1_R | Default | d | 0.477 | |
PDM_DMIC_DATA0 | Default | d | 0.465 | |
PDM_DMIC_DATA0_RR | Default | d | 0.480 | |
PDM_DMIC_DATA1 | Default | d | 0.465 | |
PDM_DMIC_DATA1_RR | Default | d | 0.484 | |
PD_P1V1_S3_EN | Default | d | 0.516 | |
PD_UPC_R_GPIO1 | Default | d | 0.694 | |
PD_UPC_R_GPIO10 | Default | d | 0.705 | |
PD_UPC_R_GPIO9 | Default | d | 0.708 | |
PD_UPC_T_GPIO1 | Default | d | 0.688 | |
PD_UPC_T_GPIO10 | Default | d | 0.713 | |
PD_UPC_T_GPIO9 | Default | d | 0.712 | |
PD_UPC_WR_GPIO7 | Default | d | 0.676 | |
PD_UPC_W_GPIO1 | Default | d | 0.691 | |
PD_UPC_W_GPIO10 | Default | d | 0.712 | |
PD_UPC_W_GPIO9 | Default | d | 0.711 | |
PLT_RST_3V3_L | Default | d | 0.633 | |
PLT_RST_L | Default | d | 0.383 | |
PMU_ACTIVE_READY | Default | d | 0.496 | |
PMU_CALPE_ISENSE | Default | d | 0.589 | |
PMU_CLK32K_PCH | Default | d | 0.807 | |
PMU_CLK32K_PCH_1V0 | Default | d | 0.861 | |
PMU_CLK32K_PCH_R | Default | d | 0.772 | |
PMU_CLK32K_SOC | Default | d | 0.476 | |
PMU_CLK32K_SOC_R | Default | d | 0.511 | |
PMU_CLK32K_WLANBT | Default | d | 0.481 | |
PMU_COLD_RESET_L | Default | d | 0.471 | |
PMU_CPUDDR_ISENSE | Default | d | 0.591 | |
PMU_CPUP5VREG_ISENSE | Default | d | 0.592 | |
PMU_CPUVA_ISENSE | Default | d | 0.591 | |
PMU_CPUVA_VSENSE | Default | d | 0.593 | |
PMU_DDR1V2_ISENSE | Default | d | 0.589 | |
PMU_DDRVDDQ_ISENSE | Default | d | 0.593 | |
PMU_FORCE_DFU | Default | d | 0.766 | |
PMU_IREF | Default | d | 0.756 | |
PMU_LDO3_OUT | Default | d | 0.593 | |
PMU_OCARINA_ISENSE | Default | d | 0.592 | |
PMU_ONOFF_BUF_L | Default | d | 0.579 | |
PMU_ONOFF_L | Default | d | 0.579 | |
PMU_ONOFF_R_L | Default | d | 0.580 | |
PMU_ONOFF_R_L_CONN | Default | d | 0.584 | |
PMU_OTHER3V3_HI_ISENSE | Default | d | 0.590 | |
PMU_OTHER5V_HI_ISENSE | Default | d | 0.590 | |
PMU_P5VUSBC_WR_ISENSE | Default | d | 0.591 | |
PMU_P5VUSBC_XT_ISENSE | Default | d | 0.589 | |
PMU_PVDDMAIN_EN | Default | d | 0.770 | |
PMU_RSLOC_RST_L | Default | d | 0.518 | |
PMU_SSDNAND_ISENSE | Default | d | 0.590 | |
PMU_SYS_ALIVE | Default | d | 0.420 | |
PMU_TBT_XT_ISENSE | Default | d | 0.591 | |
PMU_VDD_HI | Default | d | 0.653 | |
PMU_VDD_MAX | Default | d | 0.550 | |
PMU_VREF | Default | d | 0.635 | |
PMU_XTAL1_R | Default | d | 0.793 | |
PMU_XTAL2 | Default | d | 0.793 | |
PM_PCH_PWROK | Default | d | 0.760 | |
PM_PCH_SYS_PWROK | Default | d | 0.462 | |
PM_RSMRST_L | Default | d | 0.661 | |
PM_RSMRST_R_L | Default | d | 0.452 | |
PM_SLP_S0_3V3_L | Default | d | 0.774 | |
PM_SLP_S0_L | Default | d | 0.480 | |
PM_SLP_S0_R_L | Default | d | OL | |
PM_SLP_S3_L_1 | Default | d | 0.530 | |
PM_SLP_S3_R_L | Default | d | 0.524 | |
PM_SLP_S4_L | Default | d | 0.801 | |
PM_SLP_S5_L | Default | d | 0.801 | |
PM_SLP_SUS_L | Default | d | 0.530 | |
PM_SLP_TIEOFF | Default | d | 0.701 | |
PM_SYSRST_L | Default | d | 0.803 | |
PM_SYSRST_R_L | Default | d | 0.463 | |
PM_THRMTRIP_L | Default | d | 0.192 | |
PP0V6_S3 | Default | d | 0.200 | |
PP0V6_S3_REG_R | Default | d | 0.200 | |
PP0V82_SLPDDR | Default | d | 0.052 | |
PP0V8_SLPS2R | Default | d | 0.224 | |
PP0V9_SLPDDR | Default | d | 0.070 | |
PP0V9_SSD0 | Default | d | 0.300 | |
PP0V9_SSD0_FB_DIS | Default | d | 0.298 | |
PP0V9_SSD0_S4E0_VDD_PLL | Default | d | 0.307 | |
PP0V9_SSD0_S4E1_VDD_PLL | Default | d | 0.295 | |
PP0V9_SSD0_S4E2_VDD_PLL | Default | d | 0.312 | |
PP0V9_SSD0_S4E3_VDD_PLL | Default | d | 0.301 | |
PP0V9_TBT_LVR_R | Default | d | 0.516 | |
PP0V9_TBT_LVR_T | Default | d | 0.525 | |
PP0V9_TBT_LVR_W | Default | d | 0.517 | |
PP0V9_TBT_LVR_X | Default | d | 0.523 | |
PP0V9_TBT_R_LC | Default | d | 0.361 | |
PP0V9_TBT_SVR_IND_R | Default | d | 0.416 | |
PP0V9_TBT_SVR_IND_T | Default | d | 0.397 | |
PP0V9_TBT_SVR_IND_W | Default | d | 0.425 | |
PP0V9_TBT_SVR_IND_X | Default | d | 0.400 | |
PP0V9_TBT_SVR_R | Default | d | 0.416 | |
PP0V9_TBT_SVR_T | Default | d | 0.397 | |
PP0V9_TBT_SVR_W | Default | d | 0.425 | |
PP0V9_TBT_SVR_X | Default | d | 0.400 | |
PP0V9_TBT_T_LC | Default | d | 0.375 | |
PP0V9_TBT_W_LC | Default | d | 0.358 | |
PP0V9_TBT_X_LC | Default | d | 0.367 | |
PP16V0_MESA | Default | d | 0.648 | |
PP16V0_MESA_FILT_CONN | Default | d | 0.665 | |
PP17V0_MOJAVE_LDOIN | Default | d | 0.587 | |
PP1P05_PCH_EXT | Default | d | 0.514 | |
PP1V05_PCH_OUT_FET | Default | d | 0.192 | |
PP1V05_PRIM_OUT_PCH | Default | d | 0.193 | |
PP1V05_S0SW_VCCSTG | Default | d | 0.125 | |
PP1V05_S0_CPU_VCCPLL | Default | d | 0.193 | |
PP1V05_S0_CPU_VCCST | Default | d | 0.113 | |
PP1V05_VCCSTG_OUT | Default | d | 0.126 | |
PP1V1_S0SW | Default | d | 0.467 | |
PP1V1_S3 | Default | d | 0.158 | |
PP1V1_S3_CPU | Default | d | 0.158 | |
PP1V1_S3_REG_R | Default | d | 0.158 | |
PP1V1_SLPDDR | Default | d | 0.330 | |
PP1V1_SLPDDR_SOC_VDDIOPLLDDR_F | Default | d | 0.330 | |
PP1V1_SLPS2R | Default | d | 0.241 | |
PP1V24_S5_PCH_VCCDPHY | Default | d | 0.369 | |
PP1V25_SLPS2R_SMC_AVREF | Default | d | 0.681 | |
PP1V2_AWAKE | Default | d | 0.522 | |
PP1V2_AWAKE_SOC_PCIEPLL_F | Default | d | 0.522 | |
PP1V2_AWAKE_SOC_PLLCPU_F | Default | d | 0.377 | |
PP1V2_AWAKE_SOC_PLLSOC_F | Default | d | 0.525 | |
PP1V2_WLANBT | Default | d | 0.294 | |
PP1V2_WLANBT_C | Default | d | 0.320 | |
PP1V5_UPC_LDO_CORE_R | Default | d | 0.505 | |
PP1V5_UPC_LDO_CORE_T | Default | d | 0.520 | |
PP1V5_UPC_LDO_CORE_T | Default | r | - | |
PP1V5_UPC_LDO_CORE_T | Default | v | - | |
PP1V5_UPC_LDO_CORE_W | Default | d | 0.513 | |
PP1V5_UPC_LDO_CORE_X | Default | d | 0.522 | |
PP1V5_WLANBT | Default | d | 0.326 | |
PP1V5_WLANBT_C | Default | d | 0.338 | |
PP1V8_AWAKE | Default | d | 0.402 | |
PP1V8_AWAKE_SOC_FMON_RC | Default | d | 0.455 | |
PP1V8_AWAKE_SOC_TSADC_RC | Default | d | 0.402 | |
PP1V8_CODEC | Default | d | 0.303 | |
PP1V8_CODEC_VCP | Default | d | 0.303 | |
PP1V8_CODEC_VCP_SEL | Default | d | 0.303 | |
PP1V8_CODEC_VL | Default | d | 0.303 | |
PP1V8_CODEC_VL_SEL | Default | d | 0.303 | |
PP1V8_DFR | Default | d | 0.535 | |
PP1V8_DMIC | Default | d | 0.322 | |
PP1V8_G3S | Default | d | 0.303 | |
PP1V8_G3S_WLANBT | Default | d | 0.305 | |
PP1V8_IO_SSD0 | Default | d | 0.375 | |
PP1V8_IO_SSD0_R2 | Default | d | OL | |
PP1V8_MESA | Default | d | 0.530 | |
PP1V8_MESA_FILT_CONN | Default | d | 0.532 | |
PP1V8_PCH_CLKLDO | Default | d | 0.270 | |
PP1V8_PCH_CLKLDO_R | Default | d | 0.288 | |
PP1V8_S0SW | Default | d | 0.369 | |
PP1V8_S3 | Default | d | 0.279 | |
PP1V8_S3_MEM | Default | d | 0.279 | |
PP1V8_S4SW_SNS | Default | d | 0.492 | |
PP1V8_S5 | Default | d | 0.270 | |
PP1V8_S5_THMSNSA_R | Default | d | 0.291 | |
PP1V8_S5_THMSNSB_R | Default | d | 0.290 | |
PP1V8_SLPS2R | Default | d | 0.359 | |
PP1V8_SLPS2R_PMUVDDGPIO | Default | d | 0.736 | |
PP1V8_SLPS2R_SOC_LPADC_RC | Default | d | 0.405 | |
PP1V8_SLPS2R_SOC_LPOSC_RC | Default | d | 0.410 | |
PP20V_USBC_R_VBUS | Default | d | 0.137 | |
PP20V_USBC_T_VBUS | Default | d | 0.138 | |
PP20V_USBC_T_VBUS | Default | v | 5.100 | |
PP20V_USBC_W_VBUS | Default | d | 0.135 | |
PP20V_USBC_X_VBUS | Default | d | 0.139 | |
PP2V5_ADC1_VREF | Default | d | OL | |
PP2V5_NAND_SSD0 | Default | d | 0.425 | |
PP3V0_MESA | Default | d | 0.556 | |
PP3V0_MESA_FILT_CONN | Default | d | 0.555 | |
PP3V3_AWAKE | Default | d | 0.639 | |
PP3V3_CODEC_LDO_IN | Default | d | OL | |
PP3V3_CODEC_VP | Default | d | 0.369 | |
PP3V3_G3H | Default | d | 0.450 | |
PP3V3_G3HSW_DFR | Default | d | 0.567 | |
PP3V3_G3H_DFR | Default | d | 0.450 | |
PP3V3_G3H_MESA_SW | Default | d | 0.369 | |
PP3V3_G3H_PMU_VDDMAIN | Default | d | 0.450 | |
PP3V3_G3H_PMU_VINRTC_R | Default | d | 0.368 | |
PP3V3_G3H_RSLOC | Default | d | 0.369 | |
PP3V3_G3H_RTC | Default | d | 0.369 | |
PP3V3_G3H_RTC_MESA | Default | d | 0.369 | |
PP3V3_G3H_RTC_REG_R | Default | d | 0.388 | |
PP3V3_G3H_SSD0 | Default | d | 0.369 | |
PP3V3_G3S | Default | d | 0.338 | |
PP3V3_G3S_KBD | Default | d | 0.338 | |
PP3V3_G3S_TPAD | Default | d | 0.338 | |
PP3V3_G3S_WLANBT | Default | d | 0.338 | |
PP3V3_S0SW_LCD | Default | d | 0.492 | |
PP3V3_S0SW_LCD_R | Default | d | 0.492 | |
PP3V3_S0_TBT_WR_ISNS_R | Default | d | 0.370 | |
PP3V3_S0_TBT_XT_ISNS_R | Default | d | 0.450 | |
PP3V3_S5 | Default | d | 0.356 | |
PP3V3_TBT_ANA_R | Default | d | 0.555 | |
PP3V3_TBT_ANA_T | Default | d | 0.556 | |
PP3V3_TBT_ANA_W | Default | d | 0.552 | |
PP3V3_TBT_ANA_X | Default | d | 0.560 | |
PP3V3_TBT_LC_R | Default | d | 0.572 | |
PP3V3_TBT_LC_T | Default | d | 0.578 | |
PP3V3_TBT_LC_W | Default | d | 0.572 | |
PP3V3_TBT_LC_X | Default | d | 0.578 | |
PP3V3_TBT_R_S0 | Default | d | 0.517 | |
PP3V3_TBT_R_SX | Default | d | 0.517 | |
PP3V3_TBT_S0_SVR_R | Default | d | 0.517 | |
PP3V3_TBT_S0_SVR_T | Default | d | 0.523 | |
PP3V3_TBT_S0_SVR_W | Default | d | 0.517 | |
PP3V3_TBT_S0_SVR_X | Default | d | 0.523 | |
PP3V3_TBT_T_S0 | Default | d | 0.523 | |
PP3V3_TBT_T_S0_R_SWR | Default | d | 0.517 | |
PP3V3_TBT_T_S0_R_SXT | Default | d | 0.523 | |
PP3V3_TBT_T_SW_SWR | Default | d | 0.369 | |
PP3V3_TBT_T_SW_SXT | Default | d | 0.434 | |
PP3V3_TBT_T_SX | Default | d | 0.521 | |
PP3V3_TBT_VCCA_R | Default | d | 0.517 | |
PP3V3_TBT_VCCA_T | Default | d | 0.523 | |
PP3V3_TBT_VCCA_W | Default | d | 0.517 | |
PP3V3_TBT_W_S0 | Default | d | 0.517 | |
PP3V3_TBT_W_SX | Default | d | 0.517 | |
PP3V3_TBT_X_S0 | Default | d | 0.523 | |
PP3V3_TBT_X_S0_R_SWR | Default | d | 0.517 | |
PP3V3_TBT_X_S0_R_SXT | Default | d | 0.523 | |
PP3V3_TBT_X_SW_SWR | Default | d | 0.369 | |
PP3V3_TBT_X_SW_SXT | Default | d | 0.434 | |
PP3V3_TBT_X_SX | Default | d | 0.522 | |
PP3V3_UPC_R_LDO | Default | d | 0.503 | |
PP3V3_UPC_R_VOUTLV | Default | d | 0.538 | |
PP3V3_UPC_T_LDO | Default | d | 0.500 | |
PP3V3_UPC_T_VOUTLV | Default | d | 0.554 | |
PP3V3_UPC_W_LDO | Default | d | 0.498 | |
PP3V3_UPC_W_VOUTLV | Default | d | 0.537 | |
PP3V3_UPC_X_LDO | Default | d | 0.510 | |
PP3V3_UPC_X_VOUTLV | Default | d | 0.553 | |
PP3V_G3H_RTC | Default | d | 0.533 | |
PP5V_COREVR_VCC | Default | d | 0.427 | |
PP5V_EADC1_AVDD | Default | d | OL | |
PP5V_G3S | Default | d | 0.433 | |
PP5V_G3S_ALSCAM | Default | d | 0.433 | |
PP5V_G3S_ALSCAM_F | Default | d | 0.433 | |
PP5V_G3S_CPUREG | Default | d | 0.426 | |
PP5V_G3S_DFR_FILT | Default | d | 0.429 | |
PP5V_G3S_KBD | Default | d | 0.427 | |
PP5V_G3S_TPAD | Default | d | 0.433 | |
PP5V_G3S_TPAD_CONN | Default | d | 0.424 | |
PP5V_MAIN_VCORE1 | Default | d | 0.425 | |
PP5V_MAIN_VCORE2 | Default | d | 0.425 | |
PP5V_MAIN_VCORE3 | Default | d | 0.426 | |
PP5V_S0SW_LCD | Default | d | 0.576 | |
PP5V_S0SW_LCD_ISNS_R | Default | d | 0.576 | |
PP5V_S0_BKLT_A | Default | d | 0.436 | |
PP5V_S0_BKLT_D | Default | d | 0.435 | |
PP5V_S4SW_ISNS | Default | d | OL | |
PP5V_S4_WLAN_ISNS_D | Default | d | OL | |
PP5V_S4_WR_USBC | Default | d | 0.511 | |
PP5V_S4_XT_USBC | Default | d | 0.491 | |
PP5V_S5_LDO | Default | d | 0.494 | |
PP5V_USBC_PVCC_VWR | Default | d | 0.428 | |
PP5V_USBC_PVCC_VXT | Default | d | 0.430 | |
PP5V_USBC_VCC_VWR | Default | d | 0.426 | |
PP5V_USBC_VCC_VXT | Default | d | 0.429 | |
PP5V_VDD2_V5IN | Default | d | 0.424 | |
PPBUS_G3H | Default | d | 0.510 | |
PPBUS_G3H_SPKRAMP_LEFT | Default | d | 0.510 | |
PPBUS_G3H_SSD0 | Default | d | 0.510 | |
PPBUS_HS_CPU | Default | d | 0.510 | |
PPDCIN_G3H | Default | d | 0.549 | |
PPDCIN_G3H_CHGR | Default | d | 0.562 | |
PPHV_INT_G3H_R | Default | d | 0.563 | |
PPHV_INT_G3H_T | Default | d | 0.549 | |
PPHV_INT_G3H_W | Default | d | 0.549 | |
PPHV_INT_G3H_X | Default | d | 0.548 | |
PPVBAT_G3H_CHGR_R | Default | d | 0.510 | |
PPVBAT_G3H_CHGR_REG | Default | d | 0.510 | |
PPVBAT_G3H_CHGR_REG | Default | v | 12.000 | |
PPVBAT_G3H_CONN | Default | d | 1.574 | |
PPVCCINAUX1_PVCC | Default | d | 0.476 | |
PPVCCINAUX1_VCC | Default | d | 0.426 | |
PPVCCIN_AUX_PCH_PRIM | Default | d | 0.380 | |
PPVCCIN_S0_CPU | Default | d | 0.090 | |
PPVCCIN_S0_CPU | Default | r | 75.000R | |
PPVCCIN_S0_CPU | Default | t | Starts at 1.8V drops to 0V for about 1 second then comes back to 1.6V if CPU is working fine, this bahaivior is equivalent to fan spin. | |
PPVCCIN_S0_CPU | Default | v | 1.600 | |
PPVCCIO_OUT | Default | d | 0.083 | |
PPVCCQ_ANI_SSD0 | Default | d | 0.300 | |
PPVCCQ_SSD0_FB_DIS | Default | d | 0.288 | |
PPVCC_CPU_PH1 | Default | d | 0.090 | |
PPVCC_CPU_PH1 | Default | r | 90.000R | |
PPVCC_CPU_PH2 | Default | d | 0.090 | |
PPVCC_CPU_PH2 | Default | r | 90.000R | |
PPVCC_CPU_PH3 | Default | d | 0.090 | |
PPVCC_CPU_PH3 | Default | r | 90.000 | |
PPVCC_OBS_CD | Default | d | 0.080 | |
PPVDDCPUSRAM_AWAKE | Default | d | 0.394 | |
PPVDDCPU_AWAKE | Default | d | 0.013 | |
PPVDD_SE_VDDA | Default | d | 0.338 | |
PPVIN_G3H_P3V3G3H | Default | d | 0.510 | |
PPVIN_G3H_P3V3G3HRTC | Default | d | 0.510 | |
PPVIN_G3H_P3V3G3HRTC_R | Default | d | 0.517 | |
PPVIN_G3H_P5VG3S | Default | d | 0.510 | |
PPVIN_RFLDO_WLANBT | Default | d | 0.328 | |
PPVIN_RFLDO_WLANBT_C | Default | d | 0.354 | |
PPVIN_S0PRIM_1V8_RC | Default | d | 0.488 | |
PPVIN_S0SW_LCDBKLT | Default | d | 0.910 | |
PPVIN_S0SW_LCDBKLT_F | Default | d | 0.510 | |
PPVIN_S0SW_LCDBKLT_R | Default | d | 0.510 | |
PPVIN_S0_CPUVR_VIN | Default | d | 0.494 | |
PPVIN_S0_PRIM1V8 | Default | d | 0.510 | |
PPVIN_SW_LCDBKLT_SW | Default | d | 0.910 | |
PPVNN_PCH_EXT | Default | d | 0.523 | |
PPVOUT_BKLT_FB2 | Default | d | 0.622 | |
PPVOUT_S0_KBDLED | Default | d | 0.653 | |
PPVOUT_S0_KBDLED_R | Default | d | 0.622 | |
PPVOUT_S0_LCDBKLT | Default | d | 1.260 | |
PPVOUT_S0_LCDBKLT_F | Default | d | 1.260 | |
PPVTT_VTTREF | Default | d | 0.489 | |
PP_VDD_SE_VDDC | Default | d | 0.343 | |
PP_VDD_SE_VDDNV | Default | d | 0.367 | |
PP_VDD_SE_VDDPLL | Default | d | 0.367 | |
PP_VDD_SE_VHV | Default | d | 0.325 | |
PP_VDD_SE_VREF | Default | d | 0.697 | |
PROG1_CPUCOREVR | Default | d | 0.620 | |
PROG2_CPUCOREVR | Default | d | 0.620 | |
PROG4_CPUCOREVR | Default | d | 0.623 | |
PROG5_CPUCOREVR | Default | d | 0.622 | |
PVCCCORE_PH1_AGND | Default | d | 0.000 | |
PVCCCORE_PH2_AGND | Default | d | 0.000 | |
PVCCCORE_PH3_AGND | Default | d | 0.000 | |
PVCCINAUX_DSCHG | Default | d | 0.420 | |
PVCCINAUX_DSCHG_EN | Default | d | 0.477 | |
PVCCINAUX_DSCHG_EN_L | Default | d | 0.453 | |
PVCCPCOREPRIM_FB_N | Default | d | 0.000 | |
PVCCPCOREPRIM_FB_P | Default | d | 0.518 | |
PVCCPCOREPRIM_SW0 | Default | d | 0.523 | |
PVCCPLLOC_EN | Default | d | 0.769 | |
PVCCQ_LX0 | Default | d | 0.300 | |
PVCCSTG_DSCHG | Default | d | 0.505 | |
PVCCSTG_DSCHG_EN | Default | d | 0.468 | |
PVCCSTG_DSCHG_EN_L | Default | d | 0.511 | |
PVCCST_EN | Default | d | 0.775 | |
PVDD2_EN_R | Default | d | 0.558 | |
PVDD2_REFIN | Default | d | 0.697 | |
PVDDCPUAWAKE_FB | Default | d | 0.015 | |
PVDDCPUAWAKE_FB_R | Default | d | 0.015 | |
PVDDCPUAWAKE_SW0 | Default | d | 0.013 | |
PVDDCPUAWAKE_SW1 | Default | d | 0.013 | |
PVDDCPUAWAKE_SW2 | Default | d | 0.013 | |
PVDDCPUAWAKE_SW3 | Default | d | 0.013 | |
PVDDCPUSRAMAWAKE_FB | Default | d | 0.400 | |
PVDDCPUSRAMAWAKE_SW0 | Default | d | 0.394 | |
PVDDQ_EN | Default | d | 0.558 | |
PVDDQ_EN_LED | Default | d | OL | |
PVDDQ_PGOOD | Default | d | 0.616 | |
PVIN_RFLDO_WLANBT_VLX | Default | d | 0.354 | |
REG_FB_P1V8PRIM | Default | d | 1.391 | |
REG_PHASE_1V8PRIM | Default | d | 0.270 | |
REG_PHASE_1V8PRIM_MID | Default | d | 0.270 | |
REG_SSTR_P1V8PRIM | Default | d | 0.746 | |
REG_VOS_P1V8PRIM | Default | d | 0.297 | |
RSLOC_RST_L | Default | d | 0.487 | |
RSMRSTL_R | Default | d | 0.661 | |
RTN_A_CPUCORE | Default | d | 0.002 | |
SAVE_BAT_G | Default | d | 0.771 | |
SAVE_BAT_S | Default | d | 1.560 | |
SD3_RCOMP | Default | d | 0.201 | |
SENSOR_PWR_EN | Default | d | 0.718 | |
SEP_CAM_DISABLE_DFF_L | Default | d | 0.504 | |
SEP_CAM_DISABLE_L | Default | d | 0.000 | |
SEP_DISABLE_STROBE | Default | d | 0.469 | |
SEP_DMIC_DISABLE_L | Default | d | 0.470 | |
SEP_DMIC_DISABLE_OUT_L | Default | d | 0.489 | |
SEP_WP | Default | d | 0.747 | |
SE_CTLR_FW_DWLD | Default | d | 0.473 | |
SE_DEV_WAKE | Default | d | 0.473 | |
SE_HOST_WAKE | Default | d | 0.470 | |
SE_HOST_WAKE_R | Default | d | 0.470 | |
SE_PWR_EN | Default | d | 0.757 | |
SE_RX_N | Default | d | 0.512 | |
SE_RX_P | Default | d | 0.512 | |
SMBUS_3V3_BATT_SCL | Default | d | 0.997 | |
SMBUS_3V3_BATT_SDA | Default | d | 0.973 | |
SMCRST_TIEOFF | Default | d | 0.709 | |
SMC_BMON_ISENSE | Default | d | 0.810 | |
SMC_CPUVCCIN_VSENSE | Default | d | 0.808 | |
SMC_CPU_HS_ISENSE | Default | d | 0.810 | |
SMC_DCIN_ISENSE | Default | d | 0.809 | |
SMC_DCIN_VSENSE | Default | d | 0.805 | |
SMC_DEBUGPRT_RX | Default | d | 0.475 | |
SMC_DEBUGPRT_R_RX | Default | d | 0.479 | |
SMC_DEBUGPRT_R_TX | Default | d | 0.480 | |
SMC_DEBUGPRT_TX | Default | d | 0.479 | |
SMC_DPWROK1V8 | Default | d | 0.464 | |
SMC_FAN_0_PWM | Default | d | 0.480 | |
SMC_LID_LEFT | Default | d | 0.466 | |
SMC_LID_RIGHT | Default | d | 0.466 | |
SMC_PBUS_VSENSE | Default | d | 0.805 | |
SMC_PCH_PWROK | Default | d | 0.434 | |
SMC_PCH_SYS_PWROK | Default | d | 0.431 | |
SMC_PECI_RX | Default | d | 0.470 | |
SMC_PECI_TX | Default | d | 0.466 | |
SMC_PECI_TX_R | Default | d | 0.466 | |
SMC_PP3V3_WLANBT_ISENSE | Default | d | 0.811 | |
SMC_PROCHOT_L | Default | d | 0.463 | |
SMC_RSMRST_L | Default | d | 0.432 | |
SMC_SYSRST_L | Default | d | 0.432 | |
SOC_CLKREQ_BUF_L | Default | d | 0.528 | |
SOC_CLKREQ_L | Default | d | 0.523 | |
SOC_CLKREQ_R_L | Default | d | 0.471 | |
SOC_CLKREQ_SW_EN | Default | d | 0.636 | |
SOC_COLD_RESET_L | Default | d | 0.474 | |
SOC_DDR0_RREF | Default | d | 0.527 | |
SOC_DDR0_ZQ | Default | d | 0.397 | |
SOC_DDR1_RREF | Default | d | 0.536 | |
SOC_DDR2_RREF | Default | d | 0.525 | |
SOC_DFU_STATUS | Default | d | 0.478 | |
SOC_DOCK_CONNECT | Default | d | 0.505 | |
SOC_FORCE_DFU | Default | d | 0.479 | |
SOC_HOLD_RESET | Default | d | 0.475 | |
SOC_JTAG_SEL | Default | d | 0.472 | |
SOC_KBD_BKLT_PWM | Default | d | 0.483 | |
SOC_KBD_BKLT_PWM_R | Default | d | 0.483 | |
SOC_MIPI0C_REXT | Default | d | 0.813 | |
SOC_MIPI1C_REXT | Default | d | 0.812 | |
SOC_MIPID_REXT | Default | d | 0.812 | |
SOC_PCIE_DN_REXT | Default | d | 0.785 | |
SOC_PCIE_STG0_REXT | Default | d | 0.784 | |
SOC_PCIE_STG1_REXT | Default | d | 0.787 | |
SOC_PCIE_UP_REXT | Default | d | 0.784 | |
SOC_PERST_L | Default | d | 0.467 | |
SOC_SOCHOT_L | Default | d | 0.478 | |
SOC_TESTMODE | Default | d | 0.473 | |
SOC_USB_REXT | Default | d | 0.202 | |
SOC_USB_VBUS | Default | d | 0.404 | |
SOC_VDDCPU_SENSE | Default | d | 0.020 | |
SOC_WDOG | Default | d | 0.475 | |
SPARE_UPC_R | Default | d | 0.674 | |
SPARE_UPC_R_DBG | Default | d | 0.625 | |
SPARE_UPC_T | Default | d | 0.679 | |
SPARE_UPC_W | Default | d | 0.676 | |
SPARE_UPC_W_DBG | Default | d | 0.640 | |
SPARE_UPC_X | Default | d | 0.702 | |
SPARE_UPC_X_DBG | Default | d | 0.653 | |
SPI_DFR_CLK | Default | d | 0.494 | |
SPI_DFR_CLK_R | Default | d | 0.476 | |
SPI_DFR_CS_L | Default | d | 0.481 | |
SPI_DFR_MISO_R | Default | d | 0.500 | |
SPI_DFR_MOSI | Default | d | 0.485 | |
SPI_DFR_MOSI_R | Default | d | 0.476 | |
SPI_MESA_CLK | Default | d | 0.489 | |
SPI_MESA_CLK_CONN | Default | d | 0.570 | |
SPI_MESA_CLK_R | Default | d | 0.475 | |
SPI_MESA_MISO | Default | d | 0.480 | |
SPI_MESA_MISO_CONN | Default | d | 0.493 | |
SPI_MESA_MOSI | Default | d | 0.463 | |
SPI_MESA_MOSI_CONN | Default | d | 0.513 | |
SPI_MESA_MOSI_R | Default | d | 0.475 | |
SPI_SOCROM_CLK_R | Default | d | 0.445 | |
SPI_SOCROM_CS_L | Default | d | 0.475 | |
SPI_SOCROM_MISO | Default | d | 0.462 | |
SPI_SOCROM_MOSI | Default | d | 0.480 | |
SPI_SOCROM_MOSI_R | Default | d | 0.466 | |
SPI_SOCROM_WP_L | Default | d | 0.553 | |
SPI_TPAD_3V3_CLK | Default | d | 0.561 | |
SPI_TPAD_3V3_CLK_R | Default | d | 0.506 | |
SPI_TPAD_3V3_CS_L | Default | d | 0.635 | |
SPI_TPAD_3V3_MISO | Default | d | 0.636 | |
SPI_TPAD_3V3_MOSI | Default | d | 0.640 | |
SPI_TPAD_3V3_MOSI_R | Default | d | 0.625 | |
SPI_TPAD_CLK | Default | d | 0.496 | |
SPI_TPAD_CLK_R | Default | d | 0.479 | |
SPI_TPAD_CS_L | Default | d | 0.464 | |
SPI_TPAD_MISO | Default | d | 0.478 | |
SPI_TPAD_MISO_R | Default | d | 0.496 | |
SPI_TPAD_MOSI | Default | d | 0.496 | |
SPI_TPAD_MOSI_R | Default | d | 0.478 | |
SPKRAMP_INT_L | Default | d | 0.365 | |
SPKRAMP_LT_AREG | Default | d | 0.583 | |
SPKRAMP_LT_DREG | Default | d | 0.525 | |
SPKRAMP_LT_MODE | Default | d | 0.000 | |
SPKRAMP_LW_AREG | Default | d | 0.583 | |
SPKRAMP_LW_DREG | Default | d | 0.524 | |
SPKRAMP_LW_MODE | Default | d | 0.407 | |
SPKRAMP_RESET_L | Default | d | 0.365 | |
SPKRAMP_RT_AREG | Default | d | 0.583 | |
SPKRAMP_RT_BSTN | Default | d | 0.772 | |
SPKRAMP_RT_BSTP | Default | d | 0.772 | |
SPKRAMP_RT_DREG | Default | d | 0.523 | |
SPKRAMP_RW_AREG | Default | d | 0.583 | |
SPKRAMP_RW_BSTN | Default | d | 0.772 | |
SPKRAMP_RW_BSTP | Default | d | 0.772 | |
SPKRAMP_RW_DREG | Default | d | 0.522 | |
SPKRAMP_RW_MODE | Default | d | 0.467 | |
SPKRCONN_LT_OUTN | Default | d | 0.446 | |
SPKRCONN_LT_OUTP | Default | d | 0.445 | |
SPKRCONN_LW_OUTN | Default | d | 0.443 | |
SPKRCONN_LW_OUTP | Default | d | 0.446 | |
SPKRCONN_RT_OUTN | Default | d | 0.442 | |
SPKRCONN_RT_OUTP | Default | d | 0.445 | |
SPKRCONN_RW_OUTN | Default | d | 0.447 | |
SPKRCONN_RW_OUTP | Default | d | 0.453 | |
SPKR_ID0 | Default | d | 0.484 | |
SPKR_ID1 | Default | d | 0.481 | |
SPMI_CLK | Default | d | 0.496 | |
SPMI_CLK_R | Default | d | 0.476 | |
SPROM_CLK | Default | d | 0.500 | |
SPROM_CS | Default | d | 0.499 | |
SPROM_CS_R | Default | d | 0.695 | |
SPROM_DIN | Default | d | 0.507 | |
SPROM_DOUT | Default | d | 0.505 | |
SSD0_CLK24M | Default | d | 0.442 | |
SSD0_CLK24M_01 | Default | d | 0.446 | |
SSD0_CLK24M_23 | Default | d | 0.452 | |
SSD0_CLKREQ0_L | Default | d | 0.456 | |
SSD0_CLKREQ1_L | Default | d | 0.455 | |
SSD0_CR_P2V5_PGOOD | Default | d | 0.565 | |
SSD0_FORCE_EN | Default | d | 0.570 | |
SSD0_LPB_L | Default | d | 0.445 | |
SSD0_OCARINA_IREF | Default | d | 0.750 | |
SSD0_OCARINA_LPB_L | Default | d | 0.445 | |
SSD0_OCARINA_PFN_L | Default | d | 0.445 | |
SSD0_OCARINA_PGOOD | Default | d | 0.756 | |
SSD0_OCARINA_POK2 | Default | d | 0.000 | |
SSD0_OCARINA_RESET_L | Default | d | 0.445 | |
SSD0_OCARINA_TCAL | Default | d | 0.770 | |
SSD0_OCARINA_TDEV1 | Default | d | 0.370 | |
SSD0_OCARINA_TDEV2 | Default | d | 0.770 | |
SSD0_OCARINA_VDD_LDO | Default | d | 0.360 | |
SSD0_OCARINA_VR2_DIS | Default | d | 0.663 | |
SSD0_OCARINA_VREF | Default | d | 0.766 | |
SSD0_OCARINA_WP_L | Default | d | 0.371 | |
SSD0_PCIE_RESET_L | Default | d | 0.430 | |
SSD0_S4E0_ANI0_VREF | Default | d | 0.572 | |
SSD0_S4E0_ANI1_VREF | Default | d | 0.569 | |
SSD0_S4E0_AVDD18_PLL | Default | d | 0.290 | |
SSD0_S4E0_DROOP_L | Default | d | 0.495 | |
SSD0_S4E0_JTAG_TDI | Default | d | 0.491 | |
SSD0_S4E0_JTAG_TDO | Default | d | 0.464 | |
SSD0_S4E0_PCIE_RESREF | Default | d | 0.783 | |
SSD0_S4E0_PCI_AVDD_H | Default | d | 0.290 | |
SSD0_S4E0_SWD_UID0 | Default | d | 0.491 | |
SSD0_S4E0_SWD_UID1 | Default | d | 0.492 | |
SSD0_S4E0_VPP | Default | d | 0.559 | |
SSD0_S4E0_ZQ_C | Default | d | 0.100 | |
SSD0_S4E0_ZQ_L | Default | d | 0.300 | |
SSD0_S4E1_ANI0_VREF | Default | d | 0.566 | |
SSD0_S4E1_ANI1_VREF | Default | d | 0.563 | |
SSD0_S4E1_AVDD18_PLL | Default | d | 0.292 | |
SSD0_S4E1_JTAG_TDO | Default | d | 0.465 | |
SSD0_S4E1_PCIE_RESREF | Default | d | 0.784 | |
SSD0_S4E1_PCI_AVDD_H | Default | d | 0.292 | |
SSD0_S4E1_SWD_UID0 | Default | d | 0.489 | |
SSD0_S4E1_SWD_UID1 | Default | d | 0.487 | |
SSD0_S4E1_ZQ_C | Default | d | 0.100 | |
SSD0_S4E1_ZQ_L | Default | d | 0.302 | |
SSD0_S4E2_ANI0_VREF | Default | d | 0.590 | |
SSD0_S4E2_ANI1_VREF | Default | d | 0.591 | |
SSD0_S4E2_AVDD18_PLL | Default | d | 0.290 | |
SSD0_S4E2_DROOP_L | Default | d | 0.499 | |
SSD0_S4E2_JTAG_TDO | Default | d | 0.476 | |
SSD0_S4E2_PCIE_RESREF | Default | d | 0.786 | |
SSD0_S4E2_PCI_AVDD_H | Default | d | 0.290 | |
SSD0_S4E2_SWD_UID0 | Default | d | 0.497 | |
SSD0_S4E2_SWD_UID1 | Default | d | 0.495 | |
SSD0_S4E2_VPP | Default | d | 0.558 | |
SSD0_S4E2_ZQ_C | Default | d | 0.100 | |
SSD0_S4E2_ZQ_L | Default | d | 0.302 | |
SSD0_S4E3_AVDD18_PLL | Default | d | 0.292 | |
SSD0_S4E3_JTAG_TDO | Default | d | 0.511 | |
SSD0_S4E3_PCI_AVDD_H | Default | d | 0.292 | |
SSD0_S4E3_ZQ_C | Default | d | 0.100 | |
SSD0_S4E_JTAG_SEL | Default | d | 0.444 | |
SSD0_S4E_JTAG_TRST_L | Default | d | 0.444 | |
SSD0_S4E_UART_TX | Default | d | 0.490 | |
SSD0_STG01_ADDR | Default | d | 0.570 | |
SSD0_SWCLK | Default | d | 0.434 | |
SSD0_SWDIO | Default | d | 0.432 | |
SSD0_TPS62180_FB | Default | d | 1.413 | |
SSD0_TPS62180_FB_R | Default | d | 0.320 | |
SSD0_TPS62180_SS | Default | d | 0.538 | |
SSD0_VR_2V5_EN | Default | d | 0.640 | |
SSD0_VR_P2V5_EN_R | Default | d | 0.640 | |
SSD0_WP_L | Default | d | 0.371 | |
SSD_BFH | Default | d | 0.433 | |
SSD_PMU_RESET_L | Default | d | 0.475 | |
SWD_SOC_SWCLK | Default | d | 0.474 | |
SWD_SOC_SWCLK_R | Default | d | 0.505 | |
SWD_SOC_SWCLK_T | Default | d | 0.505 | |
SWD_SOC_SWCLK_X | Default | d | 0.506 | |
SWD_SOC_SWDIO | Default | d | 0.473 | |
SWD_SOC_SWDIO_R | Default | d | 0.504 | |
SWD_SOC_SWDIO_T | Default | d | 0.505 | |
SWD_SOC_SWDIO_X | Default | d | 0.505 | |
SYS_DETECT | Default | d | OL | |
SYS_DETECT_L | Default | d | 0.590 | |
TBT_POC_RESET | Default | d | 0.532 | |
TBT_PWR_EN | Default | d | 0.775 | |
TBT_RBIAS_R | Default | d | 0.773 | |
TBT_RBIAS_T | Default | d | 0.777 | |
TBT_RBIAS_W | Default | d | 0.774 | |
TBT_RBIAS_X | Default | d | 0.779 | |
TBT_RSENSE_R | Default | d | 0.000 | |
TBT_RSENSE_T | Default | d | 0.000 | |
TBT_RSENSE_W | Default | d | 0.000 | |
TBT_R_FLASH_SHARE_EN | Default | d | 0.594 | |
TBT_R_FORCE_PWR | Default | d | 0.580 | |
TBT_R_GPIO_5 | Default | d | 0.595 | |
TBT_R_SPI_CLK | Default | d | 0.562 | |
TBT_R_SPI_CS_L | Default | d | 0.562 | |
TBT_R_SPI_MISO | Default | d | 0.556 | |
TBT_R_SPI_MOSI | Default | d | 0.557 | |
TBT_TEST_PWR_GOOD_R | Default | d | 0.101 | |
TBT_TEST_PWR_GOOD_T | Default | d | 0.100 | |
TBT_TEST_PWR_GOOD_W | Default | d | 0.100 | |
TBT_TEST_PWR_GOOD_X | Default | d | 0.100 | |
TBT_T_FLASH_MSTR_H_SLV_L | Default | d | 0.600 | |
TBT_T_FLASH_SHARE_EN | Default | d | 0.599 | |
TBT_T_FORCE_PWR | Default | d | 0.600 | |
TBT_T_GPIO_12 | Default | d | 0.600 | |
TBT_T_GPIO_5 | Default | d | 0.600 | |
TBT_T_GPIO_6 | Default | d | 0.600 | |
TBT_T_S0_PWR_EN_SWR | Default | d | 0.538 | |
TBT_T_S0_PWR_EN_SXT | Default | d | 0.540 | |
TBT_T_SPI_CLK | Default | d | 0.558 | |
TBT_T_SPI_CS_L | Default | d | 0.567 | |
TBT_T_SPI_MISO | Default | d | 0.572 | |
TBT_T_SPI_MOSI | Default | d | 0.571 | |
TBT_T_THERM_D_N | Default | d | 0.000 | |
TBT_T_THERM_D_P | Default | d | 0.614 | |
TBT_WR_FLASH_BUSY_L | Default | d | 0.561 | |
TBT_WR_PERST_L | Default | d | 0.562 | |
TBT_WR_ROM_HOLD_L | Default | d | 0.662 | |
TBT_WR_ROM_WP_L | Default | d | 0.660 | |
TBT_WR_SPI_CLK | Default | d | 0.564 | |
TBT_WR_SPI_CLK_DBG | Default | d | 0.665 | |
TBT_WR_SPI_CS_L | Default | d | 0.565 | |
TBT_WR_SPI_MISO | Default | d | 0.554 | |
TBT_WR_SPI_MOSI | Default | d | 0.559 | |
TBT_W_FLASH_MSTR_H_SLV_L | Default | d | 0.598 | |
TBT_W_FLASH_SHARE_EN | Default | d | 0.595 | |
TBT_W_FORCE_PWR | Default | d | 0.586 | |
TBT_W_GPIO_12 | Default | d | 0.596 | |
TBT_W_GPIO_5 | Default | d | 0.597 | |
TBT_W_GPIO_6 | Default | d | 0.598 | |
TBT_W_SPI_CLK | Default | d | 0.565 | |
TBT_W_SPI_CS_L | Default | d | 0.565 | |
TBT_W_SPI_MISO | Default | d | 0.554 | |
TBT_W_SPI_MOSI | Default | d | 0.558 | |
TBT_XTAL25M_IN_R | Default | d | 0.834 | |
TBT_XTAL25M_IN_R_R | Default | d | 0.834 | |
TBT_XTAL25M_IN_R_W | Default | d | 0.834 | |
TBT_XTAL25M_IN_W | Default | d | 0.834 | |
TBT_XTAL25M_OUT_R | Default | d | 0.790 | |
TBT_XTAL25M_OUT_R_R | Default | d | 0.790 | |
TBT_XTAL25M_OUT_R_W | Default | d | 0.788 | |
TBT_XTAL25M_OUT_W | Default | d | 0.788 | |
TBT_XT_FLASH_BUSY_L | Default | d | 0.569 | |
TBT_XT_PERST_L | Default | d | 0.572 | |
TBT_XT_ROM_HOLD_L | Default | d | 0.710 | |
TBT_XT_ROM_WP_L | Default | d | 0.710 | |
TBT_XT_SPI_CLK | Default | d | 0.555 | |
TBT_XT_SPI_CLK_DBG | Default | d | 0.655 | |
TBT_XT_SPI_CS_L | Default | d | 0.570 | |
TBT_XT_SPI_MISO | Default | d | 0.571 | |
TBT_XT_SPI_MOSI | Default | d | 0.573 | |
TBT_X_FLASH_MSTR_H_SLV_L | Default | d | 0.591 | |
TBT_X_FLASH_SHARE_EN | Default | d | 0.604 | |
TBT_X_FORCE_PWR | Default | d | 0.590 | |
TBT_X_GPIO_12 | Default | d | 0.610 | |
TBT_X_GPIO_5 | Default | d | 0.611 | |
TBT_X_GPIO_6 | Default | d | 0.609 | |
TBT_X_S0_PWR_EN_SWR | Default | d | 0.537 | |
TBT_X_S0_PWR_EN_SXT | Default | d | 0.539 | |
TBT_X_SPI_CLK | Default | d | 0.558 | |
TBT_X_SPI_CS_L | Default | d | 0.571 | |
TBT_X_SPI_MISO | Default | d | 0.570 | |
TBT_X_SPI_MOSI | Default | d | 0.572 | |
TEST_SOC_AMUXOUT | Default | d | 0.812 | |
TEST_SOC_TST_CLKOUT | Default | d | 0.479 | |
THMSNSA_DN | Default | d | 0.000 | |
TPAD_3V3_ACTUATOR_DISABLE_L | Default | d | 0.940 | |
TPAD_3V3_SPI_EN | Default | d | 0.629 | |
TPAD_3V3_SPI_INT_L | Default | d | 0.918 | |
TPAD_ACTUATOR_DISABLE_L | Default | d | 0.475 | |
TPAD_KBD_WAKE_L | Default | d | 0.476 | |
TPAD_SPI_EN | Default | d | 0.477 | |
TPAD_SPI_INT_L | Default | d | 0.473 | |
TP_BMON_IOUT | Default | d | OL | |
TP_CPU_BPM_L<2> | Default | d | 0.237 | |
TP_CPU_BPM_L<3> | Default | d | 0.235 | |
TP_CPU_RSVD_AB1 | Default | d | 0.260 | |
TP_CPU_RSVD_AV2 | Default | d | 0.315 | |
TP_CPU_RSVD_AW2 | Default | d | 0.314 | |
TP_CPU_RSVD_K2 | Default | d | 0.837 | |
TP_DFR_TOUCH_GPIO2 | Default | d | OL | |
TP_DFR_TOUCH_PANEL_DETECT | Default | d | OL | |
TP_DP_R_HPD | Default | d | 0.706 | |
TP_DP_T_HPD | Default | d | 0.711 | |
TP_DP_W_HPD | Default | d | 0.715 | |
TP_DP_X_HPD | Default | d | 0.713 | |
TP_FAN_LT_OTP1 | Default | d | OL | |
TP_FAN_LT_OTP2 | Default | d | OL | |
TP_FAN_RT_OTP1 | Default | d | OL | |
TP_FAN_RT_OTP2 | Default | d | OL | |
TP_I2S_BT_D2R | Default | d | 0.737 | |
TP_I2S_BT_R2D | Default | d | 0.704 | |
TP_JTAG_SOC_TDI | Default | d | 0.477 | |
TP_JTAG_SOC_TDO | Default | d | 0.475 | |
TP_JTAG_SOC_TRST_L | Default | d | 0.475 | |
TP_LCD_IRQ_L | Default | d | OL | |
TP_SMBUS_TBT_SCL_R | Default | d | 0.597 | |
TP_SMBUS_TBT_SCL_T | Default | d | 0.601 | |
TP_SMBUS_TBT_SCL_W | Default | d | 0.598 | |
TP_SMBUS_TBT_SCL_X | Default | d | 0.610 | |
TP_SMBUS_TBT_SDA_R | Default | d | 0.595 | |
TP_SMBUS_TBT_SDA_T | Default | d | 0.601 | |
TP_SMBUS_TBT_SDA_W | Default | d | 0.598 | |
TP_SMBUS_TBT_SDA_X | Default | d | 0.610 | |
TP_SMC_FIXTURE_MODE_L | Default | d | 0.478 | |
TP_SOC_DEBUGPRT_RX | Default | d | 0.478 | |
TP_SOC_DEBUGPRT_TX | Default | d | 0.479 | |
TP_SSD0_OCARINA_NAND_VCC_DET | Default | d | 0.757 | |
TP_USBC_PP20V_A_CWR | Default | d | OL | |
TP_USBC_PP20V_A_CXT | Default | d | OL | |
TP_USBC_PP20V_B_CWR | Default | d | OL | |
TP_USBC_PP20V_B_CXT | Default | d | OL | |
TP_WLAN_PMU_TEST | Default | d | 0.735 | |
UART_BT_BUF_CTS_L | Default | d | 0.479 | |
UART_BT_BUF_D2R | Default | d | 0.447 | |
UART_BT_BUF_R2D | Default | d | 0.479 | |
UART_BT_BUF_RTS_L | Default | d | 0.448 | |
UART_SE_D2R | Default | d | 0.471 | |
UART_SE_D2R_CTS_L | Default | d | 0.471 | |
UART_SE_R2D | Default | d | 0.451 | |
UART_SE_R2D_RTS_L | Default | d | 0.451 | |
UART_WLAN_D2R | Default | d | 0.477 | |
UART_WLAN_D2R_CTS_L | Default | d | 0.476 | |
UNCONNECTED_126 | Default | d | 0.700 | |
UNCONNECTED_385 | Default | d | OL | |
UPC_5V_EN_R_VWR | Default | d | 0.552 | |
UPC_5V_EN_R_VXT | Default | d | 0.556 | |
UPC_I2C_INT_L | Default | d | 0.472 | |
UPC_PMU_RESET | Default | d | 0.607 | |
UPC_R_FAULT_L | Default | d | 0.683 | |
UPC_R_FORCE_PWR | Default | d | 0.582 | |
UPC_R_OSC_R | Default | d | 0.465 | |
UPC_R_OSC_T | Default | d | 0.475 | |
UPC_R_OSC_W | Default | d | 0.465 | |
UPC_R_OSC_X | Default | d | 0.479 | |
UPC_R_RESET | Default | d | 0.588 | |
UPC_R_SER_DBG | Default | d | 0.688 | |
UPC_R_SWD_CLK | Default | d | 0.598 | |
UPC_R_SWD_DATA | Default | d | 0.711 | |
UPC_SS_R | Default | d | 0.579 | |
UPC_SS_T | Default | d | 0.592 | |
UPC_SS_W | Default | d | 0.580 | |
UPC_SS_X | Default | d | 0.591 | |
UPC_T_FAULT_L | Default | d | 0.694 | |
UPC_T_FORCE_PWR | Default | d | 0.604 | |
UPC_T_RESET | Default | d | 0.604 | |
UPC_T_SER_DBG | Default | d | 0.674 | |
UPC_T_SPI_CLK | Default | d | 0.575 | |
UPC_T_SPI_CS_L | Default | d | 0.583 | |
UPC_T_SPI_MISO | Default | d | 0.589 | |
UPC_T_SPI_MOSI | Default | d | 0.592 | |
UPC_T_SWD_CLK | Default | d | 0.599 | |
UPC_T_SWD_DATA | Default | d | 0.710 | |
UPC_WR_5V_EN | Default | d | 0.627 | |
UPC_WR_UART_RX | Default | d | 0.553 | |
UPC_WR_UART_TX | Default | d | 0.553 | |
UPC_W_FAULT_L | Default | d | 0.687 | |
UPC_W_FORCE_PWR | Default | d | 0.590 | |
UPC_W_RESET | Default | d | 0.590 | |
UPC_W_SER_DBG | Default | d | 0.689 | |
UPC_W_SPI_CLK | Default | d | 0.579 | |
UPC_W_SPI_CS_L | Default | d | 0.579 | |
UPC_W_SPI_MISO | Default | d | 0.568 | |
UPC_W_SPI_MOSI | Default | d | 0.573 | |
UPC_W_SWD_CLK | Default | d | 0.599 | |
UPC_W_SWD_DATA | Default | d | 0.712 | |
UPC_XT_5V_EN | Default | d | 0.553 | |
UPC_XT_UART_RX | Default | d | 0.565 | |
UPC_XT_UART_TX | Default | d | 0.563 | |
UPC_X_FAULT_L | Default | d | 0.690 | |
UPC_X_FORCE_PWR | Default | d | 0.595 | |
UPC_X_RESET | Default | d | 0.607 | |
UPC_X_SER_DBG | Default | d | 0.675 | |
UPC_X_SWD_CLK | Default | d | 0.597 | |
UPC_X_SWD_DATA | Default | d | 0.707 | |
UPC_X_VRET_R | Default | d | 0.000 | |
UPC_X_VRET_T | Default | d | 0.005 | |
UPC_X_VRET_W | Default | d | 0.000 | |
UPC_X_VRET_X | Default | d | 0.005 | |
USB2_TBT_R_N | Default | d | 0.432 | |
USB2_TBT_R_P | Default | d | 0.431 | |
USB2_TBT_T_N | Default | d | 0.566 | |
USB2_TBT_T_P | Default | d | 0.559 | |
USB2_TBT_W_N | Default | d | 0.428 | |
USB2_TBT_W_P | Default | d | 0.430 | |
USB2_TBT_X_N | Default | d | 0.572 | |
USB2_TBT_X_P | Default | d | 0.560 | |
USB3_BSSB_D2R_N | Default | d | 0.394 | |
USB3_BSSB_D2R_P | Default | d | 0.397 | |
USB3_BSSB_D2R_R_N | Default | d | 0.394 | |
USB3_BSSB_D2R_R_P | Default | d | 0.397 | |
USB3_BSSB_R2D_N | Default | d | 0.705 | |
USB3_BSSB_R2D_P | Default | d | 0.705 | |
USB3_EXTC_D2R_N | Default | d | 0.318 | |
USB3_EXTC_D2R_P | Default | d | 0.318 | |
USB3_EXTC_R2D_C_N | Default | d | 0.311 | |
USB3_EXTC_R2D_C_P | Default | d | 0.311 | |
USB3_EXTD_D2R_N | Default | d | 0.322 | |
USB3_EXTD_D2R_P | Default | d | 0.322 | |
USB3_EXTD_R2D_C_N | Default | d | 0.313 | |
USB3_EXTD_R2D_C_P | Default | d | 0.314 | |
USBC_AUXLSX_N_R | Default | d | 0.712 | |
USBC_AUXLSX_N_T | Default | d | 0.716 | |
USBC_AUXLSX_N_W | Default | d | 0.715 | |
USBC_AUXLSX_N_X | Default | d | 0.719 | |
USBC_AUXLSX_P_R | Default | d | 0.701 | |
USBC_AUXLSX_P_T | Default | d | 0.705 | |
USBC_AUXLSX_P_W | Default | d | 0.708 | |
USBC_AUXLSX_P_X | Default | d | 0.712 | |
USBC_A_D2R_CR_N<1>_CWR | Default | d | OL | |
USBC_A_D2R_CR_N<1>_CXT | Default | d | OL | |
USBC_A_D2R_CR_N<2>_CWR | Default | d | OL | |
USBC_A_D2R_CR_N<2>_CXT | Default | d | OL | |
USBC_A_D2R_CR_P<1>_CWR | Default | d | OL | |
USBC_A_D2R_CR_P<1>_CXT | Default | d | OL | |
USBC_A_D2R_CR_P<2>_CWR | Default | d | OL | |
USBC_A_D2R_CR_P<2>_CXT | Default | d | OL | |
USBC_A_R2D_N<1>_CWR | Default | d | OL | |
USBC_A_R2D_N<1>_CXT | Default | d | OL | |
USBC_A_R2D_N<2>_CWR | Default | d | OL | |
USBC_A_R2D_N<2>_CXT | Default | d | OL | |
USBC_A_R2D_P<1>_CWR | Default | d | OL | |
USBC_A_R2D_P<1>_CXT | Default | d | OL | |
USBC_A_R2D_P<2>_CWR | Default | d | OL | |
USBC_A_R2D_P<2>_CXT | Default | d | OL | |
USBC_B_D2R_CR_N<1>_CWR | Default | d | OL | |
USBC_B_D2R_CR_N<1>_CXT | Default | d | OL | |
USBC_B_D2R_CR_N<2>_CWR | Default | d | OL | |
USBC_B_D2R_CR_N<2>_CXT | Default | d | OL | |
USBC_B_D2R_CR_P<1>_CWR | Default | d | OL | |
USBC_B_D2R_CR_P<1>_CXT | Default | d | OL | |
USBC_B_D2R_CR_P<2>_CWR | Default | d | OL | |
USBC_B_D2R_CR_P<2>_CXT | Default | d | OL | |
USBC_B_R2D_N<1>_CWR | Default | d | OL | |
USBC_B_R2D_N<1>_CXT | Default | d | OL | |
USBC_B_R2D_N<2>_CWR | Default | d | OL | |
USBC_B_R2D_N<2>_CXT | Default | d | OL | |
USBC_B_R2D_P<1>_CWR | Default | d | OL | |
USBC_B_R2D_P<1>_CXT | Default | d | OL | |
USBC_B_R2D_P<2>_CWR | Default | d | OL | |
USBC_B_R2D_P<2>_CXT | Default | d | OL | |
USBC_HSR_AUXCH_C_N | Default | d | 0.333 | |
USBC_HSR_AUXCH_C_P | Default | d | 0.331 | |
USBC_HST_AUXCH_C_N | Default | d | 0.333 | |
USBC_HST_AUXCH_C_P | Default | d | 0.333 | |
USBC_HSW_AUXCH_C_N | Default | d | 0.334 | |
USBC_HSW_AUXCH_C_P | Default | d | 0.335 | |
USBC_HSX_AUXCH_C_N | Default | d | 0.333 | |
USBC_HSX_AUXCH_C_P | Default | d | 0.331 | |
USBC_R_CC1 | Default | d | 0.583 | |
USBC_R_CC2 | Default | d | 0.583 | |
USBC_R_RESET_L | Default | d | 0.690 | |
USBC_R_RST_L | Default | d | 0.674 | |
USBC_R_SBU1 | Default | d | 0.652 | |
USBC_R_SBU2 | Default | d | 0.651 | |
USBC_R_USB_BOT_N | Default | d | 0.765 | |
USBC_R_USB_BOT_P | Default | d | 0.765 | |
USBC_R_USB_TOP_N | Default | d | 0.765 | |
USBC_R_USB_TOP_P | Default | d | 0.765 | |
USBC_T_CC1 | Default | d | 0.579 | |
USBC_T_CC2 | Default | d | 0.580 | |
USBC_T_RESET_L | Default | d | 0.660 | |
USBC_T_SBU1 | Default | d | 0.664 | |
USBC_T_SBU2 | Default | d | 0.655 | |
USBC_T_USB_BOT_N | Default | d | 0.760 | |
USBC_T_USB_BOT_P | Default | d | 0.760 | |
USBC_T_USB_TOP_N | Default | d | 0.760 | |
USBC_T_USB_TOP_P | Default | d | 0.760 | |
USBC_W_CC1 | Default | d | 0.565 | |
USBC_W_CC2 | Default | d | 0.564 | |
USBC_W_RESET_L | Default | d | 0.652 | |
USBC_W_SBU1 | Default | d | 0.654 | |
USBC_W_SBU2 | Default | d | 0.654 | |
USBC_W_USB_BOT_N | Default | d | 0.765 | |
USBC_W_USB_BOT_P | Default | d | 0.765 | |
USBC_W_USB_TOP_N | Default | d | 0.765 | |
USBC_W_USB_TOP_P | Default | d | 0.765 | |
USBC_X_CC1 | Default | d | 0.585 | |
USBC_X_CC2 | Default | d | 0.586 | |
USBC_X_RESET_L | Default | d | 0.675 | |
USBC_X_RST_L | Default | d | 0.675 | |
USBC_X_SBU1 | Default | d | 0.656 | |
USBC_X_SBU2 | Default | d | 0.663 | |
USBC_X_USB_BOT_N | Default | d | 0.764 | |
USBC_X_USB_BOT_P | Default | d | 0.765 | |
USBC_X_USB_TOP_N | Default | d | 0.765 | |
USBC_X_USB_TOP_P | Default | d | 0.765 | |
USB_FIXT1_N | Default | d | 0.424 | |
USB_FIXT1_P | Default | d | 0.425 | |
USB_FIXT2_N | Default | d | 0.426 | |
USB_FIXT2_P | Default | d | 0.425 | |
USB_SOC_N | Default | d | 0.718 | |
USB_SOC_P | Default | d | 0.717 | |
USB_UPC_1_N_R | Default | d | 0.432 | |
USB_UPC_1_N_T | Default | d | 0.566 | |
USB_UPC_1_N_W | Default | d | 0.429 | |
USB_UPC_1_N_X | Default | d | 0.569 | |
USB_UPC_1_P_R | Default | d | 0.431 | |
USB_UPC_1_P_T | Default | d | 0.559 | |
USB_UPC_1_P_W | Default | d | 0.431 | |
USB_UPC_1_P_X | Default | d | 0.560 | |
USB_UPC_X2_N | Default | d | 0.718 | |
USB_UPC_X2_P | Default | d | 0.712 | |
UVP_DIS_L | Default | d | 0.571 | |
VCCINAUX1_AGND | Default | d | 0.000 | |
VCCINAUX1_BOOT_RC | Default | d | 0.609 | |
VCCINAUX1_DRVH | Default | d | 1.000 | |
VCCINAUX1_DRVH_R | Default | d | 1.000 | |
VCCINAUX1_DRVL | Default | d | 0.662 | |
VCCINAUX1_DRVL_R | Default | d | 0.662 | |
VCCINAUX1_EN_R | Default | d | 0.453 | |
VCCINAUX1_FSEL | Default | d | 0.759 | |
VCCINAUX1_LL | Default | d | 0.380 | |
VCCINAUX1_LL_SNUB | Default | d | 0.380 | |
VCCINAUX1_OCSET | Default | d | 0.607 | |
VCCINAUX1_R | Default | d | 0.380 | |
VCCINAUX1_RTN_DIV_R | Default | d | 0.004 | |
VCCINAUX1_RTN_DIV_XW | Default | d | 0.003 | |
VCCINAUX1_SENSE_DIV | Default | d | 0.383 | |
VCCINAUX1_SENSE_DIV_R | Default | d | 0.763 | |
VCCINAUX1_SENSE_DIV_XW | Default | d | 0.431 | |
VCCINAUX1_SET0 | Default | d | 0.779 | |
VCCINAUX1_SET1 | Default | d | 0.769 | |
VCCINAUX1_SET1_R | Default | d | OL | |
VCCINAUX1_SREF | Default | d | 0.775 | |
VCCINAUX1_VBST | Default | d | 0.605 | |
VCCINAUX1_VID0 | Default | d | 0.537 | |
VCCINAUX1_VID1 | Default | d | 0.536 | |
VCCINAUX1_VO | Default | d | 0.607 | |
VCCINAUX_PROG1 | Default | d | OL | |
VCCINAUX_PROG2 | Default | d | OL | |
VCCIN_AUX_PGOOD | Default | d | 0.676 | |
VCCST_EN_B | Default | d | 0.593 | |
VCCST_EN_C | Default | d | 0.594 | |
VCCST_PWRGD_R | Default | d | 0.624 | |
WC_L | Default | d | 0.708 | |
WIFI_SROM_ORG | Default | d | 0.699 | |
WLAN_AUDIO_SYNC | Default | d | 0.506 | |
WLAN_AUDIO_SYNC_R | Default | d | 0.480 | |
WLAN_CONTEXT_A | Default | d | 0.628 | |
WLAN_CONTEXT_B | Default | d | 0.737 | |
WLAN_JTAG_SEL | Default | d | 0.725 | |
WLAN_JTAG_TCK | Default | d | 0.742 | |
WLAN_JTAG_TDI | Default | d | 0.475 | |
WLAN_JTAG_TDO | Default | d | 0.739 | |
WLAN_JTAG_TMS | Default | d | 0.742 | |
WLAN_JTAG_TRST_L | Default | d | 0.737 | |
WLAN_PWR_EN | Default | d | 0.481 | |
WLAN_SROM_STRAP | Default | d | 0.727 | |
XDP_CPU_PWRBTN_L | Default | d | 0.752 | |
XDP_CPU_TCK | Default | d | 0.050 | |
XDP_CPU_TDI | Default | d | 0.155 | |
XDP_CPU_TDO | Default | d | 0.141 | |
XDP_CPU_TMS | Default | d | 0.154 | |
XDP_CPU_TRST_L | Default | d | 0.234 | |
XDP_HOOK2 | Default | d | 0.214 | |
XDP_HOOK3 | Default | d | 0.868 | |
XDP_PCH_TMS | Default | d | 0.156 | |
XDP_PCH_TRST_L | Default | d | 0.235 | |
XDP_PM_RSMRST_L | Default | d | 1.674 | |
XDP_PRESENT2_L | Default | d | 0.800 | |
XDP_PRESENT_CPU_L | Default | d | 0.802 | |
XDP_PRESENT_L | Default | d | 0.464 | |
XDP_USB_EXTC_OC_L | Default | d | 0.796 | |
ZQ<0>_1 | Default | d | 0.369 | |
ZQ<0>_2 | Default | d | 0.370 | |
ZQ<0>_3 | Default | d | 0.372 | |
ZQ<0>_4 | Default | d | 0.373 | |
ZQ<1>_1 | Default | d | 0.368 | |
ZQ<1>_2 | Default | d | 0.370 | |
ZQ<1>_3 | Default | d | 0.371 | |
ZQ<1>_4 | Default | d | 0.371 |
Component | Type | Value |
---|---|---|
C0741 | s | - |
C1057 | s | - |
C1059 | s | - |
C10C7 | s | - |
C1268 | s | - |
C1270 | s | - |
C1272 | s | - |
C1274 | s | - |
C1950 | s | - |
C2842_R | s | - |
C2842_T | s | - |
C2842_X | s | - |
C5104 | s | - |
C5420 | s | - |
C5429 | s | - |
C5450 | s | - |
C5459 | s | - |
C54A0 | s | - |
C54A9 | s | - |
C54B0 | s | - |
C5510 | s | - |
C5530 | s | - |
C5580 | s | - |
C5589 | s | - |
C5609 | s | - |
C5620 | s | - |
C5630 | s | - |
C5639 | s | - |
C5640 | s | - |
C5700 | s | - |
C5701 | s | - |
C5702 | s | - |
C5703 | s | - |
C5705 | s | - |
C5706 | s | - |
C5729 | s | - |
C5730 | s | - |
C5739 | s | - |
C5760 | s | - |
C5780 | s | - |
C5900 | s | - |
C5909 | s | - |
C5960 | s | - |
C6351 | s | - |
C6352 | s | - |
C6413 | s | - |
C6414 | s | - |
C6463 | s | - |
C6464 | s | - |
C6513 | s | - |
C6514 | s | - |
C6563 | s | - |
C6564 | s | - |
C6702 | s | - |
C7016 | s | - |
C7071 | s | - |
C7145 | s | - |
C7238 | s | - |
C7415 | s | - |
C7417 | s | - |
C7426 | s | - |
C7432 | s | - |
C7440 | s | - |
C7640 | s | - |
C7641 | s | - |
C7715 | s | - |
C7860 | s | - |
C7861 | s | - |
C7862 | s | - |
C7863 | s | - |
C7864 | s | - |
C7865 | s | - |
C7869 | s | - |
C7870 | s | - |
C7871 | s | - |
C7874 | s | - |
C7875 | s | - |
C7876 | s | - |
C7878 | s | - |
C7879 | s | - |
C7880 | s | - |
C7882 | s | - |
C7883 | s | - |
C7884 | s | - |
C7885 | s | - |
C7886 | s | - |
C7887 | s | - |
C7889 | s | - |
C7898 | s | - |
C7899 | s | - |
C8051 | s | - |
C8110 | s | - |
C8208 | s | - |
C8401 | s | - |
C8430 | s | - |
C8442 | s | - |
C8651 | s | - |
C8681 | s | - |
C8682 | s | - |
C8781 | s | - |
C8782 | s | - |
C8785 | s | - |
C8881 | s | - |
C8882 | s | - |
C8885 | s | - |
C8981 | s | - |
C8982 | s | - |
C8985 | s | - |
CC766 | s | - |
CC831 | s | - |
CC832 | s | - |
CE007 | s | - |
D5530 | s | - |
DE001 | s | - |
J2001 | s | - |
L1250 | s | - |
L7820 | s | - |
L7822 | s | - |
Q5530 | s | - |
Q5531 | s | - |
QE000 | s | - |
QE001 | s | - |
R0801 | s | - |
R0850 | s | - |
R0853 | s | - |
R1840 | s | - |
R1952 | s | - |
R1953 | s | - |
R2060 | s | - |
R2061 | s | - |
R2062 | s | - |
R2063 | M | n |
R2063 | s | - |
R2065 | s | - |
R3051 | s | - |
R3053 | s | - |
R3410_SXT | s | - |
R3412_SXT | s | - |
R3413_SXT | s | - |
R3415_SXT | s | - |
R3417_SWR | s | - |
R3417_SXT | s | - |
R3442_SXT | s | - |
R3513_VWR | s | - |
R3513_VXT | s | - |
R3540_VWR | s | - |
R3641 | s | - |
R3642 | s | - |
R3651 | s | - |
R3652 | s | - |
R4700 | s | - |
R4702 | s | - |
R4710 | s | - |
R4720 | s | - |
R4820 | s | - |
R4866 | s | n |
R5420 | s | - |
R5425 | s | - |
R5429 | s | - |
R5455 | s | - |
R5459 | s | - |
R5483 | s | - |
R54A0 | s | - |
R54A5 | s | - |
R54A9 | s | - |
R54B0 | s | - |
R54B5 | s | - |
R54B9 | s | - |
R5510 | s | - |
R5519 | s | - |
R5520 | s | - |
R5530 | s | - |
R5531 | s | - |
R5532 | s | - |
R5533 | s | - |
R5534 | s | - |
R5535 | s | - |
R5536 | s | - |
R5539 | s | - |
R5549 | s | - |
R5580 | s | - |
R5589 | s | - |
R5610 | s | - |
R5629 | s | - |
R5639 | s | - |
R5640 | s | - |
R5645 | s | - |
R5649 | s | - |
R5650 | s | - |
R5670 | s | - |
R5690 | s | - |
R5700 | s | - |
R5720 | s | - |
R5729 | s | - |
R5730 | s | - |
R5735 | s | - |
R5739 | s | - |
R5760 | s | - |
R5769 | s | - |
R5780 | s | - |
R5789 | s | - |
R5900 | s | - |
R5905 | s | - |
R5909 | s | - |
R5940 | s | - |
R5960 | s | - |
R5965 | s | - |
R5969 | s | - |
R6051 | s | - |
R6309 | s | - |
R6310 | s | - |
R6350 | s | - |
R6400 | s | - |
R6480 | s | - |
R6482 | s | - |
R6490 | s | - |
R6582 | s | - |
R6872 | s | - |
R6950 | s | - |
R7113 | s | - |
R7115 | s | - |
R7146 | s | - |
R7148 | s | - |
R7162 | s | - |
R7238 | s | - |
R7402 | s | - |
R7404 | s | - |
R7480 | s | - |
R7484 | s | - |
R7650 | s | - |
R7671 | s | - |
R7676 | s | - |
R7696 | s | - |
R7716 | s | - |
R8007 | s | - |
R8018 | s | - |
R8110 | s | - |
R8156 | s | - |
R8203 | s | - |
R8212 | s | - |
R8300_SXT | s | - |
R8306_SXT | s | - |
R8308_SXT | s | - |
R8320_SXT | s | - |
R8321_SXT | s | n |
R8326_SXT | s | - |
R8328_SXT | s | - |
R8502 | s | - |
R8503 | s | - |
R8520 | s | - |
R8630 | s | - |
R8680 | s | - |
R8681 | s | - |
R8682 | s | - |
R8706 | s | n |
R8730 | s | - |
R8780 | s | - |
R8781 | s | - |
R8782 | s | - |
R8830 | s | - |
R8880 | s | - |
R8881 | s | - |
R8882 | s | - |
R8930 | s | - |
R8980 | s | - |
R8981 | s | - |
R8982 | s | - |
R9016 | s | - |
R9048 | s | - |
R9049 | s | - |
R9050 | s | - |
R9652 | s | - |
R9653 | s | - |
R9654 | s | - |
RB141 | s | - |
RB143 | s | - |
RB145 | s | - |
RB151 | s | - |
RB244 | s | - |
RB256 | s | - |
RE015 | s | - |
RE016 | s | - |
RE017 | s | - |
RE018 | s | - |
RE019 | s | - |
RE020 | s | - |
RE021 | s | - |
RE022 | s | - |
RE023 | s | - |
RE024 | s | - |
RE025 | s | - |
RE026 | s | - |
RE027 | s | - |
RE029 | s | - |
RE031 | s | - |
RE032 | s | - |
SC401 | s | - |
U5420 | s | - |
U5450 | s | - |
U54A0 | s | - |
U54B0 | s | - |
U5510 | s | - |
U5530 | s | - |
U5580 | s | - |
U5620 | s | - |
U5630 | s | - |
U5640 | s | - |
U5700 | s | - |
U5720 | s | - |
U5730 | s | - |
U5760 | s | - |
U5780 | s | - |
U5900 | s | - |
U5960 | s | - |
U8208 | s | - |
U9001 | s | - |
UE020 | s | - |