Netname | Condition | Type | Value | Comment |
ACT_GND | Default | d | - | |
AGND_P2V5_NAND0 | Default | d | 0.000 | |
AGND_P5VUSBC23 | Default | d | 0.000 | |
AIRFLOW_L_THMSNS | Default | d | 0.780 | |
AIRFLOW_R_THMSNS | Default | d | 0.776 | |
ALS_INT_L | Default | d | 0.313 | |
AOP_HDMI_CEC_R | Default | d | 0.316 | |
ATCRTMR0_FLASH_MSTR | Default | d | 0.605 | |
ATCRTMR0_FORCE_PWR | Default | d | 0.456 | |
ATCRTMR0_GPIO_5 | Default | d | 0.607 | |
ATCRTMR0_RESET_1V8_L | Default | d | 0.470 | |
ATCRTMR0_RESET_L | Default | d | 0.656 | |
ATCRTMR0_RESET_MUX_1V8_L | Default | d | 0.470 | |
ATCRTMR0_TEST_PWR_GOOD | Default | d | 0.101 | |
ATCRTMR0_THERM_D_N | Default | d | 0.000 | |
ATCRTMR0_THERM_D_P | Default | d | 0.853 | |
ATCRTMR0_XTAL25M_IN_R | Default | d | 0.834 | |
ATCRTMR0_XTAL25M_OUT_R | Default | d | 0.788 | |
ATCRTMR1_FLASH_SLV_L | Default | d | 0.590 | |
ATCRTMR1_FORCE_PWR | Default | d | 0.533 | |
ATCRTMR1_GPIO_5 | Default | d | 0.610 | |
ATCRTMR1_TEST_PWR_GOOD | Default | d | 0.100 | |
ATCRTMR1_XTAL25M_IN | Default | d | 0.834 | |
ATCRTMR1_XTAL25M_IN_R | Default | d | 0.833 | |
ATCRTMR1_XTAL25M_OUT | Default | d | 0.792 | |
ATCRTMR1_XTAL25M_OUT_R | Default | d | 0.793 | |
ATCRTMR23_FLASH_MSTR | Default | d | 0.600 | |
ATCRTMR2_FORCE_PWR | Default | d | 0.586 | |
ATCRTMR2_GPIO_5 | Default | d | 0.603 | |
ATCRTMR2_RBIAS | Default | d | 0.774 | |
ATCRTMR2_RSENSE | Default | d | 0.000 | |
ATCRTMR2_TEST_PWR_GOOD | Default | d | 0.100 | |
ATCRTMR2_THERM_D_N | Default | d | 0.000 | |
ATCRTMR2_THERM_D_P | Default | d | 0.851 | |
ATCRTMR2_XTAL25M_IN | Default | d | 0.833 | |
ATCRTMR2_XTAL25M_IN_R | Default | d | 0.833 | |
ATCRTMR2_XTAL25M_OUT | Default | d | 0.789 | |
ATCRTMR2_XTAL25M_OUT_R | Default | d | 0.789 | |
ATCRTMR_ACTIVE_READY_3V3 | Default | d | 0.450 | |
AUDIO_JACK_CH_GND | Default | d | 0.001 | |
AUDIO_JACK_CH_MIC | Default | d | 0.637 | |
AUDIO_JACK_GB_GND | Default | d | 0.001 | |
AUDIO_JACK_GB_MIC | Default | d | 0.637 | |
AUDIO_JACK_LEFT_OUT | Default | d | 0.800 | |
AUDIO_JACK_LEFT_SNS | Default | d | 1.159 | |
AUDIO_JACK_RIGHT_OUT | Default | d | - | |
AUDIO_JACK_RIGHT_SNS | Default | d | 1.828 | |
AUDIO_JACK_RING_SNS | Default | d | 0.640 | |
AUDIO_JACK_TIP_SNS | Default | d | 1.760 | |
AUD_CONN_HP_LEFT | Default | d | 0.800 | |
AUD_CONN_HP_RIGHT | Default | d | 0.800 | |
AUD_CONN_HP_SENSE_L | Default | d | 1.159 | |
AUD_CONN_HP_SENSE_R | Default | d | 1.828 | |
AUD_CONN_RING2 | Default | d | 0.001 | |
AUD_CONN_RING2_XW | Default | d | 0.637 | |
AUD_CONN_RING_SENSE | Default | d | OL | |
AUD_CONN_SLEEVE | Default | d | 0.001 | |
AUD_CONN_SLEEVE_XW | Default | d | 0.637 | |
AUD_CONN_TIP_SENSE | Default | d | OL | |
AUD_DMIC0_CLK_CONN | Default | d | 0.491 | |
AUD_DMIC0_DATA_CONN | Default | d | 0.761 | |
AUD_DMIC1_CLK_CONN | Default | d | 0.488 | |
AUD_DMIC1_DATA_CONN | Default | d | 0.760 | |
BKLT_BOOST_THROTTLE_CONN_L | Default | d | 0.625 | |
BKLT_BOOST_THROTTLE_L | Default | d | 0.315 | |
BKLT_BOOST_THROTTLE_LUXE_L | Default | d | 0.625 | |
BKLT_BOOST_THROTTLE_R_L | Default | d | 0.628 | |
BKLT_HS_IOUT | Default | d | 0.723 | |
BKLT_HS_ISENSE | Default | d | 0.750 | |
BL_PMIC_PWR_EN | Default | d | 0.760 | |
BL_PWR_EN | Default | d | 0.407 | |
BL_PWR_EN_R | Default | d | 0.407 | |
BMON_ISENSE | Default | d | 0.730 | |
BOARD_ID0 | Default | d | 0.315 | |
BOARD_ID1 | Default | d | 0.313 | |
BOARD_ID2 | Default | d | 0.315 | |
BOARD_ID4 | Default | d | 0.312 | |
BOARD_REV2 | Default | d | 0.303 | |
BOARD_REV3 | Default | d | 0.970 | |
BT_LHL_GPIO2 | Default | d | 0.612 | |
CAPSLOCK_LED_EN | Default | d | 0.574 | |
CEC_FLT | Default | d | 0.545 | |
CEC_FLT_PULL | Default | d | 0.596 | |
CEC_FLT_R | Default | d | 0.553 | |
CEC_PFET_GATE_R | Default | d | OL | |
CHGR_AMON | Default | d | 0.633 | |
CHGR_AUX_DET | Default | d | 0.554 | |
CHGR_AUX_DET_3V3 | Default | d | 0.590 | |
CHGR_AUX_OK | Default | d | 0.631 | |
CHGR_BGATE | Default | d | 0.636 | |
CHGR_BMON | Default | d | 0.633 | |
CHGR_BOOT1 | Default | d | 0.582 | |
CHGR_BOOT1_RC | Default | d | 0.589 | |
CHGR_BOOT2 | Default | d | 0.578 | |
CHGR_BOOT2_RC | Default | d | 0.584 | |
CHGR_COMP | Default | d | 0.627 | |
CHGR_CSI_FILT_N | Default | d | 0.470 | |
CHGR_CSI_FILT_P | Default | d | 0.452 | |
CHGR_CSI_N | Default | d | 0.542 | |
CHGR_CSI_P | Default | d | 0.542 | |
CHGR_CSO_FILT_N | Default | d | 0.475 | |
CHGR_CSO_FILT_P | Default | d | 0.475 | |
CHGR_CSO_N | Default | d | 0.480 | |
CHGR_CSO_P | Default | d | 0.480 | |
CHGR_GATE_Q1 | Default | d | 0.547 | |
CHGR_GATE_Q2 | Default | d | 0.470 | |
CHGR_GATE_Q3 | Default | d | 0.470 | |
CHGR_GATE_Q4 | Default | d | 0.941 | |
CHGR_INT_1V8_L | Default | d | 0.619 | |
CHGR_LX1 | Default | d | 0.460 | |
CHGR_LX2 | Default | d | 0.460 | |
CHGR_PHASE1 | Default | d | 0.476 | |
CHGR_PHASE1 | Default | v | 12.000 | |
CHGR_PHASE2 | Default | d | 0.476 | |
CHGR_PHASE2 | Default | v | 12.000 | |
CHGR_RST_IN | Default | d | 0.545 | |
CHGR_THMSNS | Default | d | 0.772 | |
CHGR_VBAT | Default | d | 0.634 | |
CHGR_VBAT_XW | Default | d | 1.578 | |
CIO_ATC0_LSRX_1V2 | Default | d | 0.319 | |
CIO_ATC0_LSRX_3V3 | Default | d | 0.718 | |
CIO_ATC0_LSTX_1V2 | Default | d | 0.316 | |
CIO_ATC0_LSTX_3V3 | Default | d | 0.453 | |
CIO_ATC1_LSRX_1V2 | Default | d | 0.317 | |
CIO_ATC1_LSRX_3V3 | Default | d | 0.718 | |
CIO_ATC1_LSTX_1V2 | Default | d | 0.314 | |
CIO_ATC1_LSTX_3V3 | Default | d | 0.455 | |
CIO_ATC2_LSRX_1V2 | Default | d | 0.314 | |
CIO_ATC2_LSRX_3V3 | Default | d | 0.716 | |
CIO_ATC2_LSTX_1V2 | Default | d | 0.313 | |
CIO_ATC2_LSTX_3V3 | Default | d | 0.454 | |
CLVR_FABRIC_ILIMIT_THROTTLE | Default | d | 0.313 | |
CLVR_FABRIC_ILIMIT_THROTTLE_L | Default | d | 0.313 | |
CLVR_RESET_L | Default | d | 0.455 | |
CLVR_VDDH_UVWARN_L | Default | d | 0.314 | |
CODEC_AGND | Default | d | 0.000 | |
CODEC_CH_MIC | Default | d | 0.738 | |
CODEC_CP_LDO_FILT | Default | d | 0.600 | |
CODEC_FLY1N | Default | d | 0.400 | |
CODEC_FLY1P | Default | d | 0.673 | |
CODEC_FLY2N | Default | d | 1.422 | |
CODEC_FLY2P | Default | d | 0.377 | |
CODEC_GB_MIC | Default | d | 0.737 | |
CODEC_HSBIAS_FILT | Default | d | 0.706 | |
CODEC_HSBIAS_FILT_REF | Default | d | 0.633 | |
CODEC_INT_L | Default | d | 0.317 | |
CODEC_RESET_L | Default | d | 0.314 | |
CODEC_VCP_FILTN | Default | d | 1.050 | |
CODEC_VCP_FILTP | Default | d | 0.550 | |
CODEC_VCP_FILT_GND | Default | d | 0.000 | |
CODEC_WAKE_L | Default | d | 0.705 | |
DDR00_01_02_03_ZQ | Default | d | 0.297 | |
DDR00_01_RREF | Default | d | 0.185 | |
DDR02_03_RREF | Default | d | 0.186 | |
DDR06_07_RREF | Default | d | 0.185 | |
DDR08_09_10_11_ZQ | Default | d | 0.290 | |
DDR08_09_RREF | Default | d | 0.184 | |
DDR10_11_RREF | Default | d | 0.185 | |
DDR12_13_14_15_ZQ | Default | d | 0.296 | |
DDR12_13_RREF | Default | d | 0.185 | |
DDR14_15_RREF | Default | d | 0.185 | |
DEBUG_SPMU_GPIO16 | Default | d | 0.755 | |
DISP_2DBL_FSYNC | Default | d | 0.316 | |
DISP_BKLT_LSYNC | Default | d | 0.314 | |
DMIC_CLK0_1V8_OUT_R | Default | d | 0.452 | |
DMIC_CLK1_1V8_OUT_R | Default | d | 0.451 | |
DP2HDMI_1.5G_FILT_EN | Default | d | 0.593 | |
DP2HDMI_PWR_EN | Default | d | 0.512 | |
DP2HDMI_PWR_EN_PMU | Default | d | 0.573 | |
DP2HDMI_PWR_EN_R | Default | d | 0.512 | |
DPRX_AUX_N | Default | d | 0.556 | |
DPRX_AUX_P | Default | d | 0.560 | |
DPRX_INT_HPD | Default | d | 0.314 | |
DPRX_INT_HPD_1V8 | Default | d | 0.650 | |
EDP_PANEL_1V8_EN | Default | d | 0.670 | |
EDP_PANEL_DISCHARGE | Default | d | 0.681 | |
EDP_PANEL_PWR_EN | Default | d | 0.542 | |
EUSB_ATC0_N | Default | d | 0.327 | |
EUSB_ATC0_P | Default | d | 0.326 | |
EUSB_ATC2_N | Default | d | 0.328 | |
EUSB_ATC2_P | Default | d | 0.327 | |
EUSB_DBG_N | Default | d | 0.327 | |
EUSB_DBG_P | Default | d | 0.327 | |
EUSB_VBUS_DETECT | Default | d | 0.252 | |
FAN_0_PWM_5V | Default | d | 0.730 | |
FAN_0_TACH | Default | d | 0.336 | |
FAN_1_PWM_5V | Default | d | 0.734 | |
FAN_1_TACH | Default | d | 0.333 | |
FB_BLKT_2D | Default | d | 0.716 | |
FINSTACK_L_THMSNS | Default | d | 0.775 | |
FINSTACK_R_THMSNS | Default | d | 0.772 | |
FLASH_BUSY_USBC01_L | Default | d | 0.659 | |
FLASH_BUSY_USBC23_L | Default | d | 0.594 | |
FTCAM_ENABLE_1V8_OUT | Default | d | 0.458 | |
FTCAM_RESET_1V8_R_L | Default | d | 0.456 | |
FTCAM_RESET_L | Default | d | 0.313 | |
GYRO_INT_1V8 | Default | d | 0.717 | |
GYRO_MOTION_INT_1V8 | Default | d | 0.715 | |
HDMI_5V_FAULT | Default | d | 0.721 | |
HDMI_5V_ISET | Default | d | 0.735 | |
HDMI_5V_ON | Default | d | 0.715 | |
HDMI_AOP_CEC_R | Default | d | 0.407 | |
HDMI_AOP_HPD_R | Default | d | 0.412 | |
HDMI_CEC | Default | d | 0.699 | |
HDMI_CECFET_EN | Default | d | 0.760 | |
HDMI_CECFET_EN_Q | Default | d | 0.492 | |
HDMI_CEC_AOP_RX | Default | d | 0.317 | |
HDMI_CEC_AOP_TX | Default | d | 0.316 | |
HDMI_CEC_CONN | Default | d | 0.546 | |
HDMI_CEC_PULL | Default | d | 0.480 | |
HDMI_DDC_5V_CONN_SCL | Default | d | 0.694 | |
HDMI_DDC_5V_CONN_SDA | Default | d | 0.697 | |
HDMI_DDC_5V_FLT_SCL | Default | d | 0.693 | |
HDMI_DDC_5V_FLT_SDA | Default | d | 0.697 | |
HDMI_DDC_5V_SCL | Default | d | 0.663 | |
HDMI_DDC_5V_SDA | Default | d | 0.665 | |
HDMI_HPD_AOP | Default | d | 0.315 | |
HDMI_HPD_IN | Default | d | 0.625 | |
HDMI_HPD_IN_CONN | Default | d | 0.702 | |
HDMI_HPD_IN_FLT | Default | d | 0.700 | |
HDMI_PIND_VBIAS | Default | d | OL | |
HDMI_PWR_EN | Default | d | 0.716 | |
HDMI_RESET_R_L | Default | d | 0.515 | |
HDMI_RSVD | Default | d | 0.000 | |
I2C_ALS_1V8_SCL | Default | d | 0.567 | |
I2C_ALS_1V8_SDA | Default | d | 0.565 | |
I2C_AOP_CAM_SCL | Default | d | 0.314 | |
I2C_AOP_CAM_SDA | Default | d | 0.310 | |
I2C_CAM_1V8_SCL | Default | d | 0.570 | |
I2C_CAM_1V8_SDA | Default | d | 0.569 | |
I2C_CAM_SCL | Default | d | 0.314 | |
I2C_CAM_SDA | Default | d | 0.313 | |
I2C_CODEC_SCL | Default | d | 0.317 | |
I2C_CODEC_SDA | Default | d | 0.314 | |
I2C_KBD_SCL | Default | d | 0.720 | |
I2C_KBD_SDA | Default | d | 0.691 | |
I2C_LUXE_DEBUG_SCL | Default | d | 0.410 | |
I2C_LUXE_DEBUG_SDA | Default | d | 0.410 | |
I2C_NAND_PMIC_SCL_1V8 | Default | d | 0.540 | |
I2C_NAND_PMIC_SDA_1V8 | Default | d | 0.540 | |
I2C_SEEPROM_SCL | Default | d | 0.312 | |
I2C_SEEPROM_SDA | Default | d | 0.314 | |
I2C_SMC_IPD_1V85_SCL | Default | d | 0.569 | |
I2C_SMC_IPD_1V85_SDA | Default | d | 0.570 | |
I2C_SMC_IPD_SCL | Default | d | 0.308 | |
I2C_SMC_IPD_SDA | Default | d | 0.309 | |
I2C_SMC_NAND_SCL | Default | d | 0.309 | |
I2C_SMC_NAND_SDA | Default | d | 0.311 | |
I2C_SMC_PWR_1V8_SCL | Default | d | 0.533 | |
I2C_SMC_PWR_1V8_SDA | Default | d | 0.532 | |
I2C_SMC_PWR_SCL | Default | d | 0.310 | |
I2C_SMC_PWR_SDA | Default | d | 0.314 | |
I2C_SMC_SNS0_SCL | Default | d | 0.311 | |
I2C_SMC_SNS0_SCL_1V8 | Default | d | 0.568 | |
I2C_SMC_SNS0_SDA | Default | d | 0.308 | |
I2C_SMC_SNS0_SDA_1V8 | Default | d | 0.569 | |
I2C_SMC_UPC_SCL | Default | d | 0.317 | |
I2C_SMC_UPC_SDA | Default | d | 0.314 | |
I2C_SPKRAMP_L_SCL | Default | d | 0.318 | |
I2C_SPKRAMP_L_SDA | Default | d | 0.316 | |
I2C_SPKRAMP_R_SCL | Default | d | 0.315 | |
I2C_SPKRAMP_R_SDA | Default | d | 0.314 | |
I2C_TCON_BKLT_SCL | Default | d | 0.311 | |
I2C_TCON_BKLT_SCL_1V8 | Default | d | 0.563 | |
I2C_TCON_BKLT_SDA | Default | d | 0.308 | |
I2C_TCON_BKLT_SDA_1V8 | Default | d | 0.562 | |
I2C_UPC01_3V3_SCL | Default | d | OL | |
I2C_UPC01_3V3_SDA | Default | d | OL | |
I2C_UPC0_ATCRTMR0_SCL | Default | d | 0.540 | |
I2C_UPC0_ATCRTMR0_SCL_1V8 | Default | d | 0.455 | |
I2C_UPC0_ATCRTMR0_SDA | Default | d | 0.525 | |
I2C_UPC0_ATCRTMR0_SDA_1V8 | Default | d | 0.455 | |
I2C_UPC1_ATCRTMR1_SCL | Default | d | 0.550 | |
I2C_UPC1_ATCRTMR1_SCL_1V8 | Default | d | 0.455 | |
I2C_UPC1_ATCRTMR1_SDA | Default | d | 0.550 | |
I2C_UPC1_ATCRTMR1_SDA_1V8 | Default | d | 0.456 | |
I2C_UPC23_3V3_SCL | Default | d | OL | |
I2C_UPC23_3V3_SDA | Default | d | OL | |
I2C_UPC2_ATCRTMR2_SCL | Default | d | 0.543 | |
I2C_UPC2_ATCRTMR2_SCL_1V8 | Default | d | 0.459 | |
I2C_UPC2_ATCRTMR2_SDA | Default | d | 0.509 | |
I2C_UPC2_ATCRTMR2_SDA_1V8 | Default | d | 0.458 | |
I2C_UPC5_SCL | Default | d | 0.588 | |
I2C_UPC5_SDA | Default | d | 0.587 | |
I2C_UPC_SCL | Default | d | 0.315 | |
I2C_UPC_SDA | Default | d | 0.318 | |
INT_I2C_ATCRTMR0_L | Default | d | 0.540 | |
INT_I2C_ATCRTMR1_L | Default | d | 0.547 | |
INT_I2C_ATCRTMR2_L | Default | d | 0.585 | |
INT_I2C_EUSBLS0_1V8_L | Default | d | 0.450 | |
INT_I2C_EUSBLS0_L | Default | d | 0.540 | |
INT_I2C_EUSBLS1_1V8_L | Default | d | 0.446 | |
INT_I2C_EUSBLS1_L | Default | d | 0.547 | |
INT_I2C_EUSBLS2_1V8_L | Default | d | 0.459 | |
INT_I2C_EUSBLS2_L | Default | d | 0.586 | |
INT_I2C_UPC0_ATCRTMR0_L | Default | d | 0.540 | |
INT_I2C_UPC1_ATCRTMR1_L | Default | d | 0.547 | |
INT_I2C_UPC2_ATCRTMR2_L | Default | d | 0.523 | |
IOXP1_INT_L | Default | d | 0.644 | |
IOXP1_RESET_L | Default | d | 0.743 | |
IOXP2_ADDR | Default | d | 0.726 | |
IOXP2_INT_L | Default | d | 0.650 | |
IOXP2_RESET_L | Default | d | 0.744 | |
IOXP_I2C_SCL | Default | d | 0.696 | |
IOXP_I2C_SDA | Default | d | 0.667 | |
IPD_LID_OPEN_1V8 | Default | d | 0.752 | |
IPD_LID_OPEN_R_1V8 | Default | d | 0.718 | |
IPD_P3V3_PWR_EN_RC | Default | d | 0.571 | |
IPD_PWR_EN | Default | d | 0.676 | |
IPD_PWR_EN_D | Default | d | 0.960 | |
IPD_PWR_EN_PMU | Default | d | 0.697 | |
IPD_PWR_EN_RC | Default | d | 0.585 | |
IPD_PWR_FB | Default | d | 0.722 | |
IPD_PWR_HOLD | Default | d | 0.675 | |
IPD_SPI_EN | Default | d | 0.315 | |
IPD_SPI_INT_L | Default | d | 0.313 | |
IPD_SPI_INT_R_L | Default | d | 0.313 | |
IPD_WAKE_L | Default | d | 0.759 | |
ISNS_P3V8AON_HS_N | Default | d | 0.480 | |
ISNS_P3V8AON_HS_P | Default | d | 0.480 | |
ISNS_PBUS_AON_SPKRAMP_ABC_N | Default | d | 0.480 | |
ISNS_PBUS_AON_SPKRAMP_ABC_P | Default | d | 0.480 | |
ISNS_PP1V8_S2_HDMI_N | Default | d | OL | |
ISNS_PP1V8_S2_HDMI_P | Default | d | OL | |
ISNS_PP3V8_AON_MPMU_N | Default | d | 0.360 | |
ISNS_PP3V8_AON_MPMU_P | Default | d | 0.360 | |
ISNS_PP3V8_AON_SPMU_N | Default | d | 0.360 | |
ISNS_PP3V8_AON_SPMU_P | Default | d | 0.360 | |
ISNS_PP3V8_ATC01_LDO_N | Default | d | OL | |
ISNS_PP3V8_ATC01_LDO_P | Default | d | OL | |
ISNS_PPBUS_AON_LUXE_N | Default | d | 0.480 | |
ISNS_PPBUS_AON_LUXE_P | Default | d | 0.480 | |
ISNS_PPBUS_NAND0_N | Default | d | OL | |
ISNS_PPBUS_NAND0_P | Default | d | OL | |
ISNS_PPBUS_NAND1_N | Default | d | OL | |
ISNS_PPBUS_NAND1_P | Default | d | OL | |
ISNS_PPVIN_5VUSBC01_N | Default | d | 0.480 | |
ISNS_PPVIN_5VUSBC01_P | Default | d | 0.480 | |
ISNS_PPVIN_5VUSBC23_N | Default | d | 0.480 | |
ISNS_PPVIN_5VUSBC23_P | Default | d | 0.480 | |
ISNS_PPVIN_P1V8VDDH_N | Default | d | 0.480 | |
ISNS_PPVIN_P1V8VDDH_P | Default | d | 0.480 | |
ISNS_PPVIN_P3V3SD_N | Default | d | OL | |
ISNS_PPVIN_P3V3SD_P | Default | d | OL | |
ISNS_PPVIN_P3V8NAND0_N | Default | d | OL | |
ISNS_PPVIN_P3V8NAND0_P | Default | d | OL | |
ISNS_PPVIN_P5VS2TPS_N | Default | d | 0.480 | |
ISNS_PPVIN_P5VS2TPS_P | Default | d | 0.480 | |
JTAG_ATCRTMR01_TCK | Default | d | 0.573 | |
JTAG_ATCRTMR01_TDI | Default | d | 0.573 | |
JTAG_ATCRTMR01_TDO | Default | d | 0.572 | |
JTAG_ATCRTMR0_TMS | Default | d | 0.605 | |
JTAG_ATCRTMR1_TMS | Default | d | 0.614 | |
JTAG_ATCRTMR23_TCK | Default | d | 0.602 | |
JTAG_ATCRTMR23_TDI | Default | d | 0.604 | |
JTAG_ATCRTMR23_TDO | Default | d | 0.603 | |
JTAG_ATCRTMR2_TMS | Default | d | 0.603 | |
KBDBKLT_EN | Default | d | 0.566 | |
KBDBKLT_FB2 | Default | d | 0.591 | |
KBDBKLT_ISET_KEYB | Default | d | 0.680 | |
KBDBKLT_SENSE_OUT | Default | d | 0.730 | |
KBDBKLT_SW2 | Default | d | 0.392 | |
KBDBKLT_SW2 | Default | v | 5.100 | |
KBDLED_CATHODE1 | Default | d | 0.670 | |
KBDLED_CATHODE2 | Default | d | 0.664 | |
KBDLED_KEYB1 | Default | d | 0.661 | |
KBDLED_KEYB2 | Default | d | 0.655 | |
KBD_BKLT_PWM | Default | d | 0.314 | |
KBD_BKLT_PWM_3V3 | Default | d | 0.455 | |
KBD_BKLT_PWM_R | Default | d | 0.314 | |
KBD_CAP_CATHODE | Default | d | 0.496 | |
KBD_CONTROL_KEY | Default | d | 0.477 | |
KBD_CONTROL_L | Default | d | 0.468 | |
KBD_DRIVE_Y0 | Default | d | 0.598 | |
KBD_DRIVE_Y1 | Default | d | 0.593 | |
KBD_DRIVE_Y10 | Default | d | 0.598 | |
KBD_DRIVE_Y11 | Default | d | 0.604 | |
KBD_DRIVE_Y2 | Default | d | 0.595 | |
KBD_DRIVE_Y3 | Default | d | 0.603 | |
KBD_DRIVE_Y4 | Default | d | 0.598 | |
KBD_DRIVE_Y5 | Default | d | 0.599 | |
KBD_DRIVE_Y6 | Default | d | 0.533 | |
KBD_DRIVE_Y7 | Default | d | 0.529 | |
KBD_DRIVE_Y8 | Default | d | 0.531 | |
KBD_DRIVE_Y9 | Default | d | 0.537 | |
KBD_ID1 | Default | d | 0.787 | |
KBD_ID2 | Default | d | 0.787 | |
KBD_ID_DETECT1 | Default | d | 0.606 | |
KBD_ID_DETECT2 | Default | d | 0.602 | |
KBD_INT_L | Default | d | 0.684 | |
KBD_LED1 | Default | d | 0.497 | |
KBD_LEFT_OPTION_KEY | Default | d | 0.477 | |
KBD_LEFT_OPTION_L | Default | d | 0.468 | |
KBD_RIGHT_SHIFT_KEY | Default | d | 0.477 | |
KBD_RIGHT_SHIFT_L | Default | d | 0.466 | |
KBD_SENSE_X0 | Default | d | 0.613 | |
KBD_SENSE_X1 | Default | d | 0.606 | |
KBD_SENSE_X10 | Default | d | 0.609 | |
KBD_SENSE_X11 | Default | d | 0.607 | |
KBD_SENSE_X12 | Default | d | 0.608 | |
KBD_SENSE_X2 | Default | d | 0.609 | |
KBD_SENSE_X3 | Default | d | 0.612 | |
KBD_SENSE_X4 | Default | d | 0.609 | |
KBD_SENSE_X5 | Default | d | 0.607 | |
KBD_SENSE_X6 | Default | d | 0.547 | |
KBD_SENSE_X7 | Default | d | 0.543 | |
KBD_SENSE_X8 | Default | d | 0.540 | |
KBD_SENSE_X9 | Default | d | 0.548 | |
LED_CTRL | Default | d | 0.562 | |
LED_ISET | Default | d | 0.571 | |
LID_OPEN | Default | d | 0.311 | |
LPDP_FTCAM_AUX | Default | d | OL | |
LPDP_FTCAM_AUX_C | Default | d | 0.348 | |
LPDP_FTCAM_DATA_C_N<0> | Default | d | OL | |
LPDP_FTCAM_DATA_C_P<0> | Default | d | OL | |
LPDP_FTCAM_DATA_N<0> | Default | d | 0.411 | |
LPDP_FTCAM_DATA_P<0> | Default | d | 0.410 | |
LPDP_INT_AUX_C_N | Default | d | 0.350 | |
LPDP_INT_AUX_C_P | Default | d | 0.348 | |
LPDP_INT_AUX_L_N | Default | d | OL | |
LPDP_INT_AUX_L_P | Default | d | OL | |
LPDP_INT_AUX_N | Default | d | OL | |
LPDP_INT_AUX_P | Default | d | OL | |
LPDP_INT_DATA_C_N<0> | Default | d | 0.365 | |
LPDP_INT_DATA_C_N<1> | Default | d | 0.368 | |
LPDP_INT_DATA_C_N<2> | Default | d | 0.680 | |
LPDP_INT_DATA_C_N<3> | Default | d | 0.365 | |
LPDP_INT_DATA_C_P<0> | Default | d | 0.364 | |
LPDP_INT_DATA_C_P<1> | Default | d | 0.366 | |
LPDP_INT_DATA_C_P<2> | Default | d | 0.368 | |
LPDP_INT_DATA_C_P<3> | Default | d | 0.365 | |
LPDP_INT_DATA_L_N<0> | Default | d | OL | |
LPDP_INT_DATA_L_N<1> | Default | d | OL | |
LPDP_INT_DATA_L_N<2> | Default | d | OL | |
LPDP_INT_DATA_L_N<3> | Default | d | OL | |
LPDP_INT_DATA_L_P<0> | Default | d | OL | |
LPDP_INT_DATA_L_P<1> | Default | d | OL | |
LPDP_INT_DATA_L_P<2> | Default | d | OL | |
LPDP_INT_DATA_L_P<3> | Default | d | OL | |
LPDP_INT_DATA_N<0> | Default | d | OL | |
LPDP_INT_DATA_N<1> | Default | d | OL | |
LPDP_INT_DATA_N<2> | Default | d | OL | |
LPDP_INT_DATA_N<3> | Default | d | OL | |
LPDP_INT_DATA_P<0> | Default | d | OL | |
LPDP_INT_DATA_P<1> | Default | d | OL | |
LPDP_INT_DATA_P<2> | Default | d | OL | |
LPDP_INT_DATA_P<3> | Default | d | OL | |
LPDP_INT_HPD | Default | d | 0.316 | |
LUXE_AGND | Default | d | 0.000 | |
LUXE_BT_C1 | Default | d | 0.588 | |
LUXE_BT_C2 | Default | d | 0.588 | |
LUXE_BYP | Default | d | 0.613 | |
LUXE_COMP | Default | d | 0.612 | |
LUXE_COMP_R | Default | d | OL | |
LUXE_C_VDD | Default | d | 0.500 | |
LUXE_FAULT | Default | d | 0.628 | |
LUXE_ISH_N | Default | d | 0.480 | |
LUXE_ISH_P | Default | d | 0.480 | |
LUXE_ISH_R_N | Default | d | 0.479 | |
LUXE_ISH_R_P | Default | d | 0.481 | |
LUXE_ISL_N | Default | d | 0.000 | |
LUXE_ISL_P | Default | d | 0.000 | |
LUXE_ISL_R_N | Default | d | 0.000 | |
LUXE_ISL_R_P | Default | d | 0.000 | |
LUXE_LG1 | Default | d | 0.461 | |
LUXE_LG1_R | Default | d | 0.464 | |
LUXE_LG2 | Default | d | 0.460 | |
LUXE_LG2_R | Default | d | 0.460 | |
LUXE_TEST | Default | d | 0.621 | |
LUXE_UG1 | Default | d | 0.570 | |
LUXE_UG1_R | Default | d | 0.788 | |
LUXE_UG2 | Default | d | 0.790 | |
LUXE_UG2_R | Default | d | 0.800 | |
LUXE_VPROG_TEST | Default | d | 0.000 | |
MGL_1V8 | Default | d | 0.732 | |
MPMU_3V8_IOUT | Default | d | 0.720 | |
MPMU_3V8_ISENSE | Default | d | 0.782 | |
MPMU_BUCK0_FB | Default | d | 0.153 | |
MPMU_BUCK0_FB_R | Default | d | 0.153 | |
MPMU_BUCK0_LX0 | Default | d | 0.205 | |
MPMU_BUCK0_LX0 | Default | r | 72.000R | |
MPMU_BUCK0_LX1 | Default | d | 0.205 | |
MPMU_BUCK0_LX1 | Default | r | 72.000R | |
MPMU_BUCK0_LX2 | Default | d | 0.205 | |
MPMU_BUCK0_LX2 | Default | r | 72.000R | |
MPMU_BUCK0_LX3 | Default | d | 0.205 | |
MPMU_BUCK0_LX3 | Default | r | 72.000R | |
MPMU_BUCK10_FB | Default | d | 0.140 | |
MPMU_BUCK10_FB_R | Default | d | 0.140 | |
MPMU_BUCK10_LX0 | Default | d | 0.139 | |
MPMU_BUCK10_LX0 | Default | r | 193.000 | |
MPMU_BUCK10_LX1 | Default | d | 0.139 | |
MPMU_BUCK10_LX1 | Default | r | 193.000 | |
MPMU_BUCK1_FB | Default | d | 0.309 | |
MPMU_BUCK1_FB_R | Default | d | 0.309 | |
MPMU_BUCK1_LX0 | Default | d | 0.313 | |
MPMU_BUCK1_LX0 | Default | r | 550.000R | |
MPMU_BUCK1_LX1 | Default | d | 0.310 | |
MPMU_BUCK1_LX1 | Default | r | 550.000 | |
MPMU_BUCK2_LX0 | Default | d | 0.430 | |
MPMU_BUCK2_LX0 | Default | r | 0.005R | |
MPMU_BUCK3_LX0 | Default | d | 0.350 | |
MPMU_BUCK3_LX0 | Default | r | 0.006R | |
MPMU_BUCK4_FB | Default | d | 0.075 | |
MPMU_BUCK4_FB_R | Default | d | 0.075 | |
MPMU_BUCK4_LX0 | Default | d | 0.070 | |
MPMU_BUCK4_LX0 | Default | r | 223.000 | |
MPMU_BUCK4_LX1 | Default | d | 0.070 | |
MPMU_BUCK4_LX1 | Default | r | 223.000 | |
MPMU_BUCK4_LX2 | Default | d | 0.070 | |
MPMU_BUCK4_LX2 | Default | r | 223.000 | |
MPMU_BUCK4_LX3 | Default | d | 0.070 | |
MPMU_BUCK4_LX3 | Default | r | 223.000R | |
MPMU_BUCK5_FB | Default | d | 0.247 | |
MPMU_BUCK5_FB_R | Default | d | 0.247 | |
MPMU_BUCK5_LX0 | Default | d | 0.260 | |
MPMU_BUCK5_LX0 | Default | r | 80.000R | |
MPMU_BUCK5_LX1 | Default | d | 0.260 | |
MPMU_BUCK5_LX1 | Default | r | 80.000R | |
MPMU_BUCK5_LX2 | Default | d | 0.260 | |
MPMU_BUCK5_LX2 | Default | r | 80.000R | |
MPMU_BUCK5_LX3 | Default | d | 0.260 | |
MPMU_BUCK5_LX3 | Default | r | 80.000R | |
MPMU_BUCK6_FB | Default | d | 0.435 | |
MPMU_BUCK6_FB_R | Default | d | 0.436 | |
MPMU_BUCK6_LX0 | Default | d | 0.450 | |
MPMU_BUCK6_LX0 | Default | r | 0.036R | |
MPMU_BUCK7_FB | Default | d | 0.214 | |
MPMU_BUCK7_FB_R | Default | d | 0.215 | |
MPMU_BUCK7_LX0 | Default | d | 0.220 | |
MPMU_BUCK7_LX0 | Default | r | - | |
MPMU_BUCK7_LX0 | Default | v | 0.820 | |
MPMU_BUCK7_LX1 | Default | d | 0.220 | |
MPMU_BUCK7_LX1 | Default | r | 174.000R | |
MPMU_BUCK7_LX2 | Default | d | 0.220 | |
MPMU_BUCK7_LX2 | Default | r | 174.000R | |
MPMU_BUCK8_LX0 | Default | d | 0.270 | |
MPMU_BUCK8_LX0 | Default | r | 0.006R | |
MPMU_BUCK9_FB | Default | d | 0.227 | |
MPMU_BUCK9_FB_R | Default | d | 0.227 | |
MPMU_BUCK9_LX0 | Default | d | 0.240 | |
MPMU_BUCK9_LX0 | Default | r | 376.000 | |
MPMU_IREF | Default | d | 0.750 | |
MPMU_TCAL | Default | d | 0.772 | |
MPMU_THMSNS | Default | d | 0.773 | |
MPMU_VREF1V2 | Default | d | 0.621 | |
MX_GPIO3 | Default | d | 0.503 | |
NAND0_BOOT2 | Default | d | 0.000 | |
NAND0_CLK24M_01 | Default | d | 0.309 | |
NAND0_CLK24M_0123_R | Default | d | 0.303 | |
NAND0_CLK24M_23 | Default | d | 0.312 | |
NAND0_CLK24M_R | Default | d | 0.302 | |
NAND0_FORCE_EN | Default | d | 0.575 | |
NAND0_JTAG_SEL | Default | d | 0.309 | |
NAND0_JTAG_TRST_L | Default | d | 0.300 | |
NAND0_LPB_L | Default | d | 0.311 | |
NAND0_OCARINA_IREF | Default | d | 0.748 | |
NAND0_OCARINA_PGOOD | Default | d | 0.758 | |
NAND0_OCARINA_TCAL | Default | d | 0.770 | |
NAND0_OCARINA_TDEV1 | Default | d | 0.768 | |
NAND0_OCARINA_TDEV2 | Default | d | 0.768 | |
NAND0_OCARINA_VREF | Default | d | 0.766 | |
NAND0_PCIE_RESET_L | Default | d | 0.292 | |
NAND0_PFN_L | Default | d | 0.311 | |
NAND0_RESET_L | Default | d | 0.311 | |
NAND0_S5E0_PCIE_RESREF | Default | d | 0.200 | |
NAND0_S5E0_SWD_UID0 | Default | d | 0.370 | |
NAND0_S5E0_SWD_UID1 | Default | d | 0.371 | |
NAND0_S5E0_ZQ_0 | Default | d | 0.300 | |
NAND0_S5E0_ZQ_1 | Default | d | 0.300 | |
NAND0_S5E1_PCIE_RESREF | Default | d | 0.300 | |
NAND0_S5E1_SWD_UID0 | Default | d | 0.309 | |
NAND0_S5E1_SWD_UID1 | Default | d | 0.340 | |
NAND0_S5E1_ZQ_0 | Default | d | 0.299 | |
NAND0_S5E1_ZQ_1 | Default | d | 0.300 | |
NAND0_S5E2_PCIE_RESREF | Default | d | 0.200 | |
NAND0_S5E2_SWD_UID0 | Default | d | 0.356 | |
NAND0_S5E2_SWD_UID1 | Default | d | 0.355 | |
NAND0_S5E2_ZQ_0 | Default | d | 0.300 | |
NAND0_S5E2_ZQ_1 | Default | d | 0.299 | |
NAND0_S5E3_PCIE_RESREF | Default | d | 0.200 | |
NAND0_S5E3_SWD_UID0 | Default | d | 0.353 | |
NAND0_S5E3_SWD_UID1 | Default | d | 0.353 | |
NAND0_S5E3_ZQ_0 | Default | d | 0.299 | |
NAND0_S5E3_ZQ_1 | Default | d | 0.301 | |
NAND0_STG01_ADDR | Default | d | 0.575 | |
NAND0_WP_L | Default | d | 0.300 | |
NAND_BFH | Default | d | 0.292 | |
NC | Default | d | OL | |
ND_1V8 | Default | d | 0.594 | |
OUT123_EN | Default | d | 0.403 | |
P0V9_ATCRTMR0_SVR_PGND | Default | d | 0.000 | |
P0V9_ATCRTMR1_SVR_PGND | Default | d | 0.000 | |
P0V9_ATCRTMR2_SVR_PGND | Default | d | 0.000 | |
P0V9_LX0_NAND0 | Default | d | 0.310 | |
P0V9_LX0_NAND0 | Default | v | 0.840 | |
P0V9_LX1_NAND0 | Default | d | 0.310 | |
P0V9_LX1_NAND0 | Default | v | 0.840 | |
P1V2_LX0_NAND0 | Default | d | 0.306 | |
P1V2_LX0_NAND0 | Default | v | 1.200 | |
P1V8S1MONVDDH_SENSE_N | Default | d | 0.001 | |
P1V8S1MONVDDH_SENSE_P | Default | d | 0.093 | |
P1V8S1MONVDDH_SENSE_R_P | Default | d | 0.094 | |
P1V8VDDH_BOOT1 | Default | d | 0.540 | |
P1V8VDDH_BOOT1_R | Default | d | 0.569 | |
P1V8VDDH_DRMOS_FAULT_L | Default | d | 0.533 | |
P1V8VDDH_DRMOS_ISENSE1_N | Default | d | 0.537 | |
P1V8VDDH_DRMOS_ISENSE1_P | Default | d | 0.607 | |
P1V8VDDH_DRMOS_ISENSE2_N | Default | d | 0.537 | |
P1V8VDDH_DRMOS_ISENSE2_P | Default | d | 0.623 | |
P1V8VDDH_DRMOS_ISENSE3_N | Default | d | 0.537 | |
P1V8VDDH_DRMOS_ISENSE3_P | Default | d | 0.604 | |
P1V8VDDH_DRMOS_PWM1 | Default | d | 0.608 | |
P1V8VDDH_DRMOS_PWM3 | Default | d | 0.607 | |
P1V8VDDH_DRMOS_TSENSE | Default | d | 0.550 | |
P1V8VDDH_DRMOS_TSENSE_R | Default | d | 0.770 | |
P1V8VDDH_FAULT_L | Default | d | 0.615 | |
P1V8VDDH_GSENSE1 | Default | d | 0.050 | |
P1V8VDDH_GSENSE1_R | Default | d | 0.100 | |
P1V8VDDH_GSW1 | Default | d | 0.090 | |
P1V8VDDH_GSW1_R | Default | d | 0.092 | |
P1V8VDDH_HS_IOUT | Default | d | 0.721 | |
P1V8VDDH_HS_ISENSE | Default | d | 0.728 | |
P1V8VDDH_IMON | Default | d | 0.777 | |
P1V8VDDH_IMON_FILT | Default | d | 0.742 | |
P1V8VDDH_IREF | Default | d | 0.536 | |
P1V8VDDH_IREF_R | Default | d | 0.537 | |
P1V8VDDH_ISENSE1 | Default | d | 0.698 | |
P1V8VDDH_ISENSE2 | Default | d | 0.700 | |
P1V8VDDH_ISENSE3 | Default | d | 0.696 | |
P1V8VDDH_ISENSE_EXT | Default | d | 0.647 | |
P1V8VDDH_ISENSE_IMON | Default | d | OL | |
P1V8VDDH_OTP_SEL | Default | d | 0.654 | |
P1V8VDDH_PWR_EN | Default | d | 0.619 | |
P1V8VDDH_PWR_EN_R | Default | d | 0.618 | |
P1V8VDDH_RISNS1_N | Default | d | 0.095 | |
P1V8VDDH_RISNS1_P | Default | d | 0.095 | |
P1V8VDDH_RISNS2_N | Default | d | 0.095 | |
P1V8VDDH_RISNS2_P | Default | d | 0.095 | |
P1V8VDDH_RISNS3_N | Default | d | 0.095 | |
P1V8VDDH_RISNS3_P | Default | d | 0.095 | |
P1V8VDDH_RISNS_IN_N | Default | d | 0.795 | |
P1V8VDDH_RISNS_IN_N_R | Default | d | 1.900 | |
P1V8VDDH_RISNS_IN_P | Default | d | 0.795 | |
P1V8VDDH_RISNS_IN_P_R | Default | d | 1.900 | |
P1V8VDDH_SLP_L | Default | d | 0.618 | |
P1V8VDDH_SLP_R_L | Default | d | 0.618 | |
P1V8VDDH_SW1 | Default | d | 0.095 | |
P1V8VDDH_SW1 | Default | v | 1.800 | |
P1V8VDDH_SW1_L | Default | d | 0.095 | |
P1V8VDDH_SW1_L | Default | v | 1.800 | |
P1V8VDDH_SW2 | Default | d | 0.095 | |
P1V8VDDH_SW2 | Default | v | 1.800 | |
P1V8VDDH_SW2_L | Default | d | 0.095 | |
P1V8VDDH_SW2_L | Default | v | 1.800 | |
P1V8VDDH_SW3 | Default | d | 0.095 | |
P1V8VDDH_SW3 | Default | v | 1.800 | |
P1V8VDDH_SW3_L | Default | d | 0.095 | |
P1V8VDDH_SW3_L | Default | v | 1.800 | |
P1V8VDDH_THMSNS_1 | Default | d | 0.773 | |
P1V8VDDH_THMSNS_2 | Default | d | 0.777 | |
P1V8VDDH_THMSNS_3 | Default | d | 0.772 | |
P1V8VDDH_TLIMIT_THROTTLE_L | Default | d | 0.311 | |
P1V8VDDH_TSENSE | Default | d | 0.749 | |
P1V8VDDH_TSENSE_AMP_FB | Default | d | 0.749 | |
P1V8VDDH_TSENSE_AMP_IN | Default | d | 0.789 | |
P1V8VDDH_TSENSE_DIV | Default | d | 0.790 | |
P1V8VDDH_VOS1 | Default | d | 0.095 | |
P1V8VDDH_VOS3 | Default | d | 0.095 | |
P1V8VDDH_VPP | Default | d | 0.605 | |
P1V8VDDH_VSENSE | Default | d | 0.720 | |
P2V5_NAND0_BIAS | Default | d | 0.355 | |
P2V5_NAND0_BST | Default | d | 0.586 | |
P2V5_NAND0_BST_R | Default | d | 0.588 | |
P2V5_NAND0_EN | Default | d | 0.672 | |
P2V5_NAND0_EN_R | Default | d | 0.672 | |
P2V5_NAND0_FB | Default | d | 0.751 | |
P2V5_NAND0_FB_C | Default | d | OL | |
P2V5_NAND0_FB_RC | Default | d | 0.311 | |
P2V5_NAND0_FB_RC2 | Default | d | OL | |
P2V5_NAND0_FB_XW | Default | d | 0.293 | |
P2V5_NAND0_PGOOD | Default | d | 0.540 | |
P2V5_NAND0_RT | Default | d | 0.729 | |
P2V5_NAND0_SS | Default | d | 0.716 | |
P2V5_NAND0_SW | Default | d | 0.305 | |
P2V5_NAND0_SW | Default | v | 2.500 | |
P2V5_NAND0_VC | Default | d | 0.750 | |
P2V5_NAND0_VC_R | Default | d | OL | |
P2V5_NAND1_SW | Default | v | 2.500 | |
P3V3SD_AVIN | Default | d | 0.480 | |
P3V3SD_FB | Default | d | 1.391 | |
P3V3SD_FB_R | Default | d | OL | |
P3V3SD_FB_TOP | Default | d | 0.417 | |
P3V3SD_PG | Default | d | 0.500 | |
P3V3SD_PHASE | Default | d | 0.416 | |
P3V3SD_SS | Default | d | 0.746 | |
P3V3SD_VOS | Default | d | 0.426 | |
P3V8AONISEN_MUX_EN | Default | d | 0.533 | |
P3V8AONISEN_MUX_EN_L | Default | d | 0.558 | |
P3V8AON_BST1 | Default | d | 0.613 | |
P3V8AON_BST1_RC | Default | d | 0.612 | |
P3V8AON_BST2 | Default | d | 0.613 | |
P3V8AON_BST2_RC | Default | d | 0.612 | |
P3V8AON_BST3 | Default | d | 0.613 | |
P3V8AON_BST3_RC | Default | d | 0.612 | |
P3V8AON_DRVH1 | Default | d | 0.990 | |
P3V8AON_DRVH1_R | Default | d | 0.990 | |
P3V8AON_DRVH2 | Default | d | 0.990 | |
P3V8AON_DRVH2_R | Default | d | 0.990 | |
P3V8AON_DRVH3 | Default | d | 0.990 | |
P3V8AON_DRVH3_R | Default | d | 0.990 | |
P3V8AON_DRVL1 | Default | d | 0.667 | |
P3V8AON_DRVL1_R | Default | d | 0.668 | |
P3V8AON_DRVL2 | Default | d | 0.669 | |
P3V8AON_DRVL2_R | Default | d | 0.669 | |
P3V8AON_DRVL2_RR | Default | d | 0.669 | |
P3V8AON_DRVL3 | Default | d | 0.669 | |
P3V8AON_DRVL3_R | Default | d | 0.669 | |
P3V8AON_DRVL3_RR | Default | d | 0.669 | |
P3V8AON_FAULT_L | Default | d | 0.692 | |
P3V8AON_GPIO | Default | d | 0.694 | |
P3V8AON_HS_IOUT | Default | d | 0.717 | |
P3V8AON_HS_ISENSE | Default | d | 0.729 | |
P3V8AON_ILIMIT_BUF_L | Default | d | 0.687 | |
P3V8AON_ILIMIT_DIV | Default | d | 0.737 | |
P3V8AON_ILIMIT_L | Default | d | 0.267 | |
P3V8AON_IMON | Default | d | OL | |
P3V8AON_IMON_P3V8AON | Default | d | 0.777 | |
P3V8AON_IMON_R | Default | d | 0.000 | |
P3V8AON_ISEN1_N | Default | d | 0.357 | |
P3V8AON_ISEN1_P | Default | d | 0.357 | |
P3V8AON_ISEN2_N | Default | d | 0.357 | |
P3V8AON_ISEN2_P | Default | d | 0.357 | |
P3V8AON_ISEN3_N | Default | d | 0.358 | |
P3V8AON_ISEN3_P | Default | d | 0.358 | |
P3V8AON_ISENSE | Default | d | 0.730 | |
P3V8AON_ISENSE_EXT | Default | d | 0.651 | |
P3V8AON_ISENSE_EXT_R | Default | d | 0.731 | |
P3V8AON_ISEN_IN_N | Default | d | 0.587 | |
P3V8AON_ISEN_IN_N_FET | Default | d | 0.666 | |
P3V8AON_ISEN_IN_N_R | Default | d | 0.640 | |
P3V8AON_ISEN_IN_P | Default | d | 0.589 | |
P3V8AON_ISEN_IN_P_FET | Default | d | 0.668 | |
P3V8AON_ISEN_IN_P_R | Default | d | 0.673 | |
P3V8AON_ISNS1_N | Default | d | 0.360 | |
P3V8AON_ISNS1_P | Default | d | 0.360 | |
P3V8AON_ISNS2_N | Default | d | 0.360 | |
P3V8AON_ISNS2_P | Default | d | 0.360 | |
P3V8AON_ISNS3_N | Default | d | 0.356 | |
P3V8AON_ISNS3_P | Default | d | 0.357 | |
P3V8AON_LPM | Default | d | 0.679 | |
P3V8AON_LPM_R | Default | d | 0.679 | |
P3V8AON_PMU_VSENSE | Default | d | 0.723 | |
P3V8AON_PVCC | Default | d | 0.553 | |
P3V8AON_PWR_EN | Default | d | 0.588 | |
P3V8AON_PWR_EN_R | Default | d | 0.588 | |
P3V8AON_SNUB1 | Default | d | 0.358 | |
P3V8AON_SS | Default | d | 0.760 | |
P3V8AON_SW1 | Default | d | 0.356 | |
P3V8AON_SW2 | Default | d | 0.360 | |
P3V8AON_SW2 | Default | v | 3.800 | |
P3V8AON_SW3 | Default | d | 0.360 | |
P3V8AON_SW3 | Default | v | 3.800 | |
P3V8AON_VRTN | Default | d | 0.000 | |
P3V8AON_VSENSE | Default | d | 0.356 | |
P3V8AON_VSENSE_IN | Default | d | 0.353 | |
P3V8AON_VSNS_XW_N | Default | d | 0.000 | |
P3V8AON_VSNS_XW_P | Default | d | 0.360 | |
P3V8AON_VSW1 | Default | d | 0.369 | |
P3V8AON_VSW1 | Default | v | 3.800 | |
P5VS2TPS_AGND | Default | d | 0.000 | |
P5VS2TPS_AVIN | Default | d | 0.350 | |
P5VS2TPS_FB | Default | d | 1.400 | |
P5VS2TPS_FB_R | Default | d | OL | |
P5VS2TPS_FB_TOP | Default | d | 0.390 | |
P5VS2TPS_PGOOD | Default | d | 0.534 | |
P5VS2TPS_PHASE | Default | d | 0.388 | |
P5VS2TPS_PHASE | Default | v | 5.100 | |
P5VS2TPS_PWR_EN | Default | d | 0.521 | |
P5VS2TPS_PWR_EN_R | Default | d | 0.521 | |
P5VS2TPS_SS | Default | d | 0.749 | |
P5VS2TPS_VOS | Default | d | 0.399 | |
P5VS2_DSCHG | Default | d | 0.450 | |
P5VS2_DSCHG_EN | Default | d | 0.466 | |
P5VS2_DSCHG_EN_L | Default | d | 0.520 | |
P5VS2_HS_IOUT | Default | d | 0.722 | |
P5VS2_HS_ISENSE | Default | d | 0.730 | |
P5VS2_PWR_EN | Default | d | 0.697 | |
P5VUSB01_HS_IOUT | Default | d | 0.722 | |
P5VUSB01_HS_ISENSE | Default | d | 0.782 | |
P5VUSB23_HS_IOUT | Default | d | 0.725 | |
P5VUSB23_HS_ISENSE | Default | d | 0.730 | |
P5VUSBC01_AGND | Default | d | 0.000 | |
P5VUSBC01_BIAS | Default | d | 0.300 | |
P5VUSBC01_EN | Default | d | 0.670 | |
P5VUSBC01_EN_R | Default | d | 0.673 | |
P5VUSBC01_FB | Default | d | 0.752 | |
P5VUSBC01_FB_C | Default | d | OL | |
P5VUSBC01_FB_RC | Default | d | 0.310 | |
P5VUSBC01_FB_RC2 | Default | d | OL | |
P5VUSBC01_FB_XW | Default | d | 0.300 | |
P5VUSBC01_INTVCC | Default | d | 0.567 | |
P5VUSBC01_PGOOD | Default | d | 0.690 | |
P5VUSBC01_RT | Default | d | 0.730 | |
P5VUSBC01_SS | Default | d | 0.714 | |
P5VUSBC01_SW | Default | d | 0.300 | |
P5VUSBC01_VC | Default | d | 0.751 | |
P5VUSBC01_VC_R | Default | d | OL | |
P5VUSBC23_EN | Default | d | 0.640 | |
P5VUSBC23_EN_R | Default | d | 0.642 | |
P5VUSBC23_FB | Default | d | 1.409 | |
P5VUSBC23_FB_R | Default | d | 0.462 | |
P5VUSBC23_PGOOD | Default | d | 0.692 | |
P5VUSBC23_RA | Default | d | OL | |
P5VUSBC23_SS | Default | d | 0.539 | |
P5VUSBC23_SW1 | Default | d | 0.454 | |
P5VUSBC23_SW2 | Default | d | 0.454 | |
PBUS_VSNS_EN_L | Default | d | 0.423 | |
PBUS_VSNS_EN_L_DIV | Default | d | OL | |
PBUS_VSNS_IN | Default | d | 0.479 | |
PBUS_VSNS_OUT | Default | d | OL | |
PCIE_CLK100M_NAND0_0_1_N | Default | d | 0.304 | |
PCIE_CLK100M_NAND0_0_1_P | Default | d | 0.304 | |
PCIE_CLK100M_WLBT_N | Default | d | 0.328 | |
PCIE_CLK100M_WLBT_P | Default | d | 0.327 | |
PCIE_NAND0_D2R_C_N<0> | Default | d | 0.588 | |
PCIE_NAND0_D2R_C_N<1> | Default | d | 0.394 | |
PCIE_NAND0_D2R_C_N<2> | Default | d | 0.380 | |
PCIE_NAND0_D2R_C_N<3> | Default | d | 0.469 | |
PCIE_NAND0_D2R_C_P<0> | Default | d | 0.588 | |
PCIE_NAND0_D2R_C_P<1> | Default | d | 0.385 | |
PCIE_NAND0_D2R_C_P<2> | Default | d | 0.380 | |
PCIE_NAND0_D2R_C_P<3> | Default | d | 0.469 | |
PCIE_NAND0_D2R_N<0> | Default | d | 0.419 | |
PCIE_NAND0_D2R_N<1> | Default | d | 0.417 | |
PCIE_NAND0_D2R_N<2> | Default | d | 0.420 | |
PCIE_NAND0_D2R_N<3> | Default | d | 0.418 | |
PCIE_NAND0_D2R_P<0> | Default | d | 0.419 | |
PCIE_NAND0_D2R_P<1> | Default | d | 0.417 | |
PCIE_NAND0_D2R_P<2> | Default | d | 0.418 | |
PCIE_NAND0_D2R_P<3> | Default | d | 0.418 | |
PCIE_NAND0_R2D_C_N<0> | Default | d | 0.363 | |
PCIE_NAND0_R2D_C_N<1> | Default | d | 0.362 | |
PCIE_NAND0_R2D_C_N<2> | Default | d | 0.360 | |
PCIE_NAND0_R2D_C_N<3> | Default | d | 0.362 | |
PCIE_NAND0_R2D_C_P<0> | Default | d | 0.363 | |
PCIE_NAND0_R2D_C_P<1> | Default | d | 0.362 | |
PCIE_NAND0_R2D_C_P<2> | Default | d | 0.360 | |
PCIE_NAND0_R2D_C_P<3> | Default | d | 0.362 | |
PCIE_NAND0_R2D_N<0> | Default | d | 0.447 | |
PCIE_NAND0_R2D_N<1> | Default | d | 0.398 | |
PCIE_NAND0_R2D_N<2> | Default | d | 0.400 | |
PCIE_NAND0_R2D_N<3> | Default | d | 0.407 | |
PCIE_NAND0_R2D_P<0> | Default | d | 0.447 | |
PCIE_NAND0_R2D_P<1> | Default | d | 0.399 | |
PCIE_NAND0_R2D_P<2> | Default | d | 0.400 | |
PCIE_NAND0_R2D_P<3> | Default | d | 0.407 | |
PCIE_WLBT_D2R_C_N | Default | d | 0.329 | |
PCIE_WLBT_D2R_C_P | Default | d | 0.319 | |
PCIE_WLBT_D2R_N | Default | d | 0.415 | |
PCIE_WLBT_D2R_P | Default | d | 0.415 | |
PCIE_WLBT_R2D_C_N | Default | d | 0.362 | |
PCIE_WLBT_R2D_C_P | Default | d | 0.361 | |
PCIE_WLBT_R2D_N | Default | d | 0.288 | |
PCIE_WLBT_R2D_P | Default | d | 0.289 | |
PDM_DMIC_CLK3 | Default | d | 0.314 | |
PDM_DMIC_CLK4 | Default | d | 0.309 | |
PDM_DMIC_DATA3 | Default | d | 0.314 | |
PDM_DMIC_DATA4 | Default | d | 0.311 | |
PD_ACE5_VCONN | Default | d | 0.541 | |
PD_UPC0_DBG6_R | Default | d | 0.694 | |
PD_UPC0_DBG7_R | Default | d | 0.697 | |
PD_UPC0_FORCE_PWR | Default | d | 0.700 | |
PD_UPC0_GPIO5 | Default | d | 0.590 | |
PD_UPC0_MRESET | Default | d | 0.661 | |
PD_UPC0_USBP3_RN | Default | d | 0.726 | |
PD_UPC0_USBP3_RP | Default | d | 0.725 | |
PD_UPC1_DBG0_R | Default | d | 0.700 | |
PD_UPC1_DBG1_R | Default | d | 0.700 | |
PD_UPC1_DBG2_R | Default | d | 0.700 | |
PD_UPC1_DBG3_R | Default | d | 0.700 | |
PD_UPC1_DBG4_R | Default | d | 0.700 | |
PD_UPC1_DBG5_R | Default | d | 0.700 | |
PD_UPC1_DBG6_R | Default | d | 0.700 | |
PD_UPC1_DBG7_R | Default | d | 0.700 | |
PD_UPC1_FORCE_PWR | Default | d | 0.708 | |
PD_UPC1_GPIO1 | Default | d | 0.678 | |
PD_UPC1_GPIO10 | Default | d | 0.713 | |
PD_UPC1_GPIO5 | Default | d | 0.600 | |
PD_UPC1_GPIO7 | Default | d | 0.708 | |
PD_UPC1_GPIO9 | Default | d | 0.710 | |
PD_UPC1_MRESET | Default | d | 0.670 | |
PD_UPC1_USBP2_RN | Default | d | 0.727 | |
PD_UPC1_USBP2_RP | Default | d | 0.726 | |
PD_UPC1_USBP3_RN | Default | d | 0.730 | |
PD_UPC1_USBP3_RP | Default | d | 0.727 | |
PD_UPC2_DBG0_R | Default | d | 0.703 | |
PD_UPC2_DBG1_R | Default | d | 0.695 | |
PD_UPC2_DBG2_R | Default | d | 0.696 | |
PD_UPC2_DBG3_R | Default | d | 0.700 | |
PD_UPC2_DBG4_R | Default | d | 0.697 | |
PD_UPC2_DBG5_R | Default | d | 0.697 | |
PD_UPC2_DBG6_R | Default | d | 0.696 | |
PD_UPC2_DBG7_R | Default | d | 0.699 | |
PD_UPC2_FORCE_PWR | Default | d | 0.710 | |
PD_UPC2_GPIO10 | Default | d | 0.708 | |
PD_UPC2_GPIO5 | Default | d | 0.596 | |
PD_UPC2_GPIO7 | Default | d | 0.707 | |
PD_UPC2_GPIO9 | Default | d | 0.706 | |
PD_UPC2_MRESET | Default | d | 0.670 | |
PD_UPC2_USBP2_RN | Default | d | 0.725 | |
PD_UPC2_USBP2_RP | Default | d | 0.723 | |
PD_UPC2_USBP3_RN | Default | d | 0.726 | |
PD_UPC2_USBP3_RP | Default | d | 0.724 | |
PD_UPC5_DBG_R | Default | d | 0.630 | |
PD_UPC5_MRESET | Default | d | 0.669 | |
PD_UPC5_PORT_MUX | Default | d | 0.751 | |
PD_UPC5_USB2 | Default | d | 0.621 | |
PD_UPC5_USB_RP | Default | d | 0.656 | |
PIND_PFET_EN | Default | d | 0.490 | |
PMU_ACTIVE_READY | Default | d | 0.454 | |
PMU_CLK32K_CLVR | Default | d | 0.456 | |
PMU_CLK32K_CLVR_R | Default | d | 0.478 | |
PMU_CLK32K_SOC | Default | d | 0.314 | |
PMU_CLK32K_SOC_R | Default | d | 0.336 | |
PMU_CLK32K_WLBT | Default | d | 0.474 | |
PMU_CLK32K_WLBT_R | Default | d | 0.496 | |
PMU_CRASH_L | Default | d | 0.449 | |
PMU_CRASH_SLAVE_L | Default | d | 0.725 | |
PMU_FAULT_OUT_L | Default | d | 0.758 | |
PMU_FAULT_OUT_R_L | Default | d | 0.703 | |
PMU_FORCE_DFU | Default | d | 0.746 | |
PMU_ONOFF_L | Default | d | 0.679 | |
PMU_ONOFF_L_CONN | Default | d | 0.687 | |
PMU_RESET_L | Default | d | 0.319 | |
PMU_RSLOC_RST_L | Default | d | 0.512 | |
PMU_SYS_ALIVE | Default | d | 0.525 | |
PMU_UVWARN_L | Default | d | 0.314 | |
PMU_VDDHI | Default | d | 0.682 | |
PMU_VDDHI_UVWARN_L | Default | d | 0.314 | |
PMU_VDDMAIN_UVWARN_L | Default | d | 0.528 | |
PP0V575_S1_VDDQ0 | Default | d | 0.140 | |
PP0V575_S1_VDDQ0 | Default | r | 192.000 | |
PP0V575_S1_VDDQ1 | Default | d | 0.139 | |
PP0V575_S1_VDDQ1 | Default | r | 193.000 | |
PP0V81_S1_SRAM | Default | d | 0.214 | |
PP0V81_S1_SRAM | Default | r | 174.000 | |
PP0V81_S1_SRAM | Default | v | 0.820 | |
PP0V855_S2SW_VDDCIO | Default | d | 0.192 | |
PP0V855_S2SW_VDDCIO | Default | r | 647.000 | |
PP0V8_S2_CLVR_VDDDIG | Default | d | 0.294 | |
PP0V95_S2SW_VDD2L | Default | d | 0.335 | |
PP0V95_S2SW_VDD2L | Default | r | 0.001R | |
PP0V9_ATCRTMR0_LC | Default | d | 0.364 | |
PP0V9_ATCRTMR0_LVR | Default | d | 0.512 | |
PP0V9_ATCRTMR0_SVR | Default | d | 0.399 | |
PP0V9_ATCRTMR0_SVR_IND | Default | d | 0.399 | |
PP0V9_ATCRTMR1_LC | Default | d | 0.370 | |
PP0V9_ATCRTMR1_LVR | Default | d | 0.520 | |
PP0V9_ATCRTMR1_SVR | Default | d | 0.406 | |
PP0V9_ATCRTMR1_SVR_IND | Default | d | 0.406 | |
PP0V9_ATCRTMR2_LC | Default | d | 0.359 | |
PP0V9_ATCRTMR2_LVR | Default | d | 0.511 | |
PP0V9_ATCRTMR2_SVR | Default | d | 0.397 | |
PP0V9_ATCRTMR2_SVR_IND | Default | d | 0.397 | |
PP0V9_NAND0 | Default | d | 0.300 | |
PP0V9_NAND0 | Default | v | 0.840 | |
PP0V9_NAND0_FB_DIS | Default | d | 0.302 | |
PP0V9_NAND0_S5E0_VDD_PLL | Default | d | 0.300 | |
PP0V9_NAND0_S5E1_VDD_PLL | Default | d | 0.300 | |
PP0V9_NAND0_S5E3_VDD_PLL | Default | d | 0.300 | |
PP16V0_TOUCHID | Default | d | 0.650 | |
PP16V0_TOUCHID_FILT_CONN | Default | d | 0.651 | |
PP16V0_TOUCHID_SW | Default | d | 0.360 | |
PP17V0_LDOIN | Default | d | 0.590 | |
PP1V2_AON | Default | d | 0.660 | |
PP1V2_AON_SPMU | Default | d | 0.670 | |
PP1V2_AWAKE | Default | d | 0.254 | |
PP1V2_AWAKE | Default | r | 0.003R | |
PP1V2_AWAKESW_BLC | Default | d | 0.710 | |
PP1V2_CODEC_VL_VD | Default | d | 0.254 | |
PP1V2_DP2HDMI_DIG | Default | d | 0.246 | |
PP1V2_DP2HDMI_TX_RX_PLL_OSC | Default | d | 0.246 | |
PP1V2_NAND0 | Default | d | 0.306 | |
PP1V2_NAND0 | Default | v | 1.200 | |
PP1V2_NAND0_FB_DIS | Default | d | 0.304 | |
PP1V2_NAND0_S5E0_AVDD1X_PLL | Default | d | 0.305 | |
PP1V2_NAND0_S5E0_PCI_AVDD_H | Default | d | 0.306 | |
PP1V2_NAND0_S5E1_AVDD1X_PLL | Default | d | 0.306 | |
PP1V2_NAND0_S5E1_PCI_AVDD_H | Default | d | 0.304 | |
PP1V2_NAND0_S5E2_AVDD1X_PLL | Default | d | 0.305 | |
PP1V2_NAND0_S5E2_PCI_AVDD_H | Default | d | 0.300 | |
PP1V2_NAND0_S5E3_AVDD1X_PLL | Default | d | 0.306 | |
PP1V2_NAND0_S5E3_PCI_AVDD_H | Default | d | 0.306 | |
PP1V2_S2 | Default | d | 0.265 | |
PP1V2_S2 | Default | r | 0.006R | |
PP1V2_S2_CLVR_VDDIO | Default | d | 0.456 | |
PP1V2_S2_DP2HDMI | Default | d | 0.248 | |
PP1V2_UPCPMURESET | Default | d | 0.267 | |
PP1V5_AON_VCORE_MPMU | Default | d | 0.395 | |
PP1V5_AON_VCORE_SPMU | Default | d | 0.387 | |
PP1V5_AON_VRTC_SPMU | Default | d | 0.387 | |
PP1V5_P1V8VDDH_LDO15 | Default | d | 0.400 | |
PP1V5_UPC0_LDO_CORE | Default | d | 0.520 | |
PP1V5_UPC1_LDO_CORE | Default | d | 0.520 | |
PP1V5_UPC2_LDO_CORE | Default | d | 0.520 | |
PP1V5_UPC5_LDO_CORE | Default | d | 0.517 | |
PP1V85_S2_IPD | Default | d | 0.402 | |
PP1V8_AON | Default | d | 0.450 | |
PP1V8_AON_SPMU | Default | d | 0.537 | |
PP1V8_AWAKE | Default | d | 0.368 | |
PP1V8_CODEC_VA | Default | d | 0.367 | |
PP1V8_CODEC_VCP | Default | d | 0.368 | |
PP1V8_DMIC | Default | d | 0.258 | |
PP1V8_GL_SDCONN | Default | d | 0.459 | |
PP1V8_MIXEDIO_VDD | Default | d | 0.280 | |
PP1V8_S1_CLVR_VDDH | Default | d | 0.095 | |
PP1V8_S1_CLVR_VDDH | Default | v | 1.800 | |
PP1V8_S1_CLVR_VDDH_VSNS_IN | Default | d | 0.090 | |
PP1V8_S2 | Default | d | 0.258 | |
PP1V8_S2 | Default | r | 0.006R | |
PP1V8_S2 | Default | v | 1.800 | |
PP1V8_S2SW | Default | d | 0.321 | |
PP1V8_S2SW | Default | r | 0.006R | |
PP1V8_S2SW_CLVR_VDDC1_LDO | Default | d | 0.525 | |
PP1V8_S2SW_DP2HDMI | Default | d | 0.281 | |
PP1V8_S2SW_SNS | Default | d | 0.508 | |
PP1V8_S2_HDMI_ISNS | Default | d | 0.258 | |
PP1V8_S2_IMU_FILT | Default | d | 0.258 | |
PP1V8_S2_WLBT_R | Default | d | 0.256 | |
PP1V8_TOUCHID | Default | d | 0.520 | |
PP1V8_TOUCHID_FILT_CONN | Default | d | 0.521 | |
PP2V5_NAND0 | Default | d | 0.293 | |
PP2V5_NAND0 | Default | v | 2.500 | |
PP2V5_NAND0_INTVCC | Default | d | 0.564 | |
PP2V5_NAND1 | Default | d | OL | |
PP2V5_NAND1 | Default | v | 2.500 | |
PP2V5_VREF_P3V8AONILIMIT | Default | d | 0.600 | |
PP3V0_TOUCHID | Default | d | 0.557 | |
PP3V0_TOUCHID_FILT_CONN | Default | d | 0.558 | |
PP3V3_AON | Default | d | 0.551 | |
PP3V3_AON_KBD_CONN | Default | d | 0.401 | |
PP3V3_ATCRTMR0_LC | Default | d | 0.575 | |
PP3V3_ATCRTMR0_SVR | Default | d | 0.456 | |
PP3V3_ATCRTMR0_VCCA | Default | d | 0.457 | |
PP3V3_ATCRTMR1_LC | Default | d | 0.576 | |
PP3V3_ATCRTMR1_SVR | Default | d | 0.458 | |
PP3V3_ATCRTMR1_VCCA | Default | d | 0.458 | |
PP3V3_ATCRTMR2_SVR | Default | d | 0.455 | |
PP3V3_ATCRTMR2_VCCA | Default | d | 0.455 | |
PP3V3_AWAKE_SW_SD | Default | d | 0.417 | |
PP3V3_DP2HDMI_AUX_IO | Default | d | 0.268 | |
PP3V3_DP2HDMI_RX_TX | Default | d | 0.268 | |
PP3V3_GL_SDCONN | Default | d | 0.459 | |
PP3V3_KBD_LEDDRIVER | Default | d | 0.528 | |
PP3V3_S2 | Default | d | 0.430 | |
PP3V3_S2SW_DP2HDMI | Default | d | 0.270 | |
PP3V3_S2SW_USBC0 | Default | d | 0.465 | |
PP3V3_S2SW_USBC1 | Default | d | 0.460 | |
PP3V3_S2SW_USBC2 | Default | d | 0.457 | |
PP3V3_S2_IPD | Default | d | 0.528 | |
PP3V3_UPC0_LDO | Default | d | 0.480 | |
PP3V3_UPC1_LDO | Default | d | 0.490 | |
PP3V3_UPC2_LDO | Default | d | 0.484 | |
PP3V3_UPC5_LDO | Default | d | 0.504 | |
PP3V3_VREF_SD_CLKREQ_LS | Default | d | 0.641 | |
PP3V8AON_PH1 | Default | d | 0.360 | |
PP3V8AON_PH1 | Default | v | 3.800 | |
PP3V8AON_PH2 | Default | d | 0.360 | |
PP3V8AON_PH2 | Default | v | 3.800 | |
PP3V8AON_PH3 | Default | d | 0.360 | |
PP3V8AON_PH3 | Default | v | 3.800 | |
PP3V8_AON | Default | d | 0.360 | |
PP3V8_AON | Default | v | 3.800 | |
PP3V8_AON_MPMU_ISNS | Default | d | 0.360 | |
PP3V8_AON_SPMU_ISNS | Default | d | 0.360 | |
PP3V8_AON_WLBT_ISNS | Default | d | 0.355 | |
PP3V8_ATC01_LDO_ISNS | Default | d | 0.358 | |
PP3V8_ATC2_LDO_ISNS | Default | d | 0.360 | |
PP3V8_AWAKESW_TCON_ISNS | Default | d | 0.539 | |
PP3V8_CODEC_VP | Default | d | 0.357 | |
PP3V8_IPDLDO_VIN_ISNS | Default | d | 0.356 | |
PP4V9_VPUMP_MPMU | Default | d | 0.706 | |
PP5V0_HDMI_DDC_CONN | Default | d | 0.600 | |
PP5V0_HDMI_DDC_LDSW | Default | d | 0.600 | |
PP5V0_S2SW_HDMI_D | Default | d | 0.715 | |
PP5V_AON_P3V8AON | Default | d | 0.515 | |
PP5V_KBDBKLT_BEN_A | Default | d | 0.400 | |
PP5V_KBDBKLT_BEN_D | Default | d | 0.398 | |
PP5V_KBDBKLT_ISNS | Default | d | 0.392 | |
PP5V_KBDBKLT_ISNS | Default | v | 5.100 | |
PP5V_P1V8VDDH_CTRL_VCC | Default | d | 0.387 | |
PP5V_S2SW_USBC01 | Default | d | 0.300 | |
PP5V_S2SW_USBC23 | Default | d | 0.454 | |
PP5V_S2_CAMERA_ISNS | Default | d | 0.387 | |
PP5V_S2_HDMI | Default | d | 0.523 | |
PP5V_S2_LUXE_VDDA | Default | d | 0.390 | |
PP5V_S2_MAIN | Default | d | 0.388 | |
PP5V_S2_MAIN | Default | t | Error on BRD this is GND | |
PP5V_S2_MAIN | Default | v | 5.100 | |
PP5V_S2_TPAD_CONN | Default | d | 0.388 | |
PPBCON_AWAKESW_BKLTCONN | Default | d | 0.712 | |
PPBCON_AWAKESW_BKLTCONN_ISNS | Default | d | 0.713 | |
PPBUS_AON | Default | d | 0.480 | |
PPBUS_AON | Default | v | 12.000 | |
PPBUS_AON_LUXE_ISNS | Default | d | 0.480 | |
PPBUS_AON_MPMU | Default | d | 0.480 | |
PPBUS_AON_P3V8AONISEN | Default | d | 0.557 | |
PPBUS_AON_SPKRAMP_ABC_ISNS | Default | d | 0.480 | |
PPBUS_NAND0_ISNS | Default | d | 0.480 | |
PPBUS_NAND0_ISNS | Default | v | 12.000 | |
PPBUS_NAND1_ISNS | Default | d | 0.480 | |
PPCHGR_VDDA | Default | d | 0.430 | |
PPCHGR_VDDP | Default | d | 0.453 | |
PPDCIN_AON | Default | d | 0.542 | |
PPDCIN_AON_CHGR_R | Default | d | 0.542 | |
PPDCIN_AON_CHGR_R | Default | v | 20.000 | |
PPHV_INT0_AONSW | Default | d | 0.542 | |
PPHV_INT1_AONSW | Default | d | 0.542 | |
PPHV_INT2_AONSW | Default | d | 0.542 | |
PPHV_INT5_AONSW | Default | d | 0.542 | |
PPLUXE_INPUT_R_V | Default | d | 0.480 | |
PPLUXE_LG1_S | Default | d | 0.000 | |
PPLUXE_LX1 | Default | d | 0.530 | |
PPLUXE_LX2 | Default | d | 0.530 | |
PPMDB_AWAKESW_TCON | Default | d | 0.539 | |
PPPANEL_PANEL_DISCHARGE | Default | d | 0.407 | |
PPVBAT_AON | Default | d | 1.578 | |
PPVBAT_AON_CHGR_R | Default | d | 0.480 | |
PPVBAT_AON_CHGR_REG | Default | d | 0.480 | |
PPVBAT_AON_CHGR_REG | Default | v | 12.000 | |
PPVBUS_USBC0 | Default | d | 0.138 | |
PPVBUS_USBC1 | Default | d | 0.138 | |
PPVBUS_USBC2 | Default | d | 0.138 | |
PPVBUS_USBC5 | Default | d | 0.140 | |
PPVDD2H0_S2SW | Default | d | 0.056 | |
PPVDD2H0_S2SW | Default | r | 207.000 | |
PPVDD2H1_S2SW | Default | d | 0.076 | |
PPVDD2H1_S2SW | Default | r | 223.000 | |
PPVDD_AMPH0_S2SW | Default | d | 0.446 | |
PPVDD_AMPH0_S2SW | Default | r | 0.007R | |
PPVDD_AMPH1_S2SW | Default | d | 0.435 | |
PPVDD_AMPH1_S2SW | Default | r | 0.036R | |
PPVDD_AVEMSR_AWAKESW | Default | d | 0.247 | |
PPVDD_AVEMSR_AWAKESW | Default | r | 80.000R | |
PPVDD_CHGRRST | Default | d | 0.449 | |
PPVDD_DCS_S1 | Default | d | 0.231 | |
PPVDD_DCS_S1 | Default | r | 76.000R | |
PPVDD_DISP_AWAKESW | Default | d | 0.199 | |
PPVDD_DISP_AWAKESW | Default | r | 68.000R | |
PPVDD_ECPU_AWAKE | Default | d | 0.205 | |
PPVDD_ECPU_AWAKE | Default | r | 72.000R | |
PPVDD_ECPU_SRAM_AWAKE | Default | d | 0.426 | |
PPVDD_ECPU_SRAM_AWAKE | Default | r | 0.005R | |
PPVDD_FIXED_S1 | Default | d | 0.266 | |
PPVDD_FIXED_S1 | Default | r | 376.000 | |
PPVDD_GPU_BMPR_S1 | Default | d | 0.310 | |
PPVDD_GPU_BMPR_S1 | Default | r | 550.000 | |
PPVDD_LDO_NAND0_OCARINA | Default | d | 0.373 | |
PPVDD_P2V5VREF | Default | d | 0.388 | |
PPVDD_P3V8AONISEN | Default | d | 0.387 | |
PPVDD_SOC_S1 | Default | d | 0.130 | |
PPVDD_SOC_S1 | Default | r | 47.000R | |
PPVIN_5VUSBC01_ISNS | Default | d | 0.480 | |
PPVIN_5VUSBC23_ISNS | Default | d | 0.480 | |
PPVIN_P1V8VDDH_CTRL_VIN | Default | d | 0.479 | |
PPVIN_P1V8VDDH_ISNS | Default | d | 0.480 | |
PPVIN_P1V8VDDH_ISNS | Default | v | 12.000 | |
PPVIN_P3V3SD_ISNS | Default | d | 0.480 | |
PPVIN_P3V8AON_ISNS | Default | d | 0.480 | |
PPVIN_P3V8NAND0_ISNS | Default | d | 0.357 | |
PPVIN_P3V8NAND1_ISNS | Default | d | 0.360 | |
PPVIN_P5VS2_ISNS | Default | d | 0.480 | |
PPVOUT_KBDLED_CONN | Default | d | 0.591 | |
PPVOUT_KBDLED_CONN | Default | v | 5.100 | |
PPVOUT_LUXE | Default | d | 0.622 | |
PPVOUT_LUXE_XW | Default | d | 0.630 | |
PVBAT_ILIMIT_L | Default | d | 0.329 | |
PVOUT_LUXE_R | Default | d | 0.623 | |
RF_ANT_0 | Default | d | OL | |
RF_ANT_1 | Default | d | OL | |
RF_BT_DED_ANT | Default | d | 0.001 | |
ROM_UPC0_HOLD_L | Default | d | 0.700 | |
ROM_UPC0_WP_L | Default | d | 0.673 | |
ROM_UPC1_HOLD_L | Default | d | 0.700 | |
ROM_UPC1_WP_L | Default | d | 0.675 | |
ROM_UPC23_HOLD_L | Default | d | 0.703 | |
ROM_UPC23_WP_L | Default | d | 0.673 | |
ROM_UPC5_HOLD_L | Default | d | 0.702 | |
RSLOC_RST_L | Default | d | 0.480 | |
SAVE_BAT_G | Default | d | 0.755 | |
SAVE_BAT_S | Default | d | 1.578 | |
SDCONN_CLK | Default | d | 0.439 | |
SDCONN_CLK_CONN | Default | d | 0.443 | |
SDCONN_CLK_CONN_FL | Default | d | 0.443 | |
SDCONN_CLK_R | Default | d | 0.443 | |
SDCONN_CMD | Default | d | 0.438 | |
SDCONN_CMD_R | Default | d | 0.440 | |
SDCONN_CMD_R_FL | Default | d | 0.440 | |
SDCONN_D0 | Default | d | 0.434 | |
SDCONN_D0_R | Default | d | 0.436 | |
SDCONN_D0_R_FL | Default | d | 0.436 | |
SDCONN_D1 | Default | d | 0.434 | |
SDCONN_D1_R | Default | d | 0.436 | |
SDCONN_D1_R_FL | Default | d | 0.436 | |
SDCONN_D2 | Default | d | 0.438 | |
SDCONN_D2_R | Default | d | 0.440 | |
SDCONN_D2_R_FL | Default | d | 0.440 | |
SDCONN_D3 | Default | d | 0.438 | |
SDCONN_D3_R | Default | d | 0.440 | |
SDCONN_D3_R_FL | Default | d | 0.440 | |
SDCONN_DETECT | Default | d | 0.022 | |
SDCONN_DETECT_R | Default | d | 0.000 | |
SDCONN_SD0_UHS2_N | Default | d | 0.313 | |
SDCONN_SD0_UHS2_P | Default | d | 0.313 | |
SDCONN_SD0_UHS2_R_N | Default | d | 0.315 | |
SDCONN_SD0_UHS2_R_P | Default | d | 0.315 | |
SDCONN_SD1_UHS2_N | Default | d | 0.313 | |
SDCONN_SD1_UHS2_P | Default | d | 0.313 | |
SDCONN_SD1_UHS2_R_N | Default | d | 0.315 | |
SDCONN_SD1_UHS2_R_P | Default | d | 0.315 | |
SDCONN_WP | Default | d | 0.022 | |
SDCONN_WP_R | Default | d | 0.000 | |
SD_PWR_EN | Default | d | 0.568 | |
SD_UHS2_CLKREQ_3V3_L | Default | d | 0.587 | |
SD_UHS2_RESET_3V3_L | Default | d | 0.459 | |
SD_UHS2_RESET_L | Default | d | 0.316 | |
SENSE_PPDCIN_DEBUG | Default | d | OL | |
SE_CTLR_FW_DWLD | Default | d | 0.473 | |
SE_DEV_WAKE | Default | d | 0.473 | |
SE_PWR_EN | Default | d | 0.745 | |
SGPIO_PMU_CLVR_CLK | Default | d | 0.464 | |
SGPIO_PMU_CLVR_CLK_R | Default | d | 0.485 | |
SGPIO_PMU_DATA | Default | d | 0.463 | |
SGPIO_PMU_DATA_R | Default | d | 0.485 | |
SGPIO_PMU_SPMU_CLK | Default | d | 0.727 | |
SGPIO_PMU_SPMU_CLK_R | Default | d | 0.726 | |
SGPIO_PMU_SPMU_DATA | Default | d | 0.485 | |
SMBUS_BATT_SCL | Default | d | 0.534 | |
SMBUS_BATT_SDA | Default | d | 0.531 | |
SMC_FAN_0_PWM | Default | d | 0.313 | |
SMC_FAN_0_TACH | Default | d | 0.317 | |
SMC_FAN_1_PWM | Default | d | 0.314 | |
SMC_FAN_1_TACH | Default | d | 0.314 | |
SOC_DBG_PROBE_VALID | Default | d | 0.311 | |
SOC_DFU_STATUS | Default | d | 0.318 | |
SOC_DOCK_CONNECT | Default | d | 0.314 | |
SOC_DOCK_CONNECT_VITAMINC | Default | d | OL | |
SOC_DOMAIN_AGPIO_AOP0 | Default | d | 0.312 | |
SOC_DOMAIN_NGPIO_AOP1_2 | Default | d | 0.310 | |
SOC_FORCE_DFU | Default | d | 0.316 | |
SOC_HOLD_RESET | Default | d | 0.312 | |
SOC_JTAG_SEL | Default | d | 0.313 | |
SOC_KIS_DFU_SELECT | Default | d | 0.314 | |
SOC_REQUEST_DFU2_L | Default | d | 0.314 | |
SOC_SOCHOT_L | Default | d | 0.313 | |
SOC_STOP_CLK_L | Default | d | 0.309 | |
SOC_SW_DBG | Default | d | 0.316 | |
SOC_TESTMODE | Default | d | 0.361 | |
SOC_THMSNS_1 | Default | d | 0.771 | |
SOC_WDOG_L | Default | d | 0.310 | |
SPI_AOP_IMU_MOSI_1V8 | Default | d | 0.505 | |
SPI_AOP_IMU_SCLK_1V8 | Default | d | 0.497 | |
SPI_AOP_LAS_IMU_MISO_1V8 | Default | d | 0.730 | |
SPI_AOP_LAS_MISO_1V8_R | Default | d | 0.750 | |
SPI_AOP_LAS_MOSI_1V8 | Default | d | 0.517 | |
SPI_AOP_LAS_SCLK_1V8 | Default | d | 0.512 | |
SPI_AOP_SENSOR_CLK | Default | d | 0.329 | |
SPI_AOP_SENSOR_MISO | Default | d | 0.320 | |
SPI_AOP_SENSOR_MISO_R | Default | d | 0.340 | |
SPI_AOP_SENSOR_MOSI | Default | d | 0.330 | |
SPI_AOP_SENSOR_MOSI_1V8_R | Default | d | 0.488 | |
SPI_AOP_SENSOR_MOSI_R | Default | d | 0.311 | |
SPI_AOP_SENSOR_SCLK_1V8_R | Default | d | 0.485 | |
SPI_AOP_SENSOR_SCLK_R | Default | d | 0.310 | |
SPI_ATCRTMR0_R_CLK | Default | d | 0.559 | |
SPI_ATCRTMR0_R_CS_L | Default | d | 0.573 | |
SPI_ATCRTMR0_R_MISO | Default | d | 0.570 | |
SPI_ATCRTMR0_R_MOSI | Default | d | 0.578 | |
SPI_ATCRTMR1_R_CLK | Default | d | 0.560 | |
SPI_ATCRTMR1_R_CS_L | Default | d | 0.574 | |
SPI_ATCRTMR1_R_MISO | Default | d | 0.570 | |
SPI_ATCRTMR1_R_MOSI | Default | d | 0.580 | |
SPI_ATCRTMR2_R_CLK | Default | d | 0.575 | |
SPI_ATCRTMR2_R_MISO | Default | d | 0.594 | |
SPI_ATCRTMR2_R_MOSI | Default | d | 0.597 | |
SPI_DISP_BKLT_CLK | Default | d | 0.332 | |
SPI_DISP_BKLT_CLK_CONN | Default | d | 0.330 | |
SPI_DISP_BKLT_CLK_R | Default | d | 0.311 | |
SPI_DISP_BKLT_CS_L | Default | d | 0.316 | |
SPI_DISP_BKLT_MISO | Default | d | 0.313 | |
SPI_DISP_BKLT_MISO_CONN | Default | d | 0.313 | |
SPI_DISP_BKLT_MOSI | Default | d | 0.336 | |
SPI_DISP_BKLT_MOSI_CONN | Default | d | 0.336 | |
SPI_DISP_BKLT_MOSI_R | Default | d | 0.315 | |
SPI_DP2HDMI_CLK | Default | d | 0.453 | |
SPI_DP2HDMI_CS_L | Default | d | 0.529 | |
SPI_DP2HDMI_DI | Default | d | 0.449 | |
SPI_DP2HDMI_DI_R | Default | d | 0.441 | |
SPI_DP2HDMI_DO | Default | d | 0.442 | |
SPI_DP2HDMI_HOLD_L_1V8 | Default | d | 0.430 | |
SPI_DP2HDMI_WP_L | Default | d | 0.443 | |
SPI_GYRO_CS_1V8_L | Default | d | 0.463 | |
SPI_GYRO_CS_L | Default | d | 0.309 | |
SPI_IPD_CLK | Default | d | 0.334 | |
SPI_IPD_CS_L | Default | d | 0.315 | |
SPI_IPD_MISO | Default | d | 0.315 | |
SPI_IPD_MISO_R | Default | d | 0.334 | |
SPI_IPD_MOSI | Default | d | 0.330 | |
SPI_LAS_CS_1V8_L | Default | d | 0.466 | |
SPI_LAS_CS_L | Default | d | 0.316 | |
SPI_SOCROM_1V8_CLK | Default | d | 0.603 | |
SPI_SOCROM_1V8_CLK_R | Default | d | 0.583 | |
SPI_SOCROM_1V8_CS_L | Default | d | 0.461 | |
SPI_SOCROM_1V8_MISO | Default | d | 0.441 | |
SPI_SOCROM_1V8_MISO_R | Default | d | 0.451 | |
SPI_SOCROM_1V8_MOSI | Default | d | 0.463 | |
SPI_SOCROM_1V8_MOSI_R | Default | d | 0.481 | |
SPI_SOCROM_CS_L | Default | d | 0.316 | |
SPI_SOCROM_MISO | Default | d | 0.315 | |
SPI_SOCROM_MISO_R | Default | d | 0.344 | |
SPI_SOCROM_WP_L | Default | d | 0.520 | |
SPI_TCON_CLK | Default | d | 0.346 | |
SPI_TCON_CLK_CONN | Default | d | 0.346 | |
SPI_TCON_CS_L | Default | d | 0.316 | |
SPI_TCON_MISO | Default | d | 0.315 | |
SPI_TCON_MISO_CONN | Default | d | 0.317 | |
SPI_TCON_MOSI | Default | d | 0.350 | |
SPI_TCON_MOSI_CONN | Default | d | 0.350 | |
SPI_TOUCHID_CLK | Default | d | 0.335 | |
SPI_TOUCHID_CLK_1V8 | Default | d | 0.522 | |
SPI_TOUCHID_CLK_1V8_CONN | Default | d | 0.523 | |
SPI_TOUCHID_CLK_1V8_R | Default | d | 0.487 | |
SPI_TOUCHID_MISO_1V8 | Default | d | 0.810 | |
SPI_TOUCHID_MISO_1V8_CONN | Default | d | 0.810 | |
SPI_TOUCHID_MOSI | Default | d | 0.337 | |
SPI_TOUCHID_MOSI_1V8 | Default | d | 0.525 | |
SPI_TOUCHID_MOSI_1V8_CONN | Default | d | 0.521 | |
SPI_TOUCHID_MOSI_1V8_R | Default | d | 0.488 | |
SPI_TPAD_CLK_CONN | Default | d | 0.500 | |
SPI_TPAD_CLK_CONN_R | Default | d | 0.478 | |
SPI_TPAD_CS_CONN_L | Default | d | 0.566 | |
SPI_TPAD_EN_CONN | Default | d | 0.645 | |
SPI_TPAD_INT_CONN_L | Default | d | 0.576 | |
SPI_TPAD_MISO_CONN | Default | d | 0.485 | |
SPI_TPAD_MOSI_CONN | Default | d | 0.500 | |
SPI_TPAD_MOSI_CONN_R | Default | d | 0.478 | |
SPI_UPC0_CLK | Default | d | 0.555 | |
SPI_UPC0_CLK_DBG | Default | d | 0.655 | |
SPI_UPC0_CS_L | Default | d | 0.570 | |
SPI_UPC0_MISO | Default | d | 0.570 | |
SPI_UPC0_MOSI | Default | d | 0.580 | |
SPI_UPC0_R_CLK | Default | d | 0.570 | |
SPI_UPC0_R_CS_L | Default | d | 0.587 | |
SPI_UPC0_R_MISO | Default | d | 0.585 | |
SPI_UPC0_R_MOSI | Default | d | 0.590 | |
SPI_UPC1_CLK | Default | d | 0.600 | |
SPI_UPC1_CS_L | Default | d | 0.675 | |
SPI_UPC1_MISO | Default | d | 0.680 | |
SPI_UPC1_MOSI | Default | d | 0.690 | |
SPI_UPC1_R_CLK | Default | d | 0.616 | |
SPI_UPC1_R_CS_L | Default | d | 0.679 | |
SPI_UPC1_R_MISO | Default | d | 0.689 | |
SPI_UPC1_R_MOSI | Default | d | 0.690 | |
SPI_UPC23_CLK | Default | d | 0.569 | |
SPI_UPC23_CLK_DBG | Default | d | 0.670 | |
SPI_UPC23_CS_L | Default | d | 0.600 | |
SPI_UPC23_MISO | Default | d | 0.603 | |
SPI_UPC23_MOSI | Default | d | 0.607 | |
SPI_UPC23_R_CLK | Default | d | 0.585 | |
SPI_UPC23_R_CS_L | Default | d | 0.613 | |
SPI_UPC23_R_MISO | Default | d | 0.616 | |
SPI_UPC23_R_MOSI | Default | d | 0.619 | |
SPI_UPC5_CLK | Default | d | 0.600 | |
SPI_UPC5_CS_L | Default | d | 0.680 | |
SPI_UPC5_MISO | Default | d | 0.680 | |
SPI_UPC5_MOSI | Default | d | 0.690 | |
SPI_UPC5_R_CLK | Default | d | 0.613 | |
SPI_UPC5_R_MOSI | Default | d | 0.687 | |
SPKRAMP_ABC_ICC | Default | d | 0.420 | |
SPKRAMP_A_ADDR | Default | d | 0.000 | |
SPKRAMP_A_BOOTN | Default | d | 0.730 | |
SPKRAMP_A_BOOTP | Default | d | 0.730 | |
SPKRAMP_A_DREG | Default | d | 0.565 | |
SPKRAMP_A_ICC_R | Default | d | 0.433 | |
SPKRAMP_A_OUTN | Default | d | 0.471 | |
SPKRAMP_A_OUTN_R | Default | d | 0.471 | |
SPKRAMP_A_OUTP | Default | d | 0.472 | |
SPKRAMP_A_OUTP_R | Default | d | 0.472 | |
SPKRAMP_A_VSENSEN | Default | d | 0.471 | |
SPKRAMP_A_VSENSEP | Default | d | 0.472 | |
SPKRAMP_B_ADDR | Default | d | 0.407 | |
SPKRAMP_B_BOOTN | Default | d | 0.730 | |
SPKRAMP_B_BOOTP | Default | d | 0.730 | |
SPKRAMP_B_DREG | Default | d | 0.565 | |
SPKRAMP_B_ICC_R | Default | d | 0.433 | |
SPKRAMP_B_OUTN | Default | d | 0.470 | |
SPKRAMP_B_OUTN_R | Default | d | 0.470 | |
SPKRAMP_B_OUTP | Default | d | 0.472 | |
SPKRAMP_B_OUTP_R | Default | d | 0.472 | |
SPKRAMP_B_VSENSEN | Default | d | 0.470 | |
SPKRAMP_B_VSENSEP | Default | d | 0.472 | |
SPKRAMP_C_ADDR | Default | d | 0.470 | |
SPKRAMP_C_BOOTN | Default | d | 0.730 | |
SPKRAMP_C_BOOTP | Default | d | 0.730 | |
SPKRAMP_C_DREG | Default | d | 0.565 | |
SPKRAMP_C_ICC_R | Default | d | 0.433 | |
SPKRAMP_C_OUTN | Default | d | 0.468 | |
SPKRAMP_C_OUTN_R | Default | d | 0.468 | |
SPKRAMP_C_OUTP | Default | d | 0.470 | |
SPKRAMP_C_OUTP_R | Default | d | 0.470 | |
SPKRAMP_C_VSENSEN | Default | d | 0.468 | |
SPKRAMP_C_VSENSEP | Default | d | 0.470 | |
SPKRAMP_DEF_ICC_R | Default | d | 0.418 | |
SPKRAMP_D_ADDR | Default | d | 0.468 | |
SPKRAMP_D_BOOTN | Default | d | 0.728 | |
SPKRAMP_D_BOOTP | Default | d | 0.728 | |
SPKRAMP_D_DREG | Default | d | 0.563 | |
SPKRAMP_D_ICC_R | Default | d | 0.430 | |
SPKRAMP_D_OUTN | Default | d | 0.466 | |
SPKRAMP_D_OUTN_R | Default | d | 0.466 | |
SPKRAMP_D_OUTP | Default | d | 0.468 | |
SPKRAMP_D_OUTP_R | Default | d | 0.466 | |
SPKRAMP_D_VSENSEN | Default | d | 0.466 | |
SPKRAMP_D_VSENSEP | Default | d | 0.468 | |
SPKRAMP_E_ADDR | Default | d | 0.478 | |
SPKRAMP_E_BOOTN | Default | d | 0.727 | |
SPKRAMP_E_BOOTP | Default | d | 0.727 | |
SPKRAMP_E_DREG | Default | d | 0.564 | |
SPKRAMP_E_ICC_R | Default | d | 0.431 | |
SPKRAMP_E_OUTN | Default | d | 0.463 | |
SPKRAMP_E_OUTN_R | Default | d | 0.463 | |
SPKRAMP_E_OUTP | Default | d | 0.465 | |
SPKRAMP_E_OUTP_R | Default | d | 0.463 | |
SPKRAMP_E_VSENSEN | Default | d | 0.463 | |
SPKRAMP_E_VSENSEP | Default | d | 0.465 | |
SPKRAMP_F_ADDR | Default | d | 0.476 | |
SPKRAMP_F_BOOTN | Default | d | 0.728 | |
SPKRAMP_F_BOOTP | Default | d | 0.728 | |
SPKRAMP_F_DREG | Default | d | 0.564 | |
SPKRAMP_F_ICC_R | Default | d | 0.431 | |
SPKRAMP_F_OUTN | Default | d | 0.461 | |
SPKRAMP_F_OUTN_R | Default | d | 0.461 | |
SPKRAMP_F_OUTP | Default | d | 0.462 | |
SPKRAMP_F_OUTP_R | Default | d | 0.461 | |
SPKRAMP_F_VSENSEN | Default | d | 0.461 | |
SPKRAMP_F_VSENSEP | Default | d | 0.462 | |
SPKRAMP_ICC | Default | d | 0.416 | |
SPKRAMP_INT_L | Default | d | 0.315 | |
SPKRAMP_RESET_L | Default | d | 0.315 | |
SPKR_ID0 | Default | d | 0.320 | |
SPKR_ID1 | Default | d | 0.321 | |
SPMI_DISP_BKLT_CLK | Default | d | 0.335 | |
SPMI_DISP_BKLT_CLK_R | Default | d | 0.312 | |
SPMI_DISP_BKLT_DATA | Default | d | 0.331 | |
SPMI_DISP_BKLT_DATA_R | Default | d | 0.310 | |
SPMI_SE_CLK | Default | d | 0.334 | |
SPMI_SE_CLK_R | Default | d | 0.319 | |
SPMI_SE_DATA | Default | d | 0.319 | |
SPMI_SE_DATA_R | Default | d | 0.306 | |
SPMU_3V8_IOUT | Default | d | 0.715 | |
SPMU_3V8_ISENSE | Default | d | 0.738 | |
SPMU_BUCK0_LX0 | Default | d | 0.231 | |
SPMU_BUCK0_LX0 | Default | r | 76.000R | |
SPMU_BUCK0_LX1 | Default | d | 0.231 | |
SPMU_BUCK0_LX1 | Default | r | 76.000R | |
SPMU_BUCK0_LX2 | Default | d | 0.231 | |
SPMU_BUCK0_LX2 | Default | r | 76.000R | |
SPMU_BUCK0_LX3 | Default | d | 0.231 | |
SPMU_BUCK0_LX3 | Default | r | 76.000R | |
SPMU_BUCK10_LX0 | Default | d | 0.199 | |
SPMU_BUCK10_LX1 | Default | d | 0.199 | |
SPMU_BUCK10_LX2 | Default | d | 0.199 | |
SPMU_BUCK10_LX2 | Default | r | 68.000R | |
SPMU_BUCK1_FB | Default | d | 0.135 | |
SPMU_BUCK1_FB_R | Default | d | 0.135 | |
SPMU_BUCK1_LX0 | Default | d | 0.140 | |
SPMU_BUCK1_LX0 | Default | r | 192.000R | |
SPMU_BUCK1_LX1 | Default | d | 0.140 | |
SPMU_BUCK1_LX1 | Default | r | 192.000 | |
SPMU_BUCK2_LX0 | Default | d | 0.335 | |
SPMU_BUCK2_LX0 | Default | r | 0.001R | |
SPMU_BUCK3_FB | Default | d | 0.255 | |
SPMU_BUCK3_FB_R | Default | d | 0.258 | |
SPMU_BUCK3_LX0 | Default | d | 0.258 | |
SPMU_BUCK3_LX0 | Default | r | 0.006R | |
SPMU_BUCK4_LX0 | Default | d | 0.056 | |
SPMU_BUCK4_LX0 | Default | r | 207.000R | |
SPMU_BUCK4_LX1 | Default | d | 0.056 | |
SPMU_BUCK4_LX1 | Default | r | 207.000R | |
SPMU_BUCK4_LX2 | Default | d | 0.056 | |
SPMU_BUCK4_LX2 | Default | r | 207.000R | |
SPMU_BUCK4_LX3 | Default | d | 0.056 | |
SPMU_BUCK4_LX3 | Default | r | 207.000R | |
SPMU_BUCK5_LX0 | Default | d | 0.130 | |
SPMU_BUCK5_LX0 | Default | r | 47.000R | |
SPMU_BUCK5_LX1 | Default | d | 0.130 | |
SPMU_BUCK5_LX1 | Default | r | 47.000R | |
SPMU_BUCK5_LX2 | Default | d | 0.130 | |
SPMU_BUCK5_LX2 | Default | r | 47.000R | |
SPMU_BUCK5_LX3 | Default | d | 0.130 | |
SPMU_BUCK5_LX3 | Default | r | 47.000R | |
SPMU_BUCK6_LX0 | Default | d | 0.192 | |
SPMU_BUCK6_LX0 | Default | r | 647.000 | |
SPMU_BUCK8_LX0 | Default | d | 0.254 | |
SPMU_BUCK8_LX0 | Default | r | 0.003R | |
SPMU_BUCK9_LX0 | Default | d | 0.446 | |
SPMU_BUCK9_LX0 | Default | r | 0.007R | |
SPMU_IREF | Default | d | 0.749 | |
SPMU_TCAL | Default | d | 0.771 | |
SPMU_THMSNS | Default | d | 0.770 | |
SPMU_VREF1V2 | Default | d | 0.620 | |
SWD_CLVR_SWCLK | Default | d | 0.330 | |
SWD_CLVR_SWCLK_R | Default | d | 0.315 | |
SWD_CLVR_SWDIO | Default | d | 0.327 | |
SWD_CLVR_SWDIO_R | Default | d | 0.313 | |
SWD_NAND0_S5E0_S5E1_SWCLK | Default | d | 0.309 | |
SWD_NAND0_S5E0_S5E1_SWDIO | Default | d | 0.301 | |
SWD_NAND0_S5E2_S5E3_SWCLK | Default | d | 0.311 | |
SWD_NAND0_S5E2_S5E3_SWDIO | Default | d | 0.302 | |
SWD_NAND0_SWCLK | Default | d | 0.302 | |
SWD_NAND0_SWCLK_R | Default | d | 0.299 | |
SWD_NAND0_SWDIO | Default | d | 0.296 | |
SWD_NAND0_SWDIO_R | Default | d | 0.295 | |
SWD_NAND1_SWCLK | Default | d | 0.331 | |
SWD_NAND1_SWCLK_R | Default | d | 0.314 | |
SWD_NAND1_SWDIO | Default | d | 0.335 | |
SWD_NAND1_SWDIO_R | Default | d | 0.314 | |
SWD_SOC_SWCLK | Default | d | 0.334 | |
SWD_SOC_SWCLK_R | Default | d | 0.311 | |
SWD_SOC_SWDIO | Default | d | 0.330 | |
SWD_SOC_SWDIO_R | Default | d | 0.311 | |
SWD_UPC_SWCLK0 | Default | d | 0.356 | |
SWD_UPC_SWCLK1 | Default | d | 0.360 | |
SWD_UPC_SWCLK_R | Default | d | 0.310 | |
SWD_UPC_SWDIO0 | Default | d | 0.342 | |
SWD_UPC_SWDIO0_R | Default | d | 0.312 | |
SWD_UPC_SWDIO1 | Default | d | 0.340 | |
SWD_UPC_SWDIO2 | Default | d | 0.340 | |
SWD_UPC_SWDIO2_R | Default | d | 0.314 | |
SWD_UPC_SWDIO3 | Default | d | 0.345 | |
SWD_UPC_SWDIO3_R | Default | d | 0.323 | |
SYS_ALIVE_BUFF | Default | d | OL | |
SYS_DETECT | Default | d | OL | |
SYS_DETECT_L | Default | d | 0.528 | |
TDM_CODEC_BCLK | Default | d | 0.334 | |
TDM_CODEC_D2R | Default | d | 0.317 | |
TDM_CODEC_D2R_R | Default | d | 0.348 | |
TDM_CODEC_FSYNC | Default | d | 0.337 | |
TDM_CODEC_R2D | Default | d | 0.332 | |
TDM_SPKRAMP_A_D2R_R | Default | d | 0.347 | |
TDM_SPKRAMP_B_D2R_R | Default | d | 0.348 | |
TDM_SPKRAMP_C_D2R_R | Default | d | 0.350 | |
TDM_SPKRAMP_D_D2R_R | Default | d | 0.348 | |
TDM_SPKRAMP_E_D2R_R | Default | d | 0.348 | |
TDM_SPKRAMP_F_D2R_R | Default | d | 0.349 | |
TDM_SPKRAMP_L_BCLK | Default | d | 0.336 | |
TDM_SPKRAMP_L_D2R | Default | d | 0.315 | |
TDM_SPKRAMP_L_FSYNC | Default | d | 0.336 | |
TDM_SPKRAMP_L_R2D | Default | d | 0.334 | |
TDM_SPKRAMP_R_BCLK | Default | d | 0.331 | |
TDM_SPKRAMP_R_D2R | Default | d | 0.317 | |
TDM_SPKRAMP_R_FSYNC | Default | d | 0.334 | |
TDM_SPKRAMP_R_R2D | Default | d | 0.331 | |
THMSNS_MPMU1_N | Default | d | 0.002 | |
THMSNS_MPMU1_P | Default | d | 0.770 | |
THMSNS_MPMU2_N | Default | d | 0.000 | |
THMSNS_MPMU2_P | Default | d | 0.773 | |
THMSNS_MPMU3_N | Default | d | 0.000 | |
THMSNS_MPMU3_P | Default | d | 0.773 | |
THMSNS_MPMU4_N | Default | d | 0.000 | |
THMSNS_MPMU4_P | Default | d | 0.776 | |
THMSNS_MPMU5_N | Default | d | 0.000 | |
THMSNS_MPMU5_P | Default | d | 0.777 | |
THMSNS_MPMU6_N | Default | d | 0.000 | |
THMSNS_MPMU6_P | Default | d | 0.772 | |
THMSNS_MPMU7_N | Default | d | 0.000 | |
THMSNS_MPMU7_P | Default | d | 0.771 | |
THMSNS_MPMU8_N | Default | d | 0.000 | |
THMSNS_MPMU8_P | Default | d | 0.777 | |
THMSNS_MPMU_VSS | Default | d | 0.000 | |
THMSNS_SPMU1_N | Default | d | 0.000 | |
THMSNS_SPMU1_P | Default | d | 0.772 | |
THMSNS_SPMU2_N | Default | d | 0.000 | |
THMSNS_SPMU2_P | Default | d | 0.770 | |
THMSNS_SPMU3_N | Default | d | 0.000 | |
THMSNS_SPMU3_P | Default | d | 0.772 | |
THMSNS_SPMU4_N | Default | d | 0.000 | |
THMSNS_SPMU4_P | Default | d | 0.775 | |
THMSNS_SPMU5_N | Default | d | 0.005 | |
THMSNS_SPMU5_P | Default | d | 0.780 | |
THMSNS_SPMU6_N | Default | d | 0.000 | |
THMSNS_SPMU6_P | Default | d | 0.770 | |
THMSNS_SPMU7_N | Default | d | 0.000 | |
THMSNS_SPMU7_P | Default | d | 0.770 | |
THMSNS_SPMU8_N | Default | d | 0.000 | |
THMSNS_SPMU8_P | Default | d | 0.773 | |
THMSNS_SPMU_VSS | Default | d | 0.000 | |
TOUCHID_BKLT_LED1 | Default | d | 0.000 | |
TOUCHID_BKLT_LED2 | Default | d | 0.000 | |
TOUCHID_BKLT_LED3 | Default | d | 0.000 | |
TOUCHID_BKLT_LED4 | Default | d | 0.000 | |
TOUCHID_BKLT_PWM | Default | d | 0.316 | |
TOUCHID_BOOST_EN | Default | d | 0.552 | |
TOUCHID_BOOST_EN_CONN | Default | d | 0.539 | |
TOUCHID_INT | Default | d | 0.308 | |
TOUCHID_INT_1V8_CONN | Default | d | 0.977 | |
TOUCHID_PWR_EN | Default | d | 0.317 | |
TPT_WLAN_JTAG_TCK | Default | d | 0.613 | |
TPT_WLAN_JTAG_TDI | Default | d | 0.611 | |
TPT_WLAN_JTAG_TMS | Default | d | 0.613 | |
TPT_WLAN_JTAG_TRSTN | Default | d | 0.612 | |
TP_BMON_IOUT | Default | d | OL | |
TP_FAN_0_OTP1 | Default | d | OL | |
TP_FAN_0_OTP2 | Default | d | OL | |
TP_FAN_1_OTP1 | Default | d | OL | |
TP_FAN_1_OTP2 | Default | d | OL | |
TP_NAND0_S5E0_ANI0_VREF | Default | d | 0.340 | |
TP_NAND0_S5E0_ANI1_VREF | Default | d | 0.604 | |
TP_NAND0_S5E0_JTAG_TDI | Default | d | 0.371 | |
TP_NAND0_S5E1_ANI0_VREF | Default | d | 0.564 | |
TP_NAND0_S5E1_ANI1_VREF | Default | d | 0.565 | |
TP_NAND0_S5E2_ANI0_VREF | Default | d | 0.579 | |
TP_NAND0_S5E2_ANI1_VREF | Default | d | 0.578 | |
TP_NAND0_S5E3_ANI0_VREF | Default | d | 0.352 | |
TP_NAND0_S5E3_ANI1_VREF | Default | d | 0.578 | |
TP_NAND0_S5E3_JTAG_TDO | Default | d | 0.353 | |
TP_SPKRAMP_D_LV_EN | Default | d | 0.476 | |
TP_USBC0_PP20V | Default | d | OL | |
TP_USBC1_PP20V | Default | d | OL | |
TP_USBC2_PP20V | Default | d | OL | |
UART_SE_R2D | Default | d | 0.456 | |
UART_SE_R2D_RTS_L | Default | d | 0.458 | |
UART_TCON_D2R_1V8 | Default | d | 0.809 | |
UART_UPC0_TX | Default | d | 0.546 | |
UART_UPC1_TX | Default | d | 0.550 | |
UART_UPC2_TX_RX | Default | d | 0.547 | |
UART_UPC5 | Default | d | 0.550 | |
UART_WLAN_D2R_CTS_L_R | Default | d | 0.609 | |
UART_WLAN_D2R_R | Default | d | 0.611 | |
UART_WLAN_R2D_R | Default | d | 0.613 | |
UART_WLAN_R2D_RTS_L_R | Default | d | 0.611 | |
UPC01_5V_EN | Default | d | 0.626 | |
UPC0_BUSPOWER | Default | d | 0.000 | |
UPC0_GPIO7 | Default | d | 0.415 | |
UPC0_R_OSC | Default | d | 0.477 | |
UPC0_SER_DBG | Default | d | 0.680 | |
UPC0_SS | Default | d | 0.573 | |
UPC1_BUSPOWER | Default | d | 0.000 | |
UPC1_R_OSC | Default | d | 0.480 | |
UPC1_SER_DBG | Default | d | 0.544 | |
UPC1_SS | Default | d | 0.580 | |
UPC23_5V_EN | Default | d | 0.670 | |
UPC2_BUSPOWER | Default | d | 0.000 | |
UPC2_I2C_ADDR | Default | d | 0.000 | |
UPC2_R_OSC | Default | d | 0.477 | |
UPC2_SER_DBG | Default | d | 0.677 | |
UPC2_SS | Default | d | 0.577 | |
UPC5_GPIO1 | Default | d | 0.676 | |
UPC5_GPIO10 | Default | d | 0.712 | |
UPC5_GPIO2 | Default | d | 0.698 | |
UPC5_GPIO3 | Default | d | 0.680 | |
UPC5_GPIO4 | Default | d | 0.687 | |
UPC5_GPIO5 | Default | d | 0.683 | |
UPC5_GPIO6 | Default | d | 0.590 | |
UPC5_GPIO7 | Default | d | 0.710 | |
UPC5_GPIO8 | Default | d | 0.685 | |
UPC5_GPIO9 | Default | d | 0.711 | |
UPC5_I2C_ADDR | Default | d | 0.590 | |
UPC5_LV | Default | d | 0.513 | |
UPC5_R_OSC | Default | d | 0.474 | |
UPC5_SER_DBG | Default | d | 0.690 | |
UPC5_SS | Default | d | 0.580 | |
UPC_I2C_INT_L | Default | d | 0.294 | |
UPC_PMU_RESET_1V2 | Default | d | 0.585 | |
UPC_PMU_RESET_1V2_R | Default | d | 0.584 | |
UPC_PMU_RESET_3V3 | Default | d | 0.530 | |
UPC_SMC_I2C_INT_L | Default | d | 0.317 | |
USB0_3V3_LDO_EN_VITC | Default | d | 0.543 | |
USB2_ATC0_LS_MUX_N | Default | d | 0.642 | |
USB2_ATC0_LS_MUX_P | Default | d | 0.670 | |
USB2_ATC0_LS_N | Default | d | 0.666 | |
USB2_ATC0_LS_P | Default | d | 0.673 | |
USB2_ATC1_LS_N | Default | d | 0.675 | |
USB2_ATC1_LS_P | Default | d | 0.670 | |
USB2_UPC0_P1_N | Default | d | 0.673 | |
USB2_UPC0_P1_P | Default | d | 0.674 | |
USB2_UPC1_P1_N | Default | d | 0.675 | |
USB2_UPC1_P1_P | Default | d | 0.670 | |
USB2_UPC2_P1_N | Default | d | 0.672 | |
USB2_UPC2_P1_P | Default | d | 0.671 | |
USBC0_3V3LDO_EN | Default | d | 0.544 | |
USBC0_CC1 | Default | d | 0.450 | |
USBC0_CC1_CONN | Default | d | 0.628 | |
USBC0_CC2 | Default | d | 0.450 | |
USBC0_CC2_CONN | Default | d | 0.629 | |
USBC0_D2R_CR_N<1> | Default | d | OL | |
USBC0_D2R_CR_N<2> | Default | d | OL | |
USBC0_D2R_CR_P<1> | Default | d | OL | |
USBC0_D2R_CR_P<2> | Default | d | OL | |
USBC0_R2D_N<1> | Default | d | OL | |
USBC0_R2D_N<2> | Default | d | OL | |
USBC0_R2D_P<1> | Default | d | OL | |
USBC0_R2D_P<2> | Default | d | OL | |
USBC0_SBU1 | Default | d | 0.658 | |
USBC0_SBU2 | Default | d | 0.654 | |
USBC0_USB_BOT_N | Default | d | 0.763 | |
USBC0_USB_BOT_P | Default | d | 0.765 | |
USBC0_USB_TOP_N | Default | d | 0.763 | |
USBC0_USB_TOP_P | Default | d | 0.764 | |
USBC1_3V3LDO_EN | Default | d | 0.545 | |
USBC1_CC1 | Default | d | 0.455 | |
USBC1_CC1_CONN | Default | d | 0.630 | |
USBC1_CC2 | Default | d | 0.440 | |
USBC1_CC2_CONN | Default | d | 0.630 | |
USBC1_D2R_CR_N<1> | Default | d | OL | |
USBC1_D2R_CR_N<2> | Default | d | OL | |
USBC1_D2R_CR_P<1> | Default | d | OL | |
USBC1_D2R_CR_P<2> | Default | d | OL | |
USBC1_R2D_N<1> | Default | d | OL | |
USBC1_R2D_N<2> | Default | d | OL | |
USBC1_R2D_P<1> | Default | d | OL | |
USBC1_R2D_P<2> | Default | d | OL | |
USBC1_SBU1 | Default | d | 0.657 | |
USBC1_SBU2 | Default | d | 0.656 | |
USBC1_USB_BOT_N | Default | d | 0.763 | |
USBC1_USB_BOT_P | Default | d | 0.768 | |
USBC1_USB_TOP_N | Default | d | 0.766 | |
USBC1_USB_TOP_P | Default | d | 0.766 | |
USBC1_VBIAS_PRT | Default | d | 0.628 | |
USBC2_3V3LDO_EN | Default | d | 0.540 | |
USBC2_CC1 | Default | d | 0.453 | |
USBC2_CC1_CONN | Default | d | 0.627 | |
USBC2_CC2 | Default | d | 0.240 | |
USBC2_CC2_CONN | Default | d | 0.626 | |
USBC2_D2R_CR_N<1> | Default | d | OL | |
USBC2_D2R_CR_N<2> | Default | d | OL | |
USBC2_D2R_CR_P<1> | Default | d | OL | |
USBC2_D2R_CR_P<2> | Default | d | OL | |
USBC2_R2D_N<1> | Default | d | OL | |
USBC2_R2D_N<2> | Default | d | OL | |
USBC2_R2D_P<1> | Default | d | OL | |
USBC2_R2D_P<2> | Default | d | OL | |
USBC2_SBU1 | Default | d | 0.653 | |
USBC2_SBU2 | Default | d | 0.654 | |
USBC2_USB_BOT_N | Default | d | 0.761 | |
USBC2_USB_BOT_P | Default | d | 0.764 | |
USBC2_USB_TOP_N | Default | d | 0.764 | |
USBC2_USB_TOP_P | Default | d | 0.764 | |
USBC2_VBIAS_PRT | Default | d | 0.624 | |
USBC5_CC1 | Default | d | 0.588 | |
USBC5_CC2 | Default | d | 0.590 | |
USBC_ATC0_AUX_C_N | Default | d | 0.735 | |
USBC_ATC0_AUX_C_P | Default | d | 0.720 | |
USBC_ATC0_AUX_N | Default | d | 0.350 | |
USBC_ATC0_AUX_P | Default | d | 0.350 | |
USB_DBG_LS_MUX_N | Default | d | 0.673 | |
USB_DBG_LS_MUX_P | Default | d | 0.672 | |
USB_DBG_LS_N | Default | d | 0.670 | |
USB_DBG_LS_P | Default | d | 0.670 | |
VCCNAND0_HS_ISENSE | Default | d | 0.784 | |
VDDC_SE | Default | d | 0.337 | |
VDDNV_SE | Default | d | 0.367 | |
VDDPLL_SE | Default | d | 0.359 | |
VHV_SE | Default | d | 0.341 | |
VITC_RESET_L | Default | d | OL | |
VREFB_ARDV01 | Default | d | OL | |
VREFB_EUSBLS0 | Default | d | 0.607 | |
VREFB_EUSBLS1 | Default | d | 0.609 | |
VREFB_EUSBLS2 | Default | d | 0.607 | |
VREF_SE | Default | d | 0.768 | |
VSNS_P0V575VDDQ0_SENSE | Default | d | 0.136 | |
VSNS_P0V575VSSQ0_SENSE | Default | d | 0.001 | |
VSNS_PVDD2H0S2SW_SENSE1 | Default | d | 0.069 | |
VSNS_PVDDGPU0AWAKESW_SENSE | Default | d | 0.028 | |
VSNS_PVDDPCPU0AWAKESW_SENSE | Default | d | 0.042 | |
VSNS_PVSS2H0S2SW_SENSE1 | Default | d | 0.000 | |
VSNS_PVSSGPU0AWAKESW_SENSE | Default | d | 0.001 | |
VSNS_PVSSPCPU0AWAKESW_SENSE | Default | d | 0.002 | |
VSS_ANA_MPMU | Default | d | 0.000 | |
VSS_ANA_SPMU | Default | d | 0.000 | |
VUP_SE | Default | d | 0.572 | |
WING_L_THMSNS | Default | d | 0.770 | |
WING_R_THMSNS | Default | d | 0.777 | |
WLAN_JTAG_SEL | Default | d | 0.605 | |
WLAN_TIME_SYNC | Default | d | 0.316 | |
WLBT_CLKREQ_L | Default | d | 0.316 | |
WLBT_CLKREQ_R_L | Default | d | 0.521 | |
WLBT_THMSNS | Default | d | 0.773 | |
WL_GPIO_7 | Default | d | 0.613 | |