Netname | Condition | Type | Value | Comment |
5V_S2_MAIN_R | Default | d | 0.770 | |
5V_S2_SW_GATE | Default | d | OL | |
ACT_GND | Default | d | 0.000 | |
AGND_P2V5_NAND0 | Default | d | 0.000 | |
AGND_P2V5_NAND1 | Default | d | 0.000 | |
AGND_P5VUSBC23 | Default | d | 0.000 | |
AIRFLOW_C_THMSNS | Default | d | 0.773 | |
AIRFLOW_L_THMSNS | Default | d | 0.780 | |
AIRFLOW_R_THMSNS | Default | d | 0.775 | |
ALS_INT_L | Default | d | 0.300 | |
AOP_HDMI_CEC_R | Default | d | 0.300 | |
ATCRTMR01_ACTIVE_READY_3V3 | Default | d | 0.440 | |
ATCRTMR0_FORCE_PWR | Default | d | 0.580 | |
ATCRTMR0_RESET_1V8_R_L | Default | d | 0.475 | |
ATCRTMR0_RESET_L | Default | d | 0.664 | |
ATCRTMR0_RESET_MUX_1V8_L | Default | d | 0.475 | |
ATCRTMR0_XTAL25M_IN | Default | d | 0.830 | |
ATCRTMR0_XTAL25M_IN_R | Default | d | 0.833 | |
ATCRTMR0_XTAL25M_OUT | Default | d | 0.790 | |
ATCRTMR0_XTAL25M_OUT_R | Default | d | 0.787 | |
ATCRTMR1_FORCE_PWR | Default | d | 0.585 | |
ATCRTMR1_XTAL25M_IN_R | Default | d | 0.833 | |
ATCRTMR1_XTAL25M_OUT_R | Default | d | 0.787 | |
ATCRTMR23_ACTIVE_READY_3V3 | Default | d | 0.442 | |
ATCRTMR2_FORCE_PWR | Default | d | 0.600 | |
ATCRTMR2_RBIAS | Default | d | 0.776 | |
ATCRTMR2_RSENSE | Default | d | 0.000 | |
AUDIO_JACK_CH_GND | Default | d | 0.000 | |
AUDIO_JACK_CH_MIC | Default | d | 0.640 | |
AUDIO_JACK_GB_GND | Default | d | 0.000 | |
AUDIO_JACK_GB_MIC | Default | d | 0.640 | |
AUDIO_JACK_LEFT_OUT | Default | d | 0.818 | |
AUDIO_JACK_LEFT_SNS | Default | d | 1.700 | |
AUDIO_JACK_RIGHT_OUT | Default | d | 0.818 | |
AUDIO_JACK_RIGHT_SNS | Default | d | 2.000 | |
AUDIO_JACK_RING_SNS | Default | d | 0.650 | |
AUDIO_JACK_TIP_SNS | Default | d | OL | |
AUD_CONN_HP_LEFT | Default | d | 0.818 | |
AUD_CONN_HP_RIGHT | Default | d | 0.818 | |
AUD_CONN_HP_SENSE_L | Default | d | 1.700 | |
AUD_CONN_HP_SENSE_R | Default | d | 2.000 | |
AUD_CONN_RING2 | Default | d | 0.000 | |
AUD_CONN_RING2_XW | Default | d | 0.640 | |
AUD_CONN_RING_SENSE | Default | d | OL | |
AUD_CONN_SLEEVE | Default | d | 0.000 | |
AUD_CONN_SLEEVE_XW | Default | d | 0.640 | |
AUD_CONN_TIP_SENSE | Default | d | OL | |
AUD_DMIC0_CLK_CONN | Default | d | 0.488 | |
AUD_DMIC0_DATA_CONN | Default | d | 0.645 | |
AUD_DMIC1_CLK_CONN | Default | d | 0.486 | |
AUD_DMIC1_DATA_CONN | Default | d | 0.643 | |
AUX_DET_SHORT | Default | d | 0.600 | |
BKLT_BOOST_THROTTLE_CONN_L | Default | d | 0.620 | |
BKLT_BOOST_THROTTLE_CONN_L | Default | r | 0.000R | |
BKLT_BOOST_THROTTLE_LUXE_L | Default | d | 0.620 | |
BKLT_BOOST_THROTTLE_LUXE_L | Default | r | 0.000R | |
BKLT_BOOST_THROTTLE_R_L | Default | r | 0.000R | |
BKLT_HS_IOUT | Default | d | 0.722 | |
BKLT_HS_ISENSE | Default | d | 0.732 | |
BL_PMIC_PWR_EN | Default | d | 0.760 | |
BL_PWR_EN | Default | d | 0.407 | |
BL_PWR_EN_R | Default | d | 0.407 | |
BMON_ISENSE | Default | d | 0.731 | |
CAPSLOCK_LED_EN | Default | d | 0.608 | |
CC1_RG_G | Default | d | 0.375 | |
CC_OV_G | Default | d | 0.780 | |
CEC_FLT | Default | d | 0.776 | |
CEC_FLT_PULL | Default | d | 0.596 | |
CEC_FLT_R | Default | d | 0.766 | |
CEC_PFET_GATE_R | Default | d | OL | |
CHGR_AMON | Default | d | 0.630 | |
CHGR_AUX_DET | Default | d | 0.549 | |
CHGR_AUX_OK | Default | d | 0.624 | |
CHGR_BGATE | Default | d | 0.690 | |
CHGR_BMON | Default | d | 0.630 | |
CHGR_BOOT1 | Default | d | 0.597 | |
CHGR_BOOT1_RC | Default | d | 0.596 | |
CHGR_BOOT2 | Default | d | 0.598 | |
CHGR_BOOT2_RC | Default | d | 0.604 | |
CHGR_COMP | Default | d | 0.632 | |
CHGR_CSI_FILT_N | Default | d | 0.622 | |
CHGR_CSI_FILT_P | Default | d | 0.622 | |
CHGR_CSI_N | Default | d | 0.620 | |
CHGR_CSI_P | Default | d | 0.620 | |
CHGR_CSO1_N | Default | d | 0.480 | |
CHGR_CSO1_P | Default | d | 0.480 | |
CHGR_CSO_FILT_N | Default | d | 0.487 | |
CHGR_CSO_FILT_P | Default | d | 0.486 | |
CHGR_CSO_N | Default | d | 0.480 | |
CHGR_CSO_P | Default | d | 0.480 | |
CHGR_GATE_Q1 | Default | d | 0.920 | |
CHGR_GATE_Q2 | Default | d | 0.440 | |
CHGR_INT_1V8_L | Default | d | 0.613 | |
CHGR_LL | Default | d | 0.485 | |
CHGR_LL | Default | r | 0.280R | |
CHGR_LX2 | Default | d | 0.485 | |
CHGR_PHASE1 | Default | d | 0.485 | |
CHGR_PHASE1 | Default | r | 0.280R | |
CHGR_PHASE2 | Default | d | 0.485 | |
CHGR_PHASE2 | Default | r | 0.280R | |
CHGR_RST_IN | Default | d | 0.550 | |
CHGR_VBAT | Default | d | 0.700 | |
CHGR_VBAT_XW | Default | d | 1.626 | |
CIO_ATC0_LSRX_1V2 | Default | d | 0.300 | |
CIO_ATC0_LSRX_3V3 | Default | d | 0.722 | |
CIO_ATC0_LSTX_1V2 | Default | d | 0.300 | |
CIO_ATC0_LSTX_3V3 | Default | d | 0.444 | |
CIO_ATC1_LSRX_1V2 | Default | d | 0.305 | |
CIO_ATC1_LSRX_3V3 | Default | d | 0.715 | |
CIO_ATC1_LSTX_1V2 | Default | d | 0.303 | |
CIO_ATC1_LSTX_3V3 | Default | d | 0.444 | |
CIO_ATC2_LSRX_1V2 | Default | d | 0.300 | |
CIO_ATC2_LSTX_1V2 | Default | d | 0.297 | |
CODEC_AGND | Default | d | 0.000 | |
CODEC_CH_MIC | Default | d | 0.730 | |
CODEC_CP_LDO_FILT | Default | d | 0.605 | |
CODEC_FILT | Default | d | 0.800 | |
CODEC_FLY1N | Default | d | 0.410 | |
CODEC_FLY1P | Default | d | 0.680 | |
CODEC_FLY2N | Default | d | 1.333 | |
CODEC_FLY2P | Default | d | 0.380 | |
CODEC_GB_MIC | Default | d | 0.730 | |
CODEC_HSBIAS_FILT | Default | d | 0.710 | |
CODEC_HSBIAS_FILT_REF | Default | d | 0.640 | |
CODEC_INT_L | Default | d | 0.310 | |
CODEC_RESET_L | Default | d | 0.300 | |
CODEC_VCP_FILTN | Default | d | 1.070 | |
CODEC_VCP_FILTP | Default | d | 0.560 | |
CODEC_VCP_FILT_GND | Default | d | 0.000 | |
CODEC_WAKE_L | Default | d | 0.710 | |
DCIN_ISENSE | Default | d | 0.735 | |
DCIN_VSENSE | Default | d | 0.725 | |
DDR04_05_06_07_ZQ | Default | d | 0.290 | |
DDR04_05_RREF | Default | d | 0.170 | |
DISP_2DBL_FSYNC | Default | d | 0.300 | |
DISP_BKLT_LSYNC | Default | d | 0.300 | |
DMIC_CLK0_1V8_OUT_R | Default | d | 0.445 | |
DMIC_CLK1_1V8_OUT_R | Default | d | 0.440 | |
DMIC_DATA0_1V8_GATED | Default | d | 0.479 | |
DMIC_DATA1_1V8_GATED | Default | d | 0.479 | |
DMIC_DISABLE | Default | d | 0.583 | |
DP2HDMI_1.5G_FILT_EN | Default | d | 0.600 | |
DP2HDMI_CEXT | Default | d | 0.351 | |
DP2HDMI_MIXEDIO_CONFIG | Default | d | 0.605 | |
DP2HDMI_PWR_EN | Default | d | 0.535 | |
DP2HDMI_PWR_EN_PMU | Default | d | 0.744 | |
DP2HDMI_PWR_EN_R | Default | d | 0.535 | |
DP2HDMI_REXT | Default | d | 0.483 | |
DP2HDMI_TCLK | Default | d | 0.626 | |
DP2HDMI_TCLK_R | Default | d | 0.626 | |
DP2HDMI_XTAL | Default | d | 0.790 | |
DPRX_AUX_N | Default | d | 0.555 | |
DPRX_AUX_P | Default | d | 0.560 | |
DPRX_DATA_N<0> | Default | d | 0.665 | |
DPRX_DATA_N<1> | Default | d | 0.660 | |
DPRX_DATA_N<2> | Default | d | 0.663 | |
DPRX_DATA_N<3> | Default | d | 0.650 | |
DPRX_DATA_P<0> | Default | d | 0.667 | |
DPRX_DATA_P<1> | Default | d | 0.665 | |
DPRX_DATA_P<2> | Default | d | 0.668 | |
DPRX_DATA_P<3> | Default | d | 0.653 | |
DPRX_INT_HPD | Default | d | 0.300 | |
DPRX_INT_HPD_1V8 | Default | d | 0.577 | |
EDP_PANEL_1V8_EN | Default | d | 0.653 | |
EDP_PANEL_DISCHARGE | Default | d | 0.669 | |
ENET_CLKREQ_L | Default | d | 0.300 | |
ENET_RESET_L | Default | d | 0.290 | |
FAN0_PWR_EN_L | Default | d | OL | |
FAN0_PWR_EN_L_R | Default | d | 0.525 | |
FAN1_PWR_EN_L | Default | d | OL | |
FAN1_PWR_EN_L_R | Default | d | 0.524 | |
FAN_0_TACH | Default | d | OL | |
FAN_1_TACH | Default | d | OL | |
FB_BLKT_2D | Default | d | 0.715 | |
FINSTACK_R_THMSNS | Default | d | 0.773 | |
FLASH_BUSY_USBC01_L | Default | d | 0.550 | |
FTCAM_ENABLE_1V8_OUT | Default | d | 0.450 | |
FTCAM_RESET_1V8_R_L | Default | d | 0.444 | |
FTCAM_RESET_L | Default | d | 0.300 | |
GYRO_INT_1V8 | Default | d | 0.718 | |
GYRO_MOTION_INT_1V8 | Default | d | 0.715 | |
HDMI_5V_FAULT | Default | d | 0.720 | |
HDMI_5V_ISET | Default | d | 0.734 | |
HDMI_5V_ON | Default | d | 0.720 | |
HDMI_AOP_CEC_R | Default | d | 0.400 | |
HDMI_AOP_HPD_R | Default | d | 0.400 | |
HDMI_CEC | Default | d | 0.710 | |
HDMI_CECFET_EN_Q | Default | d | 0.490 | |
HDMI_CEC_AOP_RX | Default | d | 0.300 | |
HDMI_CEC_AOP_TX | Default | d | 0.300 | |
HDMI_CEC_CONN | Default | d | 0.776 | |
HDMI_CEC_IRQ | Default | d | 0.504 | |
HDMI_CEC_PULL | Default | d | 0.470 | |
HDMI_CEC_R | Default | d | 0.675 | |
HDMI_CLK_CONN_N | Default | d | 0.780 | |
HDMI_CLK_CONN_P | Default | d | 0.780 | |
HDMI_CLK_FLT_N | Default | d | 0.780 | |
HDMI_CLK_FLT_P | Default | d | 0.780 | |
HDMI_CLK_N | Default | d | 0.774 | |
HDMI_CLK_P | Default | d | 0.774 | |
HDMI_CLK_R_N | Default | d | 0.780 | |
HDMI_CLK_R_P | Default | d | 0.780 | |
HDMI_DATA_CONN_N<0> | Default | d | 0.780 | |
HDMI_DATA_CONN_N<1> | Default | d | 0.780 | |
HDMI_DATA_CONN_N<2> | Default | d | 0.780 | |
HDMI_DATA_CONN_P<0> | Default | d | 0.780 | |
HDMI_DATA_CONN_P<1> | Default | d | 0.780 | |
HDMI_DATA_CONN_P<2> | Default | d | 0.780 | |
HDMI_DATA_L_N<0> | Default | d | 0.780 | |
HDMI_DATA_L_N<1> | Default | d | 0.780 | |
HDMI_DATA_L_N<2> | Default | d | 0.780 | |
HDMI_DATA_L_P<0> | Default | d | 0.780 | |
HDMI_DATA_L_P<1> | Default | d | 0.780 | |
HDMI_DATA_L_P<2> | Default | d | 0.780 | |
HDMI_DATA_N<0> | Default | d | 0.774 | |
HDMI_DATA_N<1> | Default | d | 0.774 | |
HDMI_DATA_N<2> | Default | d | 0.774 | |
HDMI_DATA_P<0> | Default | d | 0.774 | |
HDMI_DATA_P<1> | Default | d | 0.774 | |
HDMI_DATA_P<2> | Default | d | 0.774 | |
HDMI_DATA_R_N<0> | Default | d | 0.780 | |
HDMI_DATA_R_N<1> | Default | d | 0.780 | |
HDMI_DATA_R_N<2> | Default | d | 0.780 | |
HDMI_DATA_R_P<0> | Default | d | 0.780 | |
HDMI_DATA_R_P<1> | Default | d | 0.780 | |
HDMI_DATA_R_P<2> | Default | d | 0.780 | |
HDMI_DDC_5V_CONN_SCL | Default | d | 0.700 | |
HDMI_DDC_5V_CONN_SDA | Default | d | 0.700 | |
HDMI_DDC_5V_FLT_SCL | Default | d | 0.700 | |
HDMI_DDC_5V_FLT_SDA | Default | d | 0.700 | |
HDMI_DDC_5V_SCL | Default | d | 0.675 | |
HDMI_DDC_5V_SDA | Default | d | 0.670 | |
HDMI_HPD_AOP | Default | d | 0.300 | |
HDMI_HPD_IN | Default | d | 0.740 | |
HDMI_HPD_IN_CONN | Default | d | 0.740 | |
HDMI_HPD_IN_FLT | Default | d | 0.740 | |
HDMI_HPD_IN_R | Default | d | 0.665 | |
HDMI_PIND_VBIAS | Default | d | OL | |
HDMI_PWR_EN | Default | d | 0.715 | |
HDMI_RESET_L | Default | d | 0.665 | |
HDMI_RESET_R_L | Default | d | 0.670 | |
HDMI_RSVD | Default | d | 0.000 | |
HVLDO_B | Default | d | OL | |
HVLDO_EN | Default | d | 0.698 | |
HVLDO_FB | Default | d | 0.734 | |
HVLDO_Z | Default | d | OL | |
HVSW_EN_B | Default | d | OL | |
HVSW_EN_C | Default | d | OL | |
HVSW_G1 | Default | d | OL | |
HVSW_G2 | Default | d | OL | |
HVSW_SHDN_B | Default | d | OL | |
HVSW_SHDN_E | Default | d | OL | |
HVSW_SHDN_NEG | Default | d | OL | |
HVSW_SS | Default | d | OL | |
I2C_ALS_1V8_SCL | Default | d | 0.558 | |
I2C_ALS_1V8_SDA | Default | d | 0.560 | |
I2C_AOP_CAM_SCL | Default | d | 0.300 | |
I2C_AOP_CAM_SDA | Default | d | 0.295 | |
I2C_CAM_1V8_SCL | Default | d | 0.557 | |
I2C_CAM_1V8_SDA | Default | d | 0.557 | |
I2C_CAM_SCL | Default | d | 0.300 | |
I2C_CAM_SDA | Default | d | 0.300 | |
I2C_KBD_SCL | Default | d | 0.723 | |
I2C_KBD_SDA | Default | d | 0.695 | |
I2C_LUXE_DEBUG_SCL | Default | d | 0.409 | |
I2C_LUXE_DEBUG_SDA | Default | d | 0.408 | |
I2C_NAND_PMIC_SCL_1V8 | Default | d | 0.530 | |
I2C_NAND_PMIC_SDA_1V8 | Default | d | 0.533 | |
I2C_P3V8AON_SCL | Default | d | 0.690 | |
I2C_SD_DEBUG_3V3_SCL | Default | d | 0.560 | |
I2C_SD_DEBUG_3V3_SDA | Default | d | 0.559 | |
I2C_SEEPROM_SCL | Default | d | 0.297 | |
I2C_SEEPROM_SDA | Default | d | 0.299 | |
I2C_SMC_IPD_1V85_SCL | Default | d | 0.562 | |
I2C_SMC_IPD_1V85_SDA | Default | d | 0.562 | |
I2C_SMC_IPD_SCL | Default | d | 0.294 | |
I2C_SMC_IPD_SDA | Default | d | 0.295 | |
I2C_SMC_NAND_SCL | Default | d | 0.293 | |
I2C_SMC_NAND_SDA | Default | d | 0.294 | |
I2C_SMC_PWR_1V8_SCL | Default | d | 0.524 | |
I2C_SMC_PWR_1V8_SDA | Default | d | 0.514 | |
I2C_SMC_PWR_SCL | Default | d | 0.294 | |
I2C_SMC_PWR_SDA | Default | d | 0.300 | |
I2C_SMC_SNS0_SCL | Default | d | 0.296 | |
I2C_SMC_SNS0_SCL_1V8 | Default | d | 0.562 | |
I2C_SMC_SNS0_SDA | Default | d | 0.292 | |
I2C_SMC_SNS0_SDA_1V8 | Default | d | 0.563 | |
I2C_SMC_UPC_SCL | Default | d | 0.305 | |
I2C_SMC_UPC_SDA | Default | d | 0.300 | |
I2C_SPKRAMP_L_SDA | Default | d | 0.300 | |
I2C_SPKRAMP_R_SCL | Default | d | 0.300 | |
I2C_SPKRAMP_R_SDA | Default | d | 0.300 | |
I2C_TCON_BKLT_SCL | Default | d | 0.300 | |
I2C_TCON_BKLT_SCL | Default | r | 1.500k | |
I2C_TCON_BKLT_SCL_1V8 | Default | d | 0.540 | |
I2C_TCON_BKLT_SCL_1V8 | Default | r | 2.200k | |
I2C_TCON_BKLT_SDA | Default | d | 0.300 | |
I2C_TCON_BKLT_SDA | Default | r | 1.500k | |
I2C_TCON_BKLT_SDA_1V8 | Default | d | 0.540 | |
I2C_TCON_BKLT_SDA_1V8 | Default | r | 2.200k | |
I2C_UPC01_3V3_SCL | Default | d | OL | |
I2C_UPC01_3V3_SDA | Default | d | OL | |
I2C_UPC0_ATCRTMR0_SCL | Default | d | 0.535 | |
I2C_UPC0_ATCRTMR0_SCL_1V8 | Default | d | 0.454 | |
I2C_UPC0_ATCRTMR0_SDA | Default | d | 0.535 | |
I2C_UPC0_ATCRTMR0_SDA_1V8 | Default | d | 0.455 | |
I2C_UPC1_ATCRTMR1_SCL | Default | d | 0.530 | |
I2C_UPC1_ATCRTMR1_SCL_1V8 | Default | d | 0.456 | |
I2C_UPC1_ATCRTMR1_SDA | Default | d | 0.540 | |
I2C_UPC1_ATCRTMR1_SDA_1V8 | Default | d | 0.457 | |
I2C_UPC2_ATCRTMR2_SCL | Default | d | 0.550 | |
I2C_UPC2_ATCRTMR2_SCL_1V8 | Default | d | 0.452 | |
I2C_UPC2_ATCRTMR2_SDA | Default | d | 0.549 | |
I2C_UPC2_ATCRTMR2_SDA_1V8 | Default | d | 0.452 | |
I2C_UPC5_SCL | Default | d | 0.550 | |
I2C_UPC5_SDA | Default | d | 0.580 | |
I2C_UPC_SCL | Default | d | 0.300 | |
I2C_UPC_SDA | Default | d | 0.300 | |
INT5_DIS | Default | d | OL | |
INT5_DIS_C | Default | d | OL | |
INT_I2C_EUSBLS0_1V8_L | Default | d | 0.460 | |
INT_I2C_EUSBLS1_1V8_L | Default | d | 0.460 | |
INT_I2C_EUSBLS2_1V8_L | Default | d | 0.456 | |
INT_I2C_UPC0_ATCRTMR0_L | Default | d | 0.575 | |
INT_I2C_UPC1_ATCRTMR1_L | Default | d | 0.580 | |
INT_I2C_UPC2_ATCRTMR2_L | Default | d | 0.590 | |
IOXP1_INT_L | Default | d | 0.650 | |
IOXP1_RESET_L | Default | d | 0.744 | |
IOXP2_ADDR | Default | d | 0.729 | |
IOXP2_INT_L | Default | d | 0.650 | |
IOXP2_RESET_L | Default | d | 0.746 | |
IOXP_I2C_SCL | Default | d | 0.700 | |
IOXP_I2C_SDA | Default | d | 0.671 | |
IPD_LID_OPEN_1V8 | Default | d | 0.752 | |
IPD_LID_OPEN_R_1V8 | Default | d | 0.690 | |
IPD_P3V3_PWR_EN_RC | Default | d | 0.574 | |
IPD_PWR_EN | Default | d | 0.675 | |
IPD_PWR_EN_D | Default | d | 0.958 | |
IPD_PWR_EN_PMU | Default | d | 0.700 | |
IPD_PWR_EN_RC | Default | d | 0.582 | |
IPD_PWR_FB | Default | d | 0.719 | |
IPD_PWR_HOLD | Default | d | 0.676 | |
IPD_SPI_EN | Default | d | 0.302 | |
IPD_SPI_INT_L | Default | d | 0.298 | |
IPD_SPI_INT_R_L | Default | d | 0.298 | |
IPD_WAKE_L | Default | d | 0.760 | |
ISNS_P3V8AON_HS_N | Default | d | 0.480 | |
ISNS_P3V8AON_HS_P | Default | d | 0.480 | |
ISNS_PP3V8_AON_MPMU_N | Default | d | 0.160 | |
ISNS_PP3V8_AON_MPMU_P | Default | d | 0.160 | |
ISNS_PP3V8_AON_SPMU_N | Default | d | 0.160 | |
ISNS_PP3V8_AON_SPMU_P | Default | d | 0.160 | |
ISNS_PP3V8_AWAKE_TCON_N | Default | d | - | |
ISNS_PP3V8_AWAKE_TCON_P | Default | d | - | |
ISNS_PPBUS_AON_LUXE_N | Default | d | 0.480 | |
ISNS_PPBUS_AON_LUXE_P | Default | d | 0.480 | |
ISNS_PPVIN_P1V8VDDH_N | Default | d | 0.480 | |
ISNS_PPVIN_P1V8VDDH_P | Default | d | 0.480 | |
ISNS_PPVIN_P5VS2TPS_N | Default | d | 0.480 | |
ISNS_PPVIN_P5VS2TPS_P | Default | d | 0.480 | |
KBDBKLT_EN | Default | d | 0.566 | |
KBDBKLT_ISET_KEYB | Default | d | 0.690 | |
KBDBKLT_SENSE_OUT | Default | d | 0.730 | |
KBDBKLT_SW2 | Default | d | 0.390 | |
KBDLED_CATHODE1 | Default | d | 0.671 | |
KBDLED_CATHODE2 | Default | d | 0.665 | |
KBDLED_KEYB1 | Default | d | 0.662 | |
KBDLED_KEYB2 | Default | d | 0.657 | |
KBD_BKLT_PWM_3V3 | Default | d | 0.443 | |
KBD_BKLT_PWM_R | Default | d | 0.300 | |
KBD_CAP_CATHODE | Default | d | 0.500 | |
KBD_CONTROL_KEY | Default | d | 0.486 | |
KBD_CONTROL_L | Default | d | 0.480 | |
KBD_DRIVE_Y0 | Default | d | 0.626 | |
KBD_DRIVE_Y1 | Default | d | 0.617 | |
KBD_DRIVE_Y10 | Default | d | 0.621 | |
KBD_DRIVE_Y11 | Default | d | 0.625 | |
KBD_DRIVE_Y2 | Default | d | 0.622 | |
KBD_DRIVE_Y3 | Default | d | 0.623 | |
KBD_DRIVE_Y4 | Default | d | 0.615 | |
KBD_DRIVE_Y5 | Default | d | 0.617 | |
KBD_DRIVE_Y6 | Default | d | 0.559 | |
KBD_DRIVE_Y7 | Default | d | 0.548 | |
KBD_DRIVE_Y8 | Default | d | 0.551 | |
KBD_DRIVE_Y9 | Default | d | 0.562 | |
KBD_ID1 | Default | d | 0.794 | |
KBD_ID2 | Default | d | 0.791 | |
KBD_ID_DETECT1 | Default | d | 0.618 | |
KBD_ID_DETECT2 | Default | d | 0.624 | |
KBD_INT_L | Default | d | 0.685 | |
KBD_LED1 | Default | d | 0.500 | |
KBD_LEFT_OPTION_KEY | Default | d | 0.486 | |
KBD_LEFT_OPTION_L | Default | d | 0.480 | |
KBD_RIGHT_SHIFT_KEY | Default | d | 0.487 | |
KBD_RIGHT_SHIFT_L | Default | d | 0.480 | |
KBD_SENSE_X0 | Default | d | 0.625 | |
KBD_SENSE_X1 | Default | d | 0.622 | |
KBD_SENSE_X10 | Default | d | 0.626 | |
KBD_SENSE_X11 | Default | d | 0.625 | |
KBD_SENSE_X12 | Default | d | 0.622 | |
KBD_SENSE_X2 | Default | d | 0.626 | |
KBD_SENSE_X3 | Default | d | 0.628 | |
KBD_SENSE_X4 | Default | d | 0.625 | |
KBD_SENSE_X5 | Default | d | 0.630 | |
KBD_SENSE_X6 | Default | d | 0.573 | |
KBD_SENSE_X7 | Default | d | 0.557 | |
KBD_SENSE_X8 | Default | d | 0.560 | |
KBD_SENSE_X9 | Default | d | 0.570 | |
LED_CTRL | Default | d | 0.567 | |
LED_ISET | Default | d | 0.575 | |
LID_OPEN | Default | d | 0.296 | |
LPDP_FTCAM_AUX | Default | d | OL | |
LPDP_FTCAM_AUX_C | Default | d | 0.333 | |
LPDP_FTCAM_DATA_C_N<0> | Default | d | OL | |
LPDP_FTCAM_DATA_C_P<0> | Default | d | OL | |
LPDP_FTCAM_DATA_N<0> | Default | d | 0.400 | |
LPDP_FTCAM_DATA_P<0> | Default | d | 0.400 | |
LPDP_INT_AUX_C_N | Default | d | 0.330 | |
LPDP_INT_AUX_C_P | Default | d | 0.330 | |
LPDP_INT_AUX_N | Default | d | OL | |
LPDP_INT_AUX_P | Default | d | OL | |
LPDP_INT_AUX_R_N | Default | d | OL | |
LPDP_INT_AUX_R_P | Default | d | OL | |
LPDP_INT_DATA_C_N<0> | Default | d | 0.350 | |
LPDP_INT_DATA_C_N<1> | Default | d | 0.350 | |
LPDP_INT_DATA_C_N<2> | Default | d | 0.350 | |
LPDP_INT_DATA_C_N<3> | Default | d | 0.350 | |
LPDP_INT_DATA_C_P<0> | Default | d | 0.350 | |
LPDP_INT_DATA_C_P<1> | Default | d | 0.350 | |
LPDP_INT_DATA_C_P<2> | Default | d | 0.350 | |
LPDP_INT_DATA_C_P<3> | Default | d | 0.350 | |
LPDP_INT_DATA_N<0> | Default | d | OL | |
LPDP_INT_DATA_N<1> | Default | d | OL | |
LPDP_INT_DATA_N<2> | Default | d | OL | |
LPDP_INT_DATA_N<3> | Default | d | OL | |
LPDP_INT_DATA_P<0> | Default | d | OL | |
LPDP_INT_DATA_P<1> | Default | d | OL | |
LPDP_INT_DATA_P<2> | Default | d | OL | |
LPDP_INT_DATA_P<3> | Default | d | OL | |
LPDP_INT_DATA_R_N<0> | Default | d | OL | |
LPDP_INT_DATA_R_N<1> | Default | d | OL | |
LPDP_INT_DATA_R_N<2> | Default | d | OL | |
LPDP_INT_DATA_R_N<3> | Default | d | OL | |
LPDP_INT_DATA_R_P<0> | Default | d | OL | |
LPDP_INT_DATA_R_P<1> | Default | d | OL | |
LPDP_INT_DATA_R_P<2> | Default | d | OL | |
LPDP_INT_DATA_R_P<3> | Default | d | OL | |
LPDP_INT_HPD | Default | d | 0.300 | |
LUXE_AGND | Default | d | 0.000 | |
LUXE_BT_C1 | Default | d | 0.590 | |
LUXE_BT_C2 | Default | d | 0.590 | |
LUXE_BYP | Default | d | 0.610 | |
LUXE_COMP | Default | d | 0.611 | |
LUXE_COMP_R | Default | d | OL | |
LUXE_C_VDD | Default | d | 0.506 | |
LUXE_FAULT | Default | d | 0.626 | |
LUXE_ISH_N | Default | d | 0.480 | |
LUXE_ISH_P | Default | d | 0.480 | |
LUXE_ISH_R_N | Default | d | 0.476 | |
LUXE_ISH_R_P | Default | d | 0.480 | |
LUXE_ISL_N | Default | d | 0.000 | |
LUXE_ISL_P | Default | d | 0.000 | |
LUXE_ISL_R_N | Default | d | 0.000 | |
LUXE_ISL_R_P | Default | d | 0.000 | |
LUXE_LG1 | Default | d | 0.455 | |
LUXE_LG1_R | Default | d | 0.455 | |
LUXE_LG2 | Default | d | 0.455 | |
LUXE_LG2_R | Default | d | 0.455 | |
LUXE_TEST | Default | d | 0.620 | |
LUXE_UG1 | Default | d | 0.800 | |
LUXE_UG1_R | Default | d | 0.800 | |
LUXE_UG2 | Default | d | 0.803 | |
LUXE_UG2_R | Default | d | 0.803 | |
LUXE_VPROG_TEST | Default | d | 0.608 | |
MPMU_3V8_IOUT | Default | d | 0.720 | |
MPMU_3V8_ISENSE | Default | d | 0.780 | |
MPMU_AMUX_A7 | Default | d | 0.710 | |
MPMU_BUCK0_FB | Default | d | 0.273 | |
MPMU_BUCK0_FB_R | Default | d | 0.273 | |
MPMU_BUCK0_LX0 | Default | d | 0.275 | |
MPMU_BUCK0_LX0 | Default | r | 270.000 | |
MPMU_BUCK0_LX1 | Default | d | 0.275 | |
MPMU_BUCK0_LX1 | Default | r | 270.000R | |
MPMU_BUCK0_LX2 | Default | d | 0.275 | |
MPMU_BUCK0_LX2 | Default | r | 270.000R | |
MPMU_BUCK0_LX3 | Default | d | 0.275 | |
MPMU_BUCK0_LX3 | Default | r | 270.000R | |
MPMU_BUCK10_FB | Default | d | 0.128 | |
MPMU_BUCK10_FB_R | Default | d | 0.128 | |
MPMU_BUCK10_LX0 | Default | d | 0.128 | |
MPMU_BUCK10_LX0 | Default | r | 126.000 | |
MPMU_BUCK10_LX1 | Default | d | 0.128 | |
MPMU_BUCK10_LX1 | Default | r | 126.000R | |
MPMU_BUCK1_FB | Default | d | 0.309 | |
MPMU_BUCK1_FB_R | Default | d | 0.310 | |
MPMU_BUCK1_LX0 | Default | d | 0.311 | |
MPMU_BUCK1_LX0 | Default | r | 307.000 | |
MPMU_BUCK1_LX1 | Default | d | 0.311 | |
MPMU_BUCK1_LX1 | Default | r | 307.000R | |
MPMU_BUCK2_FB | Default | d | 0.420 | |
MPMU_BUCK2_FB_R | Default | d | 0.420 | |
MPMU_BUCK2_LX0 | Default | d | 0.420 | |
MPMU_BUCK2_LX0 | Default | r | 0.003R | |
MPMU_BUCK3_FB | Default | d | 0.344 | |
MPMU_BUCK3_FB_R | Default | d | 0.344 | |
MPMU_BUCK3_LX0 | Default | d | 0.350 | |
MPMU_BUCK3_LX0 | Default | r | 0.002R | |
MPMU_BUCK4_FB | Default | d | 0.072 | |
MPMU_BUCK4_FB_R | Default | d | 0.720 | |
MPMU_BUCK4_LX0 | Default | d | 0.073 | |
MPMU_BUCK4_LX0 | Default | r | 70.000R | |
MPMU_BUCK4_LX1 | Default | d | 0.073 | |
MPMU_BUCK4_LX1 | Default | r | 70.000R | |
MPMU_BUCK4_LX2 | Default | d | 0.073 | |
MPMU_BUCK4_LX2 | Default | r | 70.000R | |
MPMU_BUCK4_LX3 | Default | d | 0.073 | |
MPMU_BUCK4_LX3 | Default | r | 70.000R | |
MPMU_BUCK5_FB | Default | d | 0.280 | |
MPMU_BUCK5_FB_R | Default | d | 0.280 | |
MPMU_BUCK5_LX0 | Default | d | 0.280 | |
MPMU_BUCK5_LX0 | Default | r | 275.000 | |
MPMU_BUCK5_LX1 | Default | d | 0.280 | |
MPMU_BUCK5_LX1 | Default | r | 275.000 | |
MPMU_BUCK5_LX2 | Default | d | 0.280 | |
MPMU_BUCK5_LX2 | Default | r | 275.000R | |
MPMU_BUCK5_LX3 | Default | d | 0.280 | |
MPMU_BUCK5_LX3 | Default | r | 275.000R | |
MPMU_BUCK6_FB | Default | d | 0.444 | |
MPMU_BUCK6_FB_R | Default | d | 0.440 | |
MPMU_BUCK6_LX0 | Default | d | 0.440 | |
MPMU_BUCK7_FB | Default | d | 0.210 | |
MPMU_BUCK7_FB_R | Default | d | 0.210 | |
MPMU_BUCK7_LX0 | Default | d | 0.210 | |
MPMU_BUCK7_LX0 | Default | r | 206.000 | |
MPMU_BUCK7_LX1 | Default | d | 0.210 | |
MPMU_BUCK7_LX2 | Default | d | 0.210 | |
MPMU_BUCK7_LX2 | Default | r | 206.000R | |
MPMU_BUCK8_FB | Default | d | 0.260 | |
MPMU_BUCK8_FB_R | Default | d | 0.260 | |
MPMU_BUCK8_LX0 | Default | d | 0.260 | |
MPMU_BUCK8_LX0 | Default | r | 0.001R | |
MPMU_BUCK9_FB | Default | d | 0.230 | |
MPMU_BUCK9_FB_R | Default | d | 0.230 | |
MPMU_BUCK9_LX0 | Default | d | 0.231 | |
MPMU_BUCK9_LX0 | Default | r | 227.000 | |
MPMU_IREF | Default | d | 0.753 | |
MPMU_TCAL | Default | d | 0.775 | |
MPMU_THMSNS | Default | d | 0.772 | |
MPMU_VREF1V2 | Default | d | 0.620 | |
MPMU_XTAL1 | Default | d | 0.000 | |
MPMU_XTAL2 | Default | d | 0.563 | |
MPMU_XTAL_R | Default | d | 0.563 | |
MX_GPIO1 | Default | d | 0.478 | |
MX_GPIO3 | Default | d | 0.500 | |
NAND0_BOOT2 | Default | d | 0.000 | |
NAND0_CLK24M_01 | Default | d | 0.308 | |
NAND0_CLK24M_0123_R | Default | d | 0.292 | |
NAND0_CLK24M_23 | Default | d | 0.306 | |
NAND0_CLK24M_R | Default | d | 0.284 | |
NAND0_CLKREQ0_L | Default | d | 0.290 | |
NAND0_CLKREQ0_R_L | Default | d | 0.290 | |
NAND0_CLKREQ1_L | Default | d | 0.295 | |
NAND0_CLKREQ1_R_L | Default | d | 0.300 | |
NAND0_CLKREQ2_L | Default | d | 0.290 | |
NAND0_CLKREQ2_R_L | Default | d | 0.290 | |
NAND0_CLKREQ3_L | Default | d | 0.295 | |
NAND0_CLKREQ3_R_L | Default | d | 0.295 | |
NAND0_FORCE_EN | Default | d | 0.577 | |
NAND0_JTAG_SEL | Default | d | 0.312 | |
NAND0_JTAG_TRST_L | Default | d | 0.312 | |
NAND0_LPB_L | Default | d | 0.311 | |
NAND0_OCARINA_IREF | Default | d | 0.746 | |
NAND0_OCARINA_PGOOD | Default | d | 0.755 | |
NAND0_OCARINA_TCAL | Default | d | 0.768 | |
NAND0_OCARINA_TDEV1 | Default | d | 0.770 | |
NAND0_OCARINA_TDEV2 | Default | d | 0.769 | |
NAND0_OCARINA_VREF | Default | d | 0.764 | |
NAND0_PCIE_RESET_L | Default | d | 0.280 | |
NAND0_PFN_L | Default | d | 0.311 | |
NAND0_RESET_L | Default | d | 0.311 | |
NAND0_S5E0_SWD_UID0 | Default | d | 0.346 | |
NAND0_S5E0_SWD_UID1 | Default | d | 0.346 | |
NAND0_S5E0_ZQ_0 | Default | d | 0.300 | |
NAND0_S5E1_SWD_UID0 | Default | d | 0.370 | |
NAND0_S5E1_ZQ_1 | Default | d | 0.300 | |
NAND0_S5E2_SWD_UID0 | Default | d | 0.355 | |
NAND0_S5E2_SWD_UID1 | Default | d | 0.355 | |
NAND0_S5E2_ZQ_0 | Default | d | 0.300 | |
NAND0_STG01_ADDR | Default | d | 0.575 | |
NAND1_CLK24M_0123_R | Default | d | 0.314 | |
NAND1_CLK24M_R | Default | d | 0.298 | |
NAND1_CLKREQ0_L | Default | d | 0.292 | |
NAND1_CLKREQ1_L | Default | d | 0.290 | |
NAND1_CLKREQ1_R_L | Default | d | 0.297 | |
NAND1_CLKREQ2_L | Default | d | 0.300 | |
NAND1_CLKREQ2_R_L | Default | d | 0.300 | |
NAND1_CLKREQ3_L | Default | d | 0.300 | |
NAND1_PCIE_RESET_L | Default | d | 0.300 | |
NAND1_S5E3_ZQ_1 | Default | d | OL | |
NC | Default | d | OL | |
ND_1V8 | Default | d | 0.570 | |
OUT123_EN | Default | d | 0.433 | |
P0V9_ATCRTMR0_SVR_PGND | Default | d | 0.000 | |
P0V9_ATCRTMR1_SVR_PGND | Default | d | 0.000 | |
P0V9_ATCRTMR2_SVR_PGND | Default | d | 0.000 | |
P0V9_LX0_NAND0 | Default | d | 0.345 | |
P0V9_LX1_NAND0 | Default | d | 0.345 | |
P1V2_LX0_NAND0 | Default | d | 0.305 | |
P1V8S1MONVDDH_SENSE_N | Default | d | 0.000 | |
P1V8S1MONVDDH_SENSE_P | Default | d | 0.100 | |
P1V8S1MONVDDH_SENSE_R_N | Default | d | 0.000 | |
P1V8S1MONVDDH_SENSE_R_P | Default | d | 0.100 | |
P1V8VDDH_BOOT1 | Default | d | 0.550 | |
P1V8VDDH_BOOT1_R | Default | d | 0.572 | |
P1V8VDDH_DRMOS_BOOT1 | Default | d | 0.505 | |
P1V8VDDH_DRMOS_BOOT1_R | Default | d | 0.505 | |
P1V8VDDH_DRMOS_BOOT2 | Default | d | 0.544 | |
P1V8VDDH_DRMOS_BOOT2_R | Default | d | 0.545 | |
P1V8VDDH_DRMOS_EN | Default | d | 0.553 | |
P1V8VDDH_DRMOS_FAULT_L | Default | d | 0.540 | |
P1V8VDDH_DRMOS_FAULT_L1 | Default | d | 0.540 | |
P1V8VDDH_DRMOS_FAULT_L2 | Default | d | 0.540 | |
P1V8VDDH_DRMOS_GSW1 | Default | d | 0.105 | |
P1V8VDDH_DRMOS_GSW2 | Default | d | 0.105 | |
P1V8VDDH_DRMOS_IREF2 | Default | d | 0.543 | |
P1V8VDDH_DRMOS_ISENSE1_N | Default | d | 0.540 | |
P1V8VDDH_DRMOS_ISENSE1_P | Default | d | 0.620 | |
P1V8VDDH_DRMOS_ISENSE2_N | Default | d | 0.543 | |
P1V8VDDH_DRMOS_ISENSE2_P | Default | d | 0.614 | |
P1V8VDDH_DRMOS_ISENSE3_N | Default | d | 0.540 | |
P1V8VDDH_DRMOS_ISENSE3_P | Default | d | 0.615 | |
P1V8VDDH_DRMOS_PWM1 | Default | d | 0.616 | |
P1V8VDDH_DRMOS_PWM2 | Default | d | 0.612 | |
P1V8VDDH_DRMOS_PWM3 | Default | d | 0.614 | |
P1V8VDDH_DRMOS_TSENSE | Default | d | 0.557 | |
P1V8VDDH_DRMOS_TSENSE_R | Default | d | 0.774 | |
P1V8VDDH_FAULT_L | Default | d | 0.617 | |
P1V8VDDH_GSENSE1 | Default | d | 0.050 | |
P1V8VDDH_GSENSE1_R | Default | d | 0.100 | |
P1V8VDDH_GSW1 | Default | d | 0.105 | |
P1V8VDDH_GSW1_R | Default | d | 0.100 | |
P1V8VDDH_HS_IOUT | Default | d | 0.719 | |
P1V8VDDH_HS_ISENSE | Default | d | 0.732 | |
P1V8VDDH_ILIMIT_THROTTLE_L | Default | d | 0.298 | |
P1V8VDDH_IMON | Default | d | 0.775 | |
P1V8VDDH_IMON_FILT | Default | d | 0.740 | |
P1V8VDDH_IREF | Default | d | 0.540 | |
P1V8VDDH_IREF_R | Default | d | 0.540 | |
P1V8VDDH_ISENSE | Default | d | 0.732 | |
P1V8VDDH_ISENSE1 | Default | d | 0.700 | |
P1V8VDDH_ISENSE2 | Default | d | 0.700 | |
P1V8VDDH_ISENSE3 | Default | d | 0.703 | |
P1V8VDDH_ISENSE_EXT | Default | d | 0.777 | |
P1V8VDDH_ISENSE_EXT_R | Default | d | 0.732 | |
P1V8VDDH_OTP_SEL | Default | d | 0.657 | |
P1V8VDDH_PWR_EN | Default | d | 0.623 | |
P1V8VDDH_PWR_EN_R | Default | d | 0.617 | |
P1V8VDDH_RISNS1_N | Default | d | 0.110 | |
P1V8VDDH_RISNS1_N | Default | r | 106.000 | |
P1V8VDDH_RISNS1_P | Default | d | 0.110 | |
P1V8VDDH_RISNS1_P | Default | r | 106.000 | |
P1V8VDDH_RISNS2_N | Default | d | 0.110 | |
P1V8VDDH_RISNS2_N | Default | r | 106.000 | |
P1V8VDDH_RISNS2_P | Default | d | 0.110 | |
P1V8VDDH_RISNS2_P | Default | r | 106.000 | |
P1V8VDDH_RISNS3_N | Default | d | 0.110 | |
P1V8VDDH_RISNS3_N | Default | r | 106.000 | |
P1V8VDDH_RISNS3_P | Default | d | 0.110 | |
P1V8VDDH_RISNS3_P | Default | r | 106.000 | |
P1V8VDDH_RISNS_IN_N | Default | d | 0.790 | |
P1V8VDDH_RISNS_IN_N_R | Default | d | 1.900 | |
P1V8VDDH_RISNS_IN_P | Default | d | 0.790 | |
P1V8VDDH_RISNS_IN_P_R | Default | d | 1.900 | |
P1V8VDDH_SLP_L | Default | d | 0.618 | |
P1V8VDDH_SLP_R_L | Default | d | 0.618 | |
P1V8VDDH_SW1 | Default | d | 0.110 | |
P1V8VDDH_SW1_L | Default | d | 0.110 | |
P1V8VDDH_SW1_L | Default | r | 106.000 | |
P1V8VDDH_SW2 | Default | d | 0.110 | |
P1V8VDDH_SW2 | Default | r | 106.000 | |
P1V8VDDH_SW2_L | Default | d | 0.110 | |
P1V8VDDH_SW2_L | Default | r | 106.000 | |
P1V8VDDH_SW3 | Default | d | 0.110 | |
P1V8VDDH_SW3_L | Default | d | 0.110 | |
P1V8VDDH_SW3_L | Default | r | 106.000 | |
P1V8VDDH_THMSNS_1 | Default | d | 0.773 | |
P1V8VDDH_THMSNS_3 | Default | d | 0.775 | |
P1V8VDDH_TSENSE | Default | d | 0.710 | |
P1V8VDDH_TSENSE_AMP_FB | Default | d | 0.710 | |
P1V8VDDH_TSENSE_AMP_IN | Default | d | 0.788 | |
P1V8VDDH_TSENSE_DIV | Default | d | 0.790 | |
P1V8VDDH_VOS1 | Default | d | 0.110 | |
P1V8VDDH_VOS3 | Default | d | 0.110 | |
P1V8VDDH_VPP | Default | d | 0.608 | |
P1V8VDDH_VSENSE | Default | d | 0.724 | |
P2V5_NAND0_BIAS | Default | d | 0.160 | |
P2V5_NAND0_BST | Default | d | 0.584 | |
P2V5_NAND0_BST_R | Default | d | 0.586 | |
P2V5_NAND0_EN | Default | d | 0.671 | |
P2V5_NAND0_EN_R | Default | d | 0.671 | |
P2V5_NAND0_FB | Default | d | 0.750 | |
P2V5_NAND0_FB_C | Default | d | OL | |
P2V5_NAND0_FB_RC | Default | d | 0.310 | |
P2V5_NAND0_FB_RC2 | Default | d | OL | |
P2V5_NAND0_FB_XW | Default | d | 0.300 | |
P2V5_NAND0_PGOOD | Default | d | 0.540 | |
P2V5_NAND0_RT | Default | d | 0.728 | |
P2V5_NAND0_SS | Default | d | -0.712 | |
P2V5_NAND0_SW | Default | d | 0.302 | |
P2V5_NAND0_VC | Default | d | 0.748 | |
P2V5_NAND0_VC_R | Default | d | OL | |
P3V3SD_AVIN | Default | d | 0.490 | |
P3V3SD_FB | Default | d | 1.400 | |
P3V3SD_FB_R | Default | d | OL | |
P3V3SD_FB_TOP | Default | d | 0.415 | |
P3V3SD_PG | Default | d | 0.511 | |
P3V3SD_PHASE | Default | d | 0.414 | |
P3V3SD_SS | Default | d | 0.750 | |
P3V3SD_VOS | Default | d | 0.424 | |
P3V8AONISEN_MUX_EN | Default | d | 0.530 | |
P3V8AONISEN_MUX_EN_L | Default | d | 0.560 | |
P3V8AON_BST1 | Default | d | 0.619 | |
P3V8AON_BST1_RC | Default | d | 0.621 | |
P3V8AON_BST2 | Default | d | 0.000 | |
P3V8AON_BST2_RC | Default | d | 0.612 | |
P3V8AON_BST3 | Default | d | 0.612 | |
P3V8AON_BST3_RC | Default | d | 0.612 | |
P3V8AON_DRVH1 | Default | d | 0.805 | |
P3V8AON_DRVH1_R | Default | d | 0.810 | |
P3V8AON_DRVH2 | Default | d | 0.805 | |
P3V8AON_DRVH2_R | Default | d | 0.805 | |
P3V8AON_DRVH3 | Default | d | 0.805 | |
P3V8AON_DRVH3_R | Default | d | 0.805 | |
P3V8AON_DRVL1 | Default | d | 0.670 | |
P3V8AON_DRVL1_R | Default | d | 0.670 | |
P3V8AON_DRVL2 | Default | d | 0.670 | |
P3V8AON_DRVL2_R | Default | d | 0.670 | |
P3V8AON_DRVL2_RR | Default | d | 0.670 | |
P3V8AON_DRVL3 | Default | d | 0.670 | |
P3V8AON_DRVL3_R | Default | d | 0.670 | |
P3V8AON_DRVL3_RR | Default | d | 0.670 | |
P3V8AON_FAULT_L | Default | d | 0.700 | |
P3V8AON_GPIO | Default | d | 0.590 | |
P3V8AON_HS_IOUT | Default | d | 0.720 | |
P3V8AON_ILIMIT_BUF_L | Default | d | 0.657 | |
P3V8AON_ILIMIT_DIV | Default | d | 0.714 | |
P3V8AON_IMON | Default | d | OL | |
P3V8AON_IMON_P3V8AON | Default | d | 0.777 | |
P3V8AON_ISEN1_N | Default | d | 0.160 | |
P3V8AON_ISEN1_P | Default | d | 0.160 | |
P3V8AON_ISEN2_N | Default | d | 0.163 | |
P3V8AON_ISEN2_P | Default | d | 0.165 | |
P3V8AON_ISEN3_N | Default | d | 0.160 | |
P3V8AON_ISEN3_P | Default | d | 0.160 | |
P3V8AON_ISENSE | Default | d | 0.733 | |
P3V8AON_ISENSE_EXT | Default | d | 0.650 | |
P3V8AON_ISENSE_EXT_R | Default | d | 0.734 | |
P3V8AON_ISEN_IN_N | Default | d | 0.595 | |
P3V8AON_ISEN_IN_N_FET | Default | d | 0.665 | |
P3V8AON_ISEN_IN_N_R | Default | d | 0.650 | |
P3V8AON_ISEN_IN_P | Default | d | 0.590 | |
P3V8AON_ISEN_IN_P_FET | Default | d | 0.660 | |
P3V8AON_ISEN_IN_P_R | Default | d | 0.675 | |
P3V8AON_ISNS1_N | Default | d | 0.160 | |
P3V8AON_ISNS1_P | Default | d | 0.160 | |
P3V8AON_ISNS2_N | Default | d | 0.160 | |
P3V8AON_ISNS2_P | Default | d | 0.160 | |
P3V8AON_ISNS3_N | Default | d | 0.160 | |
P3V8AON_ISNS3_P | Default | d | 0.160 | |
P3V8AON_LPM | Default | d | 0.685 | |
P3V8AON_LPM_R | Default | d | 0.700 | |
P3V8AON_PMU_VSENSE | Default | d | 0.724 | |
P3V8AON_PVCC | Default | d | 0.564 | |
P3V8AON_PWR_EN | Default | d | 0.587 | |
P3V8AON_PWR_EN_R | Default | d | 0.690 | |
P3V8AON_SNUB1 | Default | d | 0.160 | |
P3V8AON_SS | Default | d | 0.760 | |
P3V8AON_SW1 | Default | d | 0.160 | |
P3V8AON_SW2 | Default | d | 0.160 | |
P3V8AON_SW3 | Default | d | 0.160 | |
P3V8AON_VRTN | Default | d | 0.000 | |
P3V8AON_VSENSE | Default | d | 0.165 | |
P3V8AON_VSENSE_IN | Default | d | 0.160 | |
P3V8AON_VSNS_XW_N | Default | d | 0.000 | |
P3V8AON_VSNS_XW_P | Default | d | 0.161 | |
P3V8AON_VSW1 | Default | d | 0.160 | |
P5VS2TPS_AGND | Default | d | 0.000 | |
P5VS2TPS_AVIN | Default | d | 0.485 | |
P5VS2TPS_FB | Default | d | 1.400 | |
P5VS2TPS_FB_R | Default | d | OL | |
P5VS2TPS_FB_TOP | Default | d | 0.392 | |
P5VS2TPS_PGATE | Default | d | OL | |
P5VS2TPS_PGOOD | Default | d | 0.525 | |
P5VS2TPS_PHASE | Default | d | 0.390 | |
P5VS2TPS_PWR_EN | Default | d | 0.525 | |
P5VS2TPS_PWR_EN_R | Default | d | 0.525 | |
P5VS2TPS_PWR_EN_R_LDO | Default | d | 0.525 | |
P5VS2TPS_SS | Default | d | 0.750 | |
P5VS2TPS_VOS | Default | d | 0.400 | |
P5VS2_DSCHG | Default | d | 0.440 | |
P5VS2_DSCHG_EN | Default | d | 0.467 | |
P5VS2_DSCHG_EN_L | Default | d | 0.525 | |
P5VS2_HS_IOUT | Default | d | 0.720 | |
P5VS2_HS_ISENSE | Default | d | 0.731 | |
P5VS2_PWR_EN | Default | d | 0.700 | |
P5VUSB23_HS_ISENSE | Default | d | 0.734 | |
P5VUSBC01_AGND | Default | d | 0.000 | |
P5VUSBC01_BIAS | Default | d | 0.300 | |
P5VUSBC01_BST | Default | d | 0.586 | |
P5VUSBC01_BST_R | Default | d | 0.587 | |
P5VUSBC01_EN | Default | d | 0.672 | |
P5VUSBC01_EN_R | Default | d | 0.672 | |
P5VUSBC01_FB | Default | d | 0.750 | |
P5VUSBC01_FB_C | Default | d | OL | |
P5VUSBC01_FB_RC | Default | d | 0.310 | |
P5VUSBC01_FB_RC2 | Default | d | OL | |
P5VUSBC01_FB_XW | Default | d | 0.300 | |
P5VUSBC01_INTVCC | Default | d | 0.560 | |
P5VUSBC01_PGOOD | Default | d | 0.690 | |
P5VUSBC01_RT | Default | d | 0.735 | |
P5VUSBC01_SS | Default | d | 0.715 | |
P5VUSBC01_SW | Default | d | 0.300 | |
P5VUSBC01_VC | Default | d | 0.750 | |
P5VUSBC01_VC_R | Default | d | OL | |
P5VUSBC23_EN | Default | d | 0.642 | |
P5VUSBC23_EN_R | Default | d | 0.640 | |
P5VUSBC23_FB | Default | d | 1.400 | |
P5VUSBC23_FB_R | Default | d | 0.460 | |
P5VUSBC23_PGOOD | Default | d | 0.690 | |
P5VUSBC23_RA | Default | d | OL | |
P5VUSBC23_SS | Default | d | 0.540 | |
P5VUSBC23_SW1 | Default | d | 0.450 | |
P5VUSBC23_SW2 | Default | d | 0.450 | |
PBUS_VSENSE | Default | d | 0.727 | |
PBUS_VSNS_EN_L | Default | d | 0.436 | |
PBUS_VSNS_EN_L_DIV | Default | d | OL | |
PBUS_VSNS_IN | Default | d | 0.480 | |
PBUS_VSNS_OUT | Default | d | OL | |
PCIE_CLK100M_NAND1_2_3_N | Default | d | 0.332 | |
PCIE_CLK100M_NAND1_2_3_P | Default | d | 0.333 | |
PCIE_SD_UHS2_D2R_C_N | Default | d | 0.337 | |
PCIE_SD_UHS2_D2R_C_P | Default | d | 0.336 | |
PCIE_SD_UHS2_D2R_N | Default | d | 0.410 | |
PCIE_SD_UHS2_D2R_P | Default | d | 0.410 | |
PCIE_SD_UHS2_R2D_C_N | Default | d | 0.350 | |
PCIE_SD_UHS2_R2D_C_P | Default | d | 0.350 | |
PCIE_SD_UHS2_R2D_N | Default | d | 0.326 | |
PCIE_SD_UHS2_R2D_P | Default | d | 0.325 | |
PCIE_WLBT_D2R_C_N | Default | d | 0.306 | |
PCIE_WLBT_D2R_C_P | Default | d | 0.320 | |
PCIE_WLBT_D2R_N | Default | d | 0.400 | |
PCIE_WLBT_D2R_P | Default | d | 0.400 | |
PCIE_WLBT_R2D_C_N | Default | d | 0.351 | |
PCIE_WLBT_R2D_C_P | Default | d | 0.351 | |
PCIE_WLBT_R2D_N | Default | d | 0.296 | |
PCIE_WLBT_R2D_P | Default | d | 0.273 | |
PDCIN_DIO_G | Default | d | 1.220 | |
PDCIN_DIO_VCAP | Default | d | 1.280 | |
PDM_DMIC_CLK3 | Default | d | 0.300 | |
PDM_DMIC_CLK4 | Default | d | 0.294 | |
PDM_DMIC_DATA3 | Default | d | 0.300 | |
PDM_DMIC_DATA3_R | Default | d | 0.300 | |
PDM_DMIC_DATA4 | Default | d | 0.297 | |
PDM_DMIC_DATA4_R | Default | d | 0.297 | |
PD_ACE5_VCONN | Default | d | 0.542 | |
PD_UPC0_DBG6_R | Default | d | 0.700 | |
PD_UPC0_DBG7_R | Default | d | 0.700 | |
PD_UPC0_FORCE_PWR | Default | d | 0.710 | |
PD_UPC0_GPIO5 | Default | d | 0.600 | |
PD_UPC0_MRESET | Default | d | 0.675 | |
PD_UPC0_USBP3_RN | Default | d | 0.728 | |
PD_UPC0_USBP3_RP | Default | d | 0.727 | |
PD_UPC1_DBG0_R | Default | d | 0.705 | |
PD_UPC1_DBG1_R | Default | d | 0.700 | |
PD_UPC1_DBG2_R | Default | d | 0.700 | |
PD_UPC1_DBG3_R | Default | d | 0.700 | |
PD_UPC1_DBG4_R | Default | d | 0.700 | |
PD_UPC1_DBG5_R | Default | d | 0.700 | |
PD_UPC1_DBG6_R | Default | d | 0.700 | |
PD_UPC1_DBG7_R | Default | d | 0.700 | |
PD_UPC1_FORCE_PWR | Default | d | 0.712 | |
PD_UPC1_GPIO1 | Default | d | 0.690 | |
PD_UPC1_GPIO10 | Default | d | 0.713 | |
PD_UPC1_GPIO5 | Default | d | 0.600 | |
PD_UPC1_GPIO7 | Default | d | 0.710 | |
PD_UPC1_GPIO9 | Default | d | 0.710 | |
PD_UPC1_MRESET | Default | d | 0.690 | |
PD_UPC1_USBP2_RN | Default | d | 0.727 | |
PD_UPC1_USBP2_RP | Default | d | 0.724 | |
PD_UPC1_USBP3_RN | Default | d | 0.727 | |
PD_UPC1_USBP3_RP | Default | d | 0.726 | |
PD_UPC2_DBG0_R | Default | d | 0.700 | |
PD_UPC2_DBG1_R | Default | d | 0.700 | |
PD_UPC2_DBG2_R | Default | d | 0.700 | |
PD_UPC2_DBG3_R | Default | d | 0.700 | |
PD_UPC2_DBG4_R | Default | d | 0.699 | |
PD_UPC2_DBG5_R | Default | d | 0.700 | |
PD_UPC2_DBG6_R | Default | d | 0.700 | |
PD_UPC2_DBG7_R | Default | d | 0.690 | |
PD_UPC2_FORCE_PWR | Default | d | 0.710 | |
PD_UPC2_GPIO10 | Default | d | 0.710 | |
PD_UPC2_GPIO5 | Default | d | 0.600 | |
PD_UPC2_GPIO7 | Default | d | 0.700 | |
PD_UPC2_GPIO9 | Default | d | 0.700 | |
PD_UPC2_MRESET | Default | d | 0.690 | |
PD_UPC2_USBP2_RN | Default | d | 0.725 | |
PD_UPC2_USBP2_RP | Default | d | 0.722 | |
PD_UPC2_USBP3_RN | Default | d | 0.725 | |
PD_UPC2_USBP3_RP | Default | d | 0.725 | |
PD_UPC5_DBG_R | Default | d | 0.630 | |
PD_UPC5_MRESET | Default | d | 0.700 | |
PD_UPC5_PORT_MUX | Default | d | 0.755 | |
PIND_PFET_EN | Default | d | 0.490 | |
PMUX_STAT | Default | d | 0.550 | |
PMU_ACTIVE_READY | Default | d | 0.413 | |
PMU_CLK32K_CLVR | Default | d | 0.445 | |
PMU_CLK32K_CLVR_R | Default | d | 0.470 | |
PMU_CLK32K_SOC | Default | d | 0.300 | |
PMU_CLK32K_SOC_R | Default | d | 0.320 | |
PMU_CLK32K_WLBT | Default | d | 0.475 | |
PMU_CLK32K_WLBT_R | Default | d | 0.495 | |
PMU_CRASH_L | Default | d | 0.440 | |
PMU_CRASH_SLAVE_L | Default | d | 0.727 | |
PMU_FORCE_DFU | Default | d | 0.746 | |
PMU_ONOFF_L | Default | d | 0.680 | |
PMU_ONOFF_L_CONN | Default | d | 0.680 | |
PMU_RESET_L | Default | d | 0.310 | |
PMU_RSLOC_RST_L | Default | d | 0.522 | |
PMU_SHDN | Default | d | 0.760 | |
PMU_SHDN_DBG | Default | d | OL | |
PMU_SYS_ALIVE | Default | d | 0.557 | |
PMU_VDDHI | Default | d | 0.684 | |
PMU_WAKE2MS | Default | d | 0.728 | |
PP0V575_S1_VDDQ0 | Default | d | 0.120 | |
PP0V575_S1_VDDQ0 | Default | r | 0.120R | |
PP0V575_S1_VDDQ1 | Default | d | 0.128 | |
PP0V575_S1_VDDQ1 | Default | r | 126.000 | |
PP0V72_S2_VDDLOW | Default | d | 0.250 | |
PP0V81_S1_SRAM | Default | d | 0.210 | |
PP0V81_S1_SRAM | Default | r | 206.000 | |
PP0V855_S2SW_VDDCIO | Default | d | 0.190 | |
PP0V855_S2SW_VDDCIO | Default | r | 0.900R | |
PP0V8_S2_CLVR_VDDDIG | Default | d | 0.310 | |
PP0V95_S2SW_VDD2L | Default | d | 0.320 | |
PP0V95_S2SW_VDD2L | Default | r | 0.002R | |
PP0V9_ATCRTMR0_LC | Default | d | 0.350 | |
PP0V9_ATCRTMR0_LVR | Default | d | 0.505 | |
PP0V9_ATCRTMR0_SVR | Default | d | 0.375 | |
PP0V9_ATCRTMR0_SVR_IND | Default | d | 0.375 | |
PP0V9_ATCRTMR1_LVR | Default | d | 0.505 | |
PP0V9_ATCRTMR1_SVR | Default | d | 0.379 | |
PP0V9_ATCRTMR1_SVR_IND | Default | d | 0.379 | |
PP0V9_ATCRTMR2_LC | Default | d | 0.370 | |
PP0V9_ATCRTMR2_LVR | Default | d | 0.520 | |
PP0V9_ATCRTMR2_SVR | Default | d | 0.400 | |
PP0V9_NAND0 | Default | d | 0.345 | |
PP0V9_NAND0_FB_DIS | Default | d | 0.332 | |
PP0V9_NAND0_S5E0_VDD_PLL | Default | d | 0.345 | |
PP0V9_NAND0_S5E1_VDD_PLL | Default | d | 0.344 | |
PP0V9_NAND0_S5E2_VDD_PLL | Default | d | 0.345 | |
PP0V9_NAND0_S5E3_VDD_PLL | Default | d | 0.345 | |
PP16V0_TOUCHID | Default | d | 0.650 | |
PP16V0_TOUCHID_FILT_CONN | Default | d | 0.640 | |
PP16V0_TOUCHID_SW | Default | d | 0.160 | |
PP17V0_LDOIN | Default | d | 0.590 | |
PP1V2_AON | Default | d | 0.660 | |
PP1V2_AON_SPMU | Default | d | 0.674 | |
PP1V2_AWAKE | Default | d | 0.255 | |
PP1V2_AWAKE | Default | r | 1.500k | |
PP1V2_AWAKESW_BLC | Default | d | 0.700 | |
PP1V2_AWAKESW_BLC | Default | r | 47.000k | |
PP1V2_CODEC_VL_VD | Default | d | 0.240 | |
PP1V2_DP2HDMI_DIG | Default | d | 0.240 | |
PP1V2_DP2HDMI_TX_RX_PLL_OSC | Default | d | 0.243 | |
PP1V2_GL | Default | d | 0.593 | |
PP1V2_GL_LOOP | Default | d | 0.468 | |
PP1V2_GL_LOOP_FL | Default | d | 0.468 | |
PP1V2_NAND0 | Default | d | 0.305 | |
PP1V2_NAND0_FB_DIS | Default | d | 0.304 | |
PP1V2_NAND0_S5E0_PCI_AVDD_H | Default | d | 0.305 | |
PP1V2_NAND0_S5E1_PCI_AVDD_H | Default | d | 0.305 | |
PP1V2_NAND0_S5E2_PCI_AVDD_H | Default | d | 0.305 | |
PP1V2_NAND0_S5E3_AVDD1X_PLL | Default | d | 0.305 | |
PP1V2_NAND0_S5E3_PCI_AVDD_H | Default | d | 0.305 | |
PP1V2_S2 | Default | d | 0.260 | |
PP1V2_S2 | Default | r | 0.001R | |
PP1V2_S2_CLVR_VDDIO | Default | d | 0.445 | |
PP1V2_S2_DP2HDMI | Default | d | 0.240 | |
PP1V2_UPCPMURESET | Default | d | 0.260 | |
PP1V5_AON_VCORE_SPMU | Default | d | 0.391 | |
PP1V5_AON_VRTC_MPMU | Default | d | 0.393 | |
PP1V5_AON_VRTC_SPMU | Default | d | 0.392 | |
PP1V5_P1V8VDDH_LDO15 | Default | d | 0.448 | |
PP1V5_UPC0_LDO_CORE | Default | d | 0.515 | |
PP1V5_UPC1_LDO_CORE | Default | d | 0.514 | |
PP1V5_UPC2_LDO_CORE | Default | d | 0.514 | |
PP1V5_UPC5_LDO_CORE | Default | d | 0.516 | |
PP1V85_S2_IPD | Default | d | 0.432 | |
PP1V8_AON | Default | d | 0.440 | |
PP1V8_AON_SPMU | Default | d | 0.543 | |
PP1V8_AWAKE | Default | d | 0.366 | |
PP1V8_CODEC_VA | Default | d | 0.365 | |
PP1V8_CODEC_VCP | Default | d | 0.365 | |
PP1V8_DMIC | Default | d | 0.258 | |
PP1V8_GL_SDCONN | Default | d | 0.456 | |
PP1V8_MIXEDIO_VDD | Default | d | 0.284 | |
PP1V8_S1_CLVR_VDDH | Default | d | 0.110 | |
PP1V8_S1_CLVR_VDDH | Default | r | 106.000 | |
PP1V8_S2 | Default | d | 0.255 | |
PP1V8_S2 | Default | r | 2.200k | |
PP1V8_S2SW | Default | d | 0.350 | |
PP1V8_S2SW | Default | r | 0.002R | |
PP1V8_S2SW_CLVR_VDDC1_LDO | Default | d | 0.517 | |
PP1V8_S2SW_DP2HDMI | Default | d | 0.284 | |
PP1V8_S2SW_SNS | Default | d | 0.510 | |
PP1V8_S2_HDMI | Default | d | 0.255 | |
PP1V8_S2_IMU_FILT | Default | d | 0.260 | |
PP1V8_TOUCHID | Default | d | 0.500 | |
PP1V8_TOUCHID_FILT_CONN | Default | d | 0.500 | |
PP2V5_NAND0 | Default | d | 0.302 | |
PP2V5_NAND0_INTVCC | Default | d | 0.562 | |
PP2V5_VREF_P3V8AONILIMIT | Default | d | 0.593 | |
PP3V0_TOUCHID | Default | d | 0.560 | |
PP3V0_TOUCHID_FILT_CONN | Default | d | 0.560 | |
PP3V3_AON | Default | d | 0.412 | |
PP3V3_AON_KBD_CONN | Default | d | 0.410 | |
PP3V3_ATCRTMR0_SVR | Default | d | 0.450 | |
PP3V3_ATCRTMR0_VCCA | Default | d | 0.450 | |
PP3V3_ATCRTMR1_ANA | Default | d | 0.554 | |
PP3V3_ATCRTMR1_LC | Default | d | 0.575 | |
PP3V3_ATCRTMR1_SVR | Default | d | 0.450 | |
PP3V3_ATCRTMR1_VCCA | Default | d | 0.450 | |
PP3V3_ATCRTMR2_ANA | Default | d | 0.555 | |
PP3V3_ATCRTMR2_LC | Default | d | 0.574 | |
PP3V3_ATCRTMR2_SVR | Default | d | 0.451 | |
PP3V3_ATCRTMR2_VCCA | Default | d | 0.451 | |
PP3V3_AWAKE_SW_SD | Default | d | 0.414 | |
PP3V3_AWAKE_SW_SD_FL | Default | d | 0.414 | |
PP3V3_DP2HDMI_AUX_IO | Default | d | 0.270 | |
PP3V3_DP2HDMI_RX_TX | Default | d | 0.270 | |
PP3V3_GL_SDCONN | Default | d | 0.456 | |
PP3V3_HVLDO_OUT | Default | d | 0.693 | |
PP3V3_KBD_LEDDRIVER | Default | d | 0.533 | |
PP3V3_S2 | Default | d | 0.400 | |
PP3V3_S2SW_DP2HDMI | Default | d | 0.270 | |
PP3V3_S2SW_USBC0 | Default | d | 0.450 | |
PP3V3_S2SW_USBC1 | Default | d | 0.450 | |
PP3V3_S2SW_USBC2 | Default | d | 0.450 | |
PP3V3_S2_FAN_LS | Default | d | 0.400 | |
PP3V3_S2_IPD | Default | d | 0.535 | |
PP3V3_SW_ACE5 | Default | d | 0.547 | |
PP3V3_UPC0_LDO | Default | d | 0.485 | |
PP3V3_UPC1_LDO | Default | d | 0.485 | |
PP3V3_UPC2_LDO | Default | d | 0.480 | |
PP3V3_UPC5_LDO | Default | d | 0.500 | |
PP3V3_VREF_SD_CLKREQ_LS | Default | d | 0.640 | |
PP3V8AON_PH1 | Default | d | 0.160 | |
PP3V8AON_PH2 | Default | d | 0.160 | |
PP3V8AON_PH3 | Default | d | 0.160 | |
PP3V8_AON | Default | d | 0.160 | |
PP3V8_AON_MPMU | Default | d | 0.160 | |
PP3V8_AON_SPMU | Default | d | 0.160 | |
PP3V8_AON_WLBT | Default | d | 0.160 | |
PP3V8_ATC01_LDO | Default | d | 0.161 | |
PP3V8_ATC2_LDO | Default | d | 0.160 | |
PP3V8_AWAKE_BKLTCONN | Default | d | 0.700 | |
PP3V8_AWAKE_TCON | Default | d | 0.535 | |
PP3V8_CODEC_VP | Default | d | 0.160 | |
PP3V8_IPDLDO_VIN | Default | d | 0.158 | |
PP4V9_VPUMP_MPMU | Default | d | 0.621 | |
PP4V9_VPUMP_SPMU | Default | d | 0.627 | |
PP5V0_HDMI_DDC_CONN | Default | d | 0.590 | |
PP5V0_HDMI_DDC_LDSW | Default | d | 0.590 | |
PP5V0_S2SW_HDMI_D | Default | d | 0.720 | |
PP5V_AON_P3V8AON | Default | d | 0.525 | |
PP5V_CHGR | Default | d | 0.549 | |
PP5V_CHGR_SW | Default | d | 0.463 | |
PP5V_KBDBKLT | Default | d | 0.390 | |
PP5V_KBDBKLT_BEN_A | Default | d | 0.400 | |
PP5V_KBDBKLT_BEN_D | Default | d | 0.400 | |
PP5V_P1V8VDDH_CTRL_VCC | Default | d | 0.391 | |
PP5V_P1V8VDDH_DRMOS_VCC1 | Default | d | 0.390 | |
PP5V_P1V8VDDH_DRMOS_VCC2 | Default | d | 0.390 | |
PP5V_S2SW_USBC01 | Default | d | 0.300 | |
PP5V_S2SW_USBC23 | Default | d | 0.450 | |
PP5V_S2_CAMERA | Default | d | 0.390 | |
PP5V_S2_HDMI | Default | d | 0.526 | |
PP5V_S2_HDMI_LDO | Default | d | 0.390 | |
PP5V_S2_LUXE_VDDA | Default | d | 0.400 | |
PP5V_S2_MAIN | Default | d | 0.390 | |
PP5V_S2_TPAD_CONN | Default | d | 0.390 | |
PPBCON_AWAKESW_BKLTCONN | Default | d | OL | |
PPBUS_AON | Default | d | 0.480 | |
PPBUS_AONSW_FAN_LEFT | Default | d | OL | |
PPBUS_AON_FAN0_CONN | Default | d | OL | |
PPBUS_AON_FAN0_FILT_L | Default | d | OL | |
PPBUS_AON_FAN1_FILT | Default | d | OL | |
PPBUS_AON_FAN1_FILT_L | Default | d | OL | |
PPBUS_AON_LUXE | Default | d | 0.480 | |
PPBUS_AON_MPMU | Default | d | 0.480 | |
PPBUS_AON_P3V8AONISEN | Default | d | 0.559 | |
PPBUS_AON_SPKRAMP_ABC | Default | d | 0.480 | |
PPBUS_NAND0 | Default | d | 0.480 | |
PPBUS_NAND1 | Default | d | 0.480 | |
PPCHGR_VDDA | Default | d | 0.465 | |
PPCHGR_VDDP | Default | d | 0.463 | |
PPDCIN_AON | Default | d | 0.580 | |
PPDCIN_AON_CHGR | Default | d | 0.620 | |
PPDCIN_AON_CHGR_R | Default | d | 0.620 | |
PPHV_DIV | Default | d | 0.585 | |
PPHV_INT0_AONSW | Default | d | 0.580 | |
PPHV_INT1_AONSW | Default | d | 0.580 | |
PPHV_INT2_AONSW | Default | d | 0.580 | |
PPHV_INT5_AONSW | Default | d | 0.620 | |
PPLUXE_INPUT_R_V | Default | d | 0.480 | |
PPLUXE_LX1 | Default | d | 0.530 | |
PPLUXE_LX1 | Default | r | 0.340R | |
PPLUXE_LX2 | Default | d | 0.530 | |
PPLUXE_LX2 | Default | r | 0.340R | |
PPPANEL_PANEL_DISCHARGE | Default | d | 0.420 | |
PPPANEL_SW_LCD_REG | Default | d | 0.535 | |
PPVBAT_AON | Default | d | 1.630 | |
PPVBAT_AON_CHGR_R | Default | d | 0.480 | |
PPVBAT_AON_CHGR_REG | Default | d | 0.480 | |
PPVBUS_MID | Default | d | OL | |
PPVBUS_USBC0 | Default | d | 0.136 | |
PPVBUS_USBC1 | Default | d | 0.137 | |
PPVBUS_USBC2 | Default | d | 0.134 | |
PPVBUS_USBC5 | Default | d | 0.190 | |
PPVDD2H0_S2SW | Default | d | 0.070 | |
PPVDD2H0_S2SW | Default | r | 68.000R | |
PPVDD2H1_S2SW | Default | d | 0.073 | |
PPVDD2H1_S2SW | Default | r | 70.000R | |
PPVDD_AMPH0_S2SW | Default | d | 0.440 | |
PPVDD_AMPH0_S2SW | Default | r | 0.003R | |
PPVDD_AMPH1_S2SW | Default | d | 0.440 | |
PPVDD_AMPH1_S2SW | Default | r | 0.018R | |
PPVDD_AVEMSR_AWAKESW | Default | d | 0.280 | |
PPVDD_AVEMSR_AWAKESW | Default | r | 275.000 | |
PPVDD_CHGRRST | Default | d | 0.442 | |
PPVDD_DCS_S1 | Default | d | 0.220 | |
PPVDD_DCS_S1 | Default | r | 0.220R | |
PPVDD_DISP_AWAKESW | Default | d | 0.210 | |
PPVDD_DISP_AWAKESW | Default | r | 206.000 | |
PPVDD_ECPU_AWAKE | Default | d | 0.275 | |
PPVDD_ECPU_AWAKE | Default | r | 270.000 | |
PPVDD_ECPU_SRAM_AWAKE | Default | d | 0.420 | |
PPVDD_ECPU_SRAM_AWAKE | Default | r | 0.003R | |
PPVDD_FIXED_S1 | Default | d | 0.231 | |
PPVDD_FIXED_S1 | Default | r | 227.000 | |
PPVDD_GPU_BMPR_S1 | Default | d | 0.311 | |
PPVDD_GPU_BMPR_S1 | Default | r | 307.000 | |
PPVDD_LDO_NAND0_OCARINA | Default | d | 0.359 | |
PPVDD_P2V5VREF | Default | d | 0.390 | |
PPVDD_P3V8AONISEN | Default | d | 0.390 | |
PPVDD_SOC_S1 | Default | d | 0.150 | |
PPVDD_SOC_S1 | Default | r | 140.000 | |
PPVIN_5VUSBC01 | Default | d | 0.480 | |
PPVIN_5VUSBC23 | Default | d | 0.480 | |
PPVIN_P1V8VDDH | Default | d | 0.480 | |
PPVIN_P1V8VDDH_CTRL_VIN | Default | d | 0.478 | |
PPVIN_P3V3SD | Default | d | 0.480 | |
PPVIN_P3V8AON | Default | d | 0.480 | |
PPVIN_P3V8NAND0 | Default | d | 0.161 | |
PPVIN_P5VS2 | Default | d | 0.480 | |
PPVOUT_KBDLED_CONN | Default | d | 0.580 | |
PPVOUT_LUXE | Default | d | 0.625 | |
PPVOUT_LUXE_XW | Default | d | 0.625 | |
PP_SDCARD_VUHI | Default | d | 0.385 | |
PVOUT_LUXE_R | Default | d | 0.622 | |
RF_ANT_0 | Default | d | OL | |
RF_ANT_1 | Default | d | OL | |
RF_BT_DED_ANT | Default | d | 0.001 | |
ROM_UPC0_HOLD_L | Default | d | 0.700 | |
ROM_UPC0_WP_L | Default | d | 0.670 | |
ROM_UPC1_HOLD_L | Default | d | 0.705 | |
ROM_UPC1_WP_L | Default | d | 0.675 | |
ROM_UPC23_HOLD_L | Default | d | 0.700 | |
ROM_UPC23_WP_L | Default | d | 0.672 | |
ROM_UPC5_HOLD_L | Default | d | 0.700 | |
ROM_UPC5_WP_L | Default | d | 0.670 | |
RSLOC_RST_L | Default | d | 0.490 | |
SAVE_BAT_D | Default | d | 1.625 | |
SAVE_BAT_G | Default | d | 0.752 | |
SAVE_BAT_S | Default | d | 1.627 | |
SDCARD_RREF | Default | d | 0.450 | |
SDCONN_CLK | Default | d | 0.435 | |
SDCONN_CLK_CONN | Default | d | 0.438 | |
SDCONN_CLK_CONN_FL | Default | d | 0.438 | |
SDCONN_CLK_R | Default | d | 0.438 | |
SDCONN_CMD | Default | d | 0.433 | |
SDCONN_CMD_R | Default | d | 0.435 | |
SDCONN_CMD_R_FL | Default | d | 0.435 | |
SDCONN_D0 | Default | d | 0.428 | |
SDCONN_D0_R | Default | d | 0.430 | |
SDCONN_D0_R_FL | Default | d | 0.430 | |
SDCONN_D1 | Default | d | 0.428 | |
SDCONN_D1_R | Default | d | 0.430 | |
SDCONN_D1_R_FL | Default | d | 0.430 | |
SDCONN_D2 | Default | d | 0.433 | |
SDCONN_D2_R | Default | d | 0.435 | |
SDCONN_D2_R_FL | Default | d | 0.435 | |
SDCONN_D3 | Default | d | 0.433 | |
SDCONN_D3_R | Default | d | 0.435 | |
SDCONN_D3_R_FL | Default | d | 0.435 | |
SDCONN_DETECT | Default | d | 0.022 | |
SDCONN_DETECT_R | Default | d | 0.001 | |
SDCONN_SD0_UHS2_N | Default | d | 0.321 | |
SDCONN_SD0_UHS2_P | Default | d | 0.321 | |
SDCONN_SD0_UHS2_R_N | Default | d | 0.325 | |
SDCONN_SD0_UHS2_R_P | Default | d | 0.324 | |
SDCONN_SD1_UHS2_N | Default | d | 0.320 | |
SDCONN_SD1_UHS2_P | Default | d | 0.322 | |
SDCONN_WP | Default | d | 0.023 | |
SD_DETECT | Default | d | 0.578 | |
SD_EXP_CLKREQ_L | Default | d | 0.290 | |
SD_EXP_RESET_L | Default | d | 0.300 | |
SD_PWR_EN | Default | d | 0.560 | |
SD_UHS2_CLKREQ_3V3_L | Default | d | 59.000 | |
SD_UHS2_CLKREQ_L | Default | d | 0.300 | |
SD_UHS2_RESET_3V3_L | Default | d | 0.443 | |
SD_UHS2_RESET_L | Default | d | 0.290 | |
SD_WAKE_L | Default | d | 0.595 | |
SENSE_PPDCIN_DEBUG | Default | d | OL | |
SE_CTLR_FW_DWLD | Default | d | 0.470 | |
SE_DEV_WAKE | Default | d | 0.470 | |
SGPIO_PMU_CLVR0_CLK | Default | d | 0.455 | |
SGPIO_PMU_CLVR0_DATA | Default | d | 0.454 | |
SGPIO_PMU_CLVR1_CLK | Default | d | 0.460 | |
SGPIO_PMU_CLVR1_DATA | Default | d | 0.460 | |
SGPIO_PMU_CLVR4_CLK | Default | d | 0.470 | |
SGPIO_PMU_CLVR4_DATA | Default | d | 0.450 | |
SGPIO_PMU_CLVR_CLK | Default | d | 0.450 | |
SGPIO_PMU_CLVR_CLK_R | Default | d | 0.473 | |
SGPIO_PMU_DATA | Default | d | 0.455 | |
SGPIO_PMU_DATA_R | Default | d | 0.476 | |
SGPIO_PMU_SPMU_CLK | Default | d | 0.729 | |
SGPIO_PMU_SPMU_CLK_R | Default | d | 0.728 | |
SGPIO_PMU_SPMU_DATA | Default | d | 0.473 | |
SMBUS_BATT_SCL | Default | d | 0.530 | |
SMBUS_BATT_SDA | Default | d | 0.525 | |
SMC_FAN_0_PWM | Default | d | 0.300 | |
SMC_FAN_0_PWM_3V3 | Default | d | 0.445 | |
SMC_FAN_0_TACH | Default | d | 0.300 | |
SMC_FAN_1_PWM | Default | d | 0.300 | |
SMC_FAN_1_PWM_3V3 | Default | d | 0.445 | |
SMC_FAN_1_TACH | Default | d | 0.300 | |
SOC_DFU_STATUS | Default | d | 0.300 | |
SOC_DOCK_CONNECT | Default | d | 0.300 | |
SOC_DOMAIN_HGPIO_GRP0_0 | Default | d | 0.290 | |
SOC_DOMAIN_HGPIO_GRP0_1 | Default | d | 0.300 | |
SOC_FORCE_DFU | Default | d | 0.300 | |
SOC_FORCE_DFU_DBG | Default | d | OL | |
SOC_JTAG_TDO | Default | d | 0.296 | |
SOC_LPDPRX_RCAL_N | Default | d | 0.386 | |
SOC_LPDPRX_RCAL_P | Default | d | 0.509 | |
SOC_LPDPTX0_RCAL_N | Default | d | 0.385 | |
SOC_LPDPTX0_RCAL_P | Default | d | 0.510 | |
SOC_LPDPTX1_RCAL_N | Default | d | 0.385 | |
SOC_LPDPTX1_RCAL_P | Default | d | 0.500 | |
SOC_ST0_PCIE_RCAL_N | Default | d | 0.385 | |
SOC_ST0_PCIE_RCAL_P | Default | d | 0.513 | |
SOC_ST1_PCIE_RCAL_N | Default | d | 0.384 | |
SOC_ST1_PCIE_RCAL_P | Default | d | 0.514 | |
SOC_SW_DBG | Default | d | 0.300 | |
SOC_THMSNS_1 | Default | d | 0.773 | |
SPI_AOP_IMU_MISO_1V8_R | Default | d | 0.717 | |
SPI_AOP_IMU_MOSI_1V8 | Default | d | 0.520 | |
SPI_AOP_IMU_SCLK_1V8 | Default | d | 0.505 | |
SPI_AOP_LAS_IMU_MISO_1V8 | Default | d | 0.730 | |
SPI_AOP_LAS_MOSI_1V8 | Default | d | 0.525 | |
SPI_AOP_LAS_SCLK_1V8 | Default | d | 0.517 | |
SPI_AOP_SENSOR_CLK | Default | d | 0.318 | |
SPI_AOP_SENSOR_MISO | Default | d | 0.310 | |
SPI_AOP_SENSOR_MISO_R | Default | d | 0.330 | |
SPI_AOP_SENSOR_MOSI | Default | d | 0.317 | |
SPI_AOP_SENSOR_MOSI_1V8_R | Default | d | 0.505 | |
SPI_AOP_SENSOR_SCLK_1V8_R | Default | d | 0.497 | |
SPI_ATCRTMR0_R_CLK | Default | d | 0.540 | |
SPI_ATCRTMR0_R_CS_L | Default | d | 0.550 | |
SPI_ATCRTMR0_R_MISO | Default | d | 0.550 | |
SPI_ATCRTMR0_R_MOSI | Default | d | 0.560 | |
SPI_ATCRTMR1_R_CLK | Default | d | 0.702 | |
SPI_ATCRTMR2_R_CLK | Default | d | 0.570 | |
SPI_ATCRTMR2_R_CS_L | Default | d | 0.600 | |
SPI_ATCRTMR2_R_MISO | Default | d | 0.595 | |
SPI_ATCRTMR2_R_MOSI | Default | d | 0.600 | |
SPI_DISP_BKLT_CLK | Default | d | 0.317 | |
SPI_DISP_BKLT_CLK_CONN | Default | d | 0.320 | |
SPI_DISP_BKLT_CS_L | Default | d | 0.300 | |
SPI_DISP_BKLT_MISO | Default | d | 0.297 | |
SPI_DISP_BKLT_MISO_CONN | Default | d | 0.300 | |
SPI_DISP_BKLT_MOSI | Default | d | 0.317 | |
SPI_DISP_BKLT_MOSI_CONN | Default | d | 0.320 | |
SPI_DP2HDMI_CLK | Default | d | 0.450 | |
SPI_DP2HDMI_CLK_R | Default | d | 0.460 | |
SPI_DP2HDMI_DI | Default | d | 0.449 | |
SPI_DP2HDMI_DI_R | Default | d | 0.440 | |
SPI_DP2HDMI_DO | Default | d | 0.440 | |
SPI_DP2HDMI_DO_R | Default | d | 0.450 | |
SPI_DP2HDMI_HOLD_L | Default | d | 0.300 | |
SPI_DP2HDMI_HOLD_L_1V8 | Default | d | 0.424 | |
SPI_DP2HDMI_WP_L | Default | d | 0.440 | |
SPI_GYRO_CS_1V8_L | Default | d | 0.456 | |
SPI_IPD_CLK | Default | d | 0.311 | |
SPI_IPD_CS_L | Default | d | 0.292 | |
SPI_IPD_MISO | Default | d | 0.292 | |
SPI_IPD_MISO_R | Default | d | 0.312 | |
SPI_IPD_MOSI | Default | d | 0.313 | |
SPI_LAS_CS_1V8_L | Default | d | 0.455 | |
SPI_LAS_CS_L | Default | d | 0.300 | |
SPI_SOCROM_1V8_CLK | Default | d | 0.580 | |
SPI_SOCROM_1V8_CLK_R | Default | d | 0.555 | |
SPI_SOCROM_1V8_CS_L | Default | d | 0.450 | |
SPI_SOCROM_1V8_MISO | Default | d | 0.430 | |
SPI_SOCROM_1V8_MISO_R | Default | d | 0.450 | |
SPI_SOCROM_1V8_MOSI | Default | d | 0.470 | |
SPI_SOCROM_1V8_MOSI_R | Default | d | 0.480 | |
SPI_SOCROM_CS_L | Default | d | 0.290 | |
SPI_SOCROM_MISO | Default | d | 0.300 | |
SPI_SOCROM_MISO_R | Default | d | 0.330 | |
SPI_SOCROM_WP_L | Default | d | 0.530 | |
SPI_TCON_CLK | Default | d | 0.330 | |
SPI_TCON_CLK_CONN | Default | d | 0.330 | |
SPI_TCON_CS_L | Default | d | 0.300 | |
SPI_TCON_MISO | Default | d | 0.300 | |
SPI_TCON_MISO_CONN | Default | d | 0.300 | |
SPI_TCON_MOSI | Default | d | 0.330 | |
SPI_TCON_MOSI_CONN | Default | d | 0.330 | |
SPI_TOUCHID_CLK | Default | d | 0.321 | |
SPI_TOUCHID_CLK_1V8 | Default | d | 0.522 | |
SPI_TOUCHID_CLK_1V8_CONN | Default | d | 0.520 | |
SPI_TOUCHID_CLK_1V8_R | Default | d | 0.488 | |
SPI_TOUCHID_MISO_1V8 | Default | d | 0.580 | |
SPI_TOUCHID_MISO_1V8_CONN | Default | d | 0.580 | |
SPI_TOUCHID_MOSI | Default | d | 0.318 | |
SPI_TOUCHID_MOSI_1V8 | Default | d | 0.525 | |
SPI_TOUCHID_MOSI_1V8_CONN | Default | d | 0.520 | |
SPI_TOUCHID_MOSI_1V8_R | Default | d | 0.488 | |
SPI_TPAD_CLK_CONN | Default | d | 0.525 | |
SPI_TPAD_CLK_CONN_R | Default | d | 0.498 | |
SPI_TPAD_CS_CONN_L | Default | d | 0.660 | |
SPI_TPAD_EN_CONN | Default | d | 0.647 | |
SPI_TPAD_INT_CONN_L | Default | d | 0.800 | |
SPI_TPAD_MISO_CONN | Default | d | 0.500 | |
SPI_TPAD_MOSI_CONN | Default | d | 0.520 | |
SPI_TPAD_MOSI_CONN_R | Default | d | 0.500 | |
SPI_UPC0_CLK | Default | d | 0.540 | |
SPI_UPC0_CLK_DBG | Default | d | 0.650 | |
SPI_UPC0_CS_L | Default | d | 0.550 | |
SPI_UPC0_MISO | Default | d | 0.550 | |
SPI_UPC0_MOSI | Default | d | 0.560 | |
SPI_UPC0_R_CLK | Default | d | 0.555 | |
SPI_UPC0_R_CS_L | Default | d | 0.480 | |
SPI_UPC0_R_MISO | Default | d | 0.565 | |
SPI_UPC0_R_MOSI | Default | d | 0.570 | |
SPI_UPC1_CLK | Default | d | 0.603 | |
SPI_UPC1_CLK_DBG | Default | d | 0.700 | |
SPI_UPC1_CS_L | Default | d | 0.677 | |
SPI_UPC1_MISO | Default | d | 0.683 | |
SPI_UPC1_MOSI | Default | d | 0.387 | |
SPI_UPC1_R_CLK | Default | d | 0.616 | |
SPI_UPC1_R_CS_L | Default | d | 0.680 | |
SPI_UPC1_R_MOSI | Default | d | 0.690 | |
SPI_UPC23_CLK | Default | d | 0.570 | |
SPI_UPC23_CLK_DBG | Default | d | 0.670 | |
SPI_UPC23_CS_L | Default | d | 0.600 | |
SPI_UPC23_MISO | Default | d | 0.605 | |
SPI_UPC23_MOSI | Default | d | 0.610 | |
SPI_UPC23_R_CLK | Default | d | 0.585 | |
SPI_UPC23_R_CS_L | Default | d | 0.615 | |
SPI_UPC23_R_MISO | Default | d | 0.620 | |
SPI_UPC23_R_MOSI | Default | d | 0.621 | |
SPI_UPC5_CLK | Default | d | 0.600 | |
SPI_UPC5_CS_L | Default | d | 0.680 | |
SPI_UPC5_MISO | Default | d | 0.680 | |
SPI_UPC5_MOSI | Default | d | 0.690 | |
SPI_UPC5_R_MISO | Default | d | 0.690 | |
SPKRAMP_ABC_ICC | Default | d | 0.410 | |
SPKRAMP_A_ADDR | Default | d | 0.000 | |
SPKRAMP_A_BOOTN | Default | d | 0.697 | |
SPKRAMP_A_BOOTP | Default | d | 0.697 | |
SPKRAMP_A_DREG | Default | d | 0.557 | |
SPKRAMP_A_ICC_R | Default | d | 0.423 | |
SPKRAMP_A_OUTN | Default | d | 0.461 | |
SPKRAMP_A_OUTN_R | Default | d | 0.461 | |
SPKRAMP_A_OUTP | Default | d | 0.462 | |
SPKRAMP_A_OUTP_R | Default | d | 0.462 | |
SPKRAMP_A_PVDD_SNS | Default | d | 0.480 | |
SPKRAMP_A_VSENSEN | Default | d | 0.461 | |
SPKRAMP_A_VSENSEP | Default | d | 0.462 | |
SPKRAMP_B_ADDR | Default | d | 0.400 | |
SPKRAMP_B_BOOTN | Default | d | 0.697 | |
SPKRAMP_B_BOOTP | Default | d | 0.697 | |
SPKRAMP_B_DREG | Default | d | 0.556 | |
SPKRAMP_B_ICC_R | Default | d | 0.425 | |
SPKRAMP_B_OUTN | Default | d | 0.465 | |
SPKRAMP_B_OUTN_R | Default | d | 0.465 | |
SPKRAMP_B_OUTP | Default | d | 0.468 | |
SPKRAMP_B_OUTP_R | Default | d | 0.468 | |
SPKRAMP_B_PVDD_SNS | Default | d | 0.480 | |
SPKRAMP_B_VSENSEN | Default | d | 0.465 | |
SPKRAMP_B_VSENSEP | Default | d | 0.468 | |
SPKRAMP_C_ADDR | Default | d | 0.460 | |
SPKRAMP_C_BOOTN | Default | d | 0.696 | |
SPKRAMP_C_BOOTP | Default | d | 0.695 | |
SPKRAMP_C_DREG | Default | d | 0.560 | |
SPKRAMP_C_ICC_R | Default | d | 0.420 | |
SPKRAMP_C_OUTN | Default | d | 0.464 | |
SPKRAMP_C_OUTN_R | Default | d | 0.464 | |
SPKRAMP_C_OUTP | Default | d | 0.466 | |
SPKRAMP_C_OUTP_R | Default | d | 0.466 | |
SPKRAMP_C_PVDD_SNS | Default | d | 0.480 | |
SPKRAMP_C_VSENSEN | Default | d | 0.464 | |
SPKRAMP_C_VSENSEP | Default | d | 0.466 | |
SPKRAMP_DEF_ICC | Default | d | 0.410 | |
SPKRAMP_DEF_ICC_R | Default | d | 0.410 | |
SPKRAMP_D_ADDR | Default | d | 0.460 | |
SPKRAMP_D_BOOTN | Default | d | 0.700 | |
SPKRAMP_D_BOOTP | Default | d | 0.700 | |
SPKRAMP_D_ICC_R | Default | d | 0.423 | |
SPKRAMP_D_OUTN | Default | d | 0.464 | |
SPKRAMP_D_OUTN_R | Default | d | 0.464 | |
SPKRAMP_D_OUTP | Default | d | 0.466 | |
SPKRAMP_D_OUTP_R | Default | d | 0.466 | |
SPKRAMP_D_VSENSEN | Default | d | 0.464 | |
SPKRAMP_D_VSENSEP | Default | d | 0.466 | |
SPKRAMP_E_ADDR | Default | d | 0.467 | |
SPKRAMP_E_BOOTN | Default | d | 0.700 | |
SPKRAMP_E_BOOTP | Default | d | 0.700 | |
SPKRAMP_E_DREG | Default | d | 0.557 | |
SPKRAMP_E_ICC_R | Default | d | 0.423 | |
SPKRAMP_E_OUTN | Default | d | 0.466 | |
SPKRAMP_E_OUTN_R | Default | d | 0.466 | |
SPKRAMP_E_OUTP | Default | d | 0.470 | |
SPKRAMP_E_OUTP_R | Default | d | 0.470 | |
SPKRAMP_E_VSENSEN | Default | d | 0.466 | |
SPKRAMP_E_VSENSEP | Default | d | 0.470 | |
SPKRAMP_F_ADDR | Default | d | 0.466 | |
SPKRAMP_F_BOOTN | Default | d | 0.700 | |
SPKRAMP_F_BOOTP | Default | d | 0.700 | |
SPKRAMP_F_DREG | Default | d | 0.560 | |
SPKRAMP_F_ICC_R | Default | d | 0.424 | |
SPKRAMP_F_OUTN | Default | d | 0.464 | |
SPKRAMP_F_OUTN_R | Default | d | 0.464 | |
SPKRAMP_F_OUTP | Default | d | 0.470 | |
SPKRAMP_F_OUTP_R | Default | d | 0.470 | |
SPKRAMP_F_VSENSEN | Default | d | 0.464 | |
SPKRAMP_F_VSENSEP | Default | d | 0.470 | |
SPKRAMP_INT_L | Default | d | 0.305 | |
SPKRAMP_RESET_L | Default | d | 0.305 | |
SPKR_ID0 | Default | d | 0.305 | |
SPKR_ID1 | Default | d | 0.307 | |
SPMI_CLVR2_CLK_R | Default | d | 0.290 | |
SPMI_CLVR2_DATA_R | Default | d | 0.290 | |
SPMI_CLVR4_CLK | Default | d | 0.325 | |
SPMI_CLVR4_DATA | Default | d | 0.325 | |
SPMI_SE_CLK | Default | d | 0.320 | |
SPMI_SE_DATA | Default | d | 0.307 | |
SPMU_3V8_IOUT | Default | d | 0.723 | |
SPMU_3V8_ISENSE | Default | d | 0.732 | |
SPMU_BUCK0_FB | Default | d | 0.222 | |
SPMU_BUCK0_FB_R | Default | d | 0.222 | |
SPMU_BUCK0_LX0 | Default | d | 0.220 | |
SPMU_BUCK0_LX0 | Default | r | 0.220R | |
SPMU_BUCK10_FB | Default | d | 0.200 | |
SPMU_BUCK10_FB_R | Default | d | 0.200 | |
SPMU_BUCK10_LX0 | Default | d | 0.210 | |
SPMU_BUCK10_LX0 | Default | r | 206.000 | |
SPMU_BUCK1_FB | Default | d | 0.121 | |
SPMU_BUCK1_FB_R | Default | d | 0.121 | |
SPMU_BUCK1_LX0 | Default | d | 0.120 | |
SPMU_BUCK1_LX1 | Default | d | 0.120 | |
SPMU_BUCK1_LX1 | Default | r | 0.120R | |
SPMU_BUCK2_FB | Default | d | 0.320 | |
SPMU_BUCK2_FB_R | Default | d | 0.320 | |
SPMU_BUCK2_LX0 | Default | d | 0.320 | |
SPMU_BUCK2_LX0 | Default | r | 0.002R | |
SPMU_BUCK3_FB | Default | d | 0.255 | |
SPMU_BUCK3_FB_R | Default | d | 0.255 | |
SPMU_BUCK4_FB | Default | d | 0.070 | |
SPMU_BUCK4_FB_R | Default | d | 0.070 | |
SPMU_BUCK4_LX0 | Default | d | 0.070 | |
SPMU_BUCK4_LX0 | Default | r | 68.000R | |
SPMU_BUCK5_FB | Default | d | 0.140 | |
SPMU_BUCK5_FB_R | Default | d | 0.140 | |
SPMU_BUCK5_LX0 | Default | d | 0.150 | |
SPMU_BUCK5_LX0 | Default | r | 140.000 | |
SPMU_BUCK6_FB | Default | d | 0.190 | |
SPMU_BUCK6_FB_R | Default | d | 0.190 | |
SPMU_BUCK6_LX0 | Default | d | 0.190 | |
SPMU_BUCK6_LX0 | Default | r | 0.900R | |
SPMU_BUCK8_FB | Default | d | 0.236 | |
SPMU_BUCK8_FB_R | Default | d | 0.236 | |
SPMU_BUCK8_LX0 | Default | d | 0.255 | |
SPMU_BUCK9_FB | Default | d | 0.440 | |
SPMU_BUCK9_FB_R | Default | d | 0.440 | |
SPMU_BUCK9_LX0 | Default | d | 0.440 | |
SPMU_BUCK9_LX0 | Default | r | 0.003R | |
SPMU_IREF | Default | d | 0.750 | |
SPMU_TCAL | Default | d | 0.773 | |
SPMU_THMSNS | Default | d | 0.770 | |
SPMU_VREF1V2 | Default | d | 0.620 | |
SWD_CLVR0_SWCLK | Default | d | 0.364 | |
SWD_CLVR0_SWDIO | Default | d | 0.362 | |
SWD_CLVR1_SWCLK | Default | d | 0.365 | |
SWD_CLVR1_SWDIO | Default | d | 0.362 | |
SWD_CLVR4_SWCLK | Default | d | 0.330 | |
SWD_CLVR_SWCLK | Default | d | 0.317 | |
SWD_CLVR_SWDIO | Default | d | 0.314 | |
SWD_NAND0_S5E0_S5E1_SWCLK | Default | d | 0.310 | |
SWD_NAND0_S5E0_S5E1_SWDIO | Default | d | 0.298 | |
SWD_NAND0_S5E2_S5E3_SWCLK | Default | d | 0.307 | |
SWD_NAND0_S5E2_S5E3_SWDIO | Default | d | 0.303 | |
SWD_NAND0_SWCLK | Default | d | 0.296 | |
SWD_NAND0_SWDIO | Default | d | 0.292 | |
SWD_NUB_CLVR_SWCLK_R | Default | d | 0.300 | |
SWD_SOC_SWCLK | Default | d | 0.319 | |
SWD_SOC_SWDIO | Default | d | 0.319 | |
SWD_UPC01_UART_CLK | Default | d | 0.350 | |
SWD_UPC01_UART_DATA | Default | d | 0.330 | |
SWD_UPC_SWDIO0 | Default | d | 0.260 | |
SWD_UPC_SWDIO2 | Default | d | 0.330 | |
SYS_ALIVE_BUFF | Default | d | OL | |
SYS_DETECT | Default | d | OL | |
SYS_DETECT_L | Default | d | 0.537 | |
TDM_CODEC_D2R | Default | d | 0.300 | |
TDM_CODEC_D2R_R | Default | d | 0.330 | |
TDM_SPKRAMP_A_D2R_R | Default | d | 0.333 | |
TDM_SPKRAMP_B_D2R_R | Default | d | 0.333 | |
TDM_SPKRAMP_C_D2R_R | Default | d | 0.333 | |
TDM_SPKRAMP_D_D2R_R | Default | d | 0.330 | |
TDM_SPKRAMP_E_D2R_R | Default | d | 0.330 | |
TDM_SPKRAMP_F_D2R_R | Default | d | 0.330 | |
TDM_SPKRAMP_L_BCLK | Default | d | 0.320 | |
TDM_SPKRAMP_L_D2R | Default | d | 0.296 | |
TDM_SPKRAMP_L_FSYNC | Default | d | 0.320 | |
TDM_SPKRAMP_L_R2D | Default | d | 0.320 | |
TDM_SPKRAMP_R_BCLK | Default | d | 0.314 | |
TDM_SPKRAMP_R_BCLK_R | Default | d | 0.295 | |
TDM_SPKRAMP_R_D2R | Default | d | 0.293 | |
TDM_SPKRAMP_R_FSYNC | Default | d | 0.316 | |
TDM_SPKRAMP_R_R2D | Default | d | 0.316 | |
THMSNS_MPMU1_N | Default | d | 0.000 | |
THMSNS_MPMU1_P | Default | d | 0.775 | |
THMSNS_MPMU2_N | Default | d | 0.000 | |
THMSNS_MPMU2_P | Default | d | 0.772 | |
THMSNS_MPMU3_N | Default | d | 0.000 | |
THMSNS_MPMU3_P | Default | d | 0.773 | |
THMSNS_MPMU4_N | Default | d | 0.000 | |
THMSNS_MPMU4_P | Default | d | 0.775 | |
THMSNS_MPMU5_N | Default | d | 0.000 | |
THMSNS_MPMU5_P | Default | d | 0.775 | |
THMSNS_MPMU7_N | Default | d | 0.000 | |
THMSNS_MPMU7_P | Default | d | 0.773 | |
THMSNS_MPMU8_N | Default | d | 0.003 | |
THMSNS_MPMU8_P | Default | d | 0.777 | |
THMSNS_MPMU_VSS | Default | d | 0.000 | |
THMSNS_SPMU1_N | Default | d | 0.000 | |
THMSNS_SPMU1_P | Default | d | 0.775 | |
THMSNS_SPMU2_N | Default | d | 0.000 | |
THMSNS_SPMU2_P | Default | d | 0.773 | |
THMSNS_SPMU3_N | Default | d | 0.000 | |
THMSNS_SPMU3_P | Default | d | 0.773 | |
THMSNS_SPMU4_N | Default | d | 0.000 | |
THMSNS_SPMU4_P | Default | d | 0.776 | |
THMSNS_SPMU5_N | Default | d | 0.005 | |
THMSNS_SPMU5_P | Default | d | 0.780 | |
THMSNS_SPMU6_N | Default | d | 0.000 | |
THMSNS_SPMU7_N | Default | d | 0.000 | |
THMSNS_SPMU7_P | Default | d | 0.770 | |
THMSNS_SPMU8_N | Default | d | 0.000 | |
THMSNS_SPMU8_P | Default | d | 0.775 | |
THMSNS_SPMU_VSS | Default | d | 0.000 | |
TOUCHID_BKLT_LED4 | Default | d | - | |
TOUCHID_BOOST_EN | Default | d | 0.540 | |
TOUCHID_BOOST_EN_CONN | Default | d | 0.540 | |
TOUCHID_INT | Default | d | 0.290 | |
TOUCHID_INT_1V8_CONN | Default | d | 0.963 | |
TOUCHID_PWR_EN | Default | d | 0.300 | |
TPT_JTAG_SOC_TRST_L | Default | d | 0.297 | |
TP_AP_I2C04_SCL | Default | d | 0.295 | |
TP_AP_I2C04_SDA | Default | d | 0.300 | |
TP_I2C_FAN0_SCL | Default | d | OL | |
TP_I2C_FAN0_SDA | Default | d | OL | |
TP_I2C_FAN1_SCL | Default | d | OL | |
TP_I2C_FAN1_SDA | Default | d | OL | |
TP_NAND1_S5E3_ANI1_VREF | Default | d | OL | |
TP_NAND1_S5E3_JTAG_TDO | Default | d | OL | |
TP_PPVBUS_USBC5 | Default | d | 0.570 | |
TP_SPKRAMP_A_LV_EN | Default | d | 0.468 | |
TP_SPKRAMP_B_LV_EN | Default | d | 0.467 | |
TP_SPKRAMP_F_LV_EN | Default | d | 0.467 | |
TP_USBC0_PP20V | Default | d | OL | |
TP_USBC1_PP20V | Default | d | OL | |
UART_DP2HDMI_D2R_1V8 | Default | d | 0.480 | |
UART_SE_R2D | Default | d | 0.454 | |
UART_SE_R2D_RTS_L | Default | d | 0.456 | |
UART_TCON_D2R_1V8 | Default | d | 0.800 | |
UART_UPC0_TX | Default | d | 0.550 | |
UART_UPC1_TX | Default | d | 0.550 | |
UART_UPC2_TX_RX | Default | d | 0.550 | |
UART_UPC5 | Default | d | 0.560 | |
UART_WLAN_D2R_CTS_L_R | Default | d | 0.616 | |
UART_WLAN_D2R_R | Default | d | 0.619 | |
UART_WLAN_R2D_R | Default | d | 0.622 | |
UART_WLAN_R2D_RTS_L_R | Default | d | 0.622 | |
UH850_BIAS | Default | d | 0.550 | |
UH850_EN | Default | d | 0.580 | |
UH850_FB | Default | d | 0.240 | |
UH902P7 | Default | d | 0.620 | |
UK700_EN | Default | d | 0.600 | |
UPC01_5V_EN | Default | d | 0.623 | |
UPC0_BUSPOWER | Default | d | 0.000 | |
UPC0_GPIO7 | Default | d | 0.400 | |
UPC0_R_OSC | Default | d | 0.465 | |
UPC0_SER_DBG | Default | d | 0.680 | |
UPC0_SS | Default | d | 0.580 | |
UPC1_BUSPOWER | Default | d | 0.000 | |
UPC1_R_OSC | Default | d | 0.463 | |
UPC1_SER_DBG | Default | d | 0.673 | |
UPC1_SS | Default | d | 0.575 | |
UPC23_5V_EN | Default | d | 0.670 | |
UPC2_BUSPOWER | Default | d | 0.000 | |
UPC2_I2C_ADDR | Default | d | 0.000 | |
UPC2_R_OSC | Default | d | 0.463 | |
UPC2_SER_DBG | Default | d | 0.677 | |
UPC2_SS | Default | d | 0.577 | |
UPC5_EXTRD_DISABLE | Default | d | 0.690 | |
UPC5_EXTRD_G | Default | d | 0.700 | |
UPC5_GPIO0 | Default | d | 0.690 | |
UPC5_GPIO10 | Default | d | 0.715 | |
UPC5_GPIO2 | Default | d | 0.700 | |
UPC5_GPIO6 | Default | d | 0.600 | |
UPC5_GPIO7 | Default | d | 0.715 | |
UPC5_GPIO8 | Default | d | 0.690 | |
UPC5_GPIO9 | Default | d | 0.715 | |
UPC5_HVEN | Default | d | 0.780 | |
UPC5_LV | Default | d | 0.515 | |
UPC5_R_OSC | Default | d | 0.474 | |
UPC5_SS | Default | d | 0.001 | |
UPC_I2C_INT_L | Default | d | 0.310 | |
UPC_PMU_RESET_1V2 | Default | d | 0.712 | |
UPC_PMU_RESET_1V2_R | Default | d | 0.000 | |
UPC_PMU_RESET_3V3 | Default | d | 0.543 | |
UPC_SMC_I2C_INT_L | Default | d | 0.305 | |
USB0_3V3_LDO_EN_VITC | Default | d | 0.475 | |
USB2_ATC0_LS_MUX_N | Default | d | 0.678 | |
USB2_ATC0_LS_MUX_P | Default | d | 0.678 | |
USB2_ATC0_LS_N | Default | d | 0.678 | |
USB2_ATC0_LS_P | Default | d | 0.678 | |
USB2_ATC1_LS_N | Default | d | 0.676 | |
USB2_ATC1_LS_P | Default | d | 0.677 | |
USB2_ATC2_LS_N | Default | d | 0.677 | |
USB2_ATC2_LS_P | Default | d | 0.675 | |
USB2_UPC0_P1_N | Default | d | 0.680 | |
USB2_UPC0_P1_P | Default | d | 0.680 | |
USB2_UPC1_P1_N | Default | d | 0.677 | |
USB2_UPC1_P1_P | Default | d | 0.677 | |
USB2_UPC2_P1_N | Default | d | 0.676 | |
USB2_UPC2_P1_P | Default | d | 0.680 | |
USBC0_3V3LDO_EN | Default | d | 0.475 | |
USBC0_CC1 | Default | d | 0.460 | |
USBC0_CC1_CONN | Default | d | 0.627 | |
USBC0_CC2 | Default | d | 0.460 | |
USBC0_CC2_CONN | Default | d | 0.626 | |
USBC0_D2R_CR_N<1> | Default | d | OL | |
USBC0_D2R_CR_N<2> | Default | d | OL | |
USBC0_D2R_CR_P<1> | Default | d | OL | |
USBC0_D2R_CR_P<2> | Default | d | OL | |
USBC0_R2D_N<1> | Default | d | OL | |
USBC0_R2D_N<2> | Default | d | OL | |
USBC0_R2D_P<1> | Default | d | OL | |
USBC0_R2D_P<2> | Default | d | OL | |
USBC0_SBU1 | Default | d | 0.654 | |
USBC0_SBU2 | Default | d | 0.655 | |
USBC0_USB_BOT_N | Default | d | 0.760 | |
USBC0_USB_BOT_P | Default | d | 0.765 | |
USBC0_USB_TOP_N | Default | d | 0.765 | |
USBC0_USB_TOP_P | Default | d | 0.765 | |
USBC0_VBIAS_PRT | Default | d | 0.630 | |
USBC1_CC1 | Default | d | 0.454 | |
USBC1_CC1_CONN | Default | d | 0.630 | |
USBC1_CC2 | Default | d | 0.455 | |
USBC1_CC2_CONN | Default | d | 0.630 | |
USBC1_D2R_CR_N<1> | Default | d | OL | |
USBC1_D2R_CR_N<2> | Default | d | OL | |
USBC1_D2R_CR_P<1> | Default | d | OL | |
USBC1_D2R_CR_P<2> | Default | d | OL | |
USBC1_R2D_N<1> | Default | d | OL | |
USBC1_R2D_N<2> | Default | d | OL | |
USBC1_R2D_P<1> | Default | d | OL | |
USBC1_R2D_P<2> | Default | d | OL | |
USBC1_SBU1 | Default | d | 0.656 | |
USBC1_SBU2 | Default | d | 0.655 | |
USBC1_USB_BOT_N | Default | d | 0.763 | |
USBC1_USB_BOT_P | Default | d | 0.766 | |
USBC1_USB_TOP_N | Default | d | 0.765 | |
USBC1_USB_TOP_P | Default | d | 0.765 | |
USBC1_VBIAS_PRT | Default | d | 0.627 | |
USBC2_3V3LDO_EN | Default | d | 0.543 | |
USBC2_CC1 | Default | d | 0.458 | |
USBC2_CC1_CONN | Default | d | 0.625 | |
USBC2_CC2 | Default | d | 0.459 | |
USBC2_CC2_CONN | Default | d | 0.625 | |
USBC2_D2R_CR_N<1> | Default | d | OL | |
USBC2_D2R_CR_N<2> | Default | d | OL | |
USBC2_D2R_CR_P<1> | Default | d | OL | |
USBC2_D2R_CR_P<2> | Default | d | OL | |
USBC2_R2D_N<1> | Default | d | OL | |
USBC2_R2D_N<2> | Default | d | OL | |
USBC2_R2D_P<1> | Default | d | OL | |
USBC2_R2D_P<2> | Default | d | OL | |
USBC2_SBU1 | Default | d | 0.650 | |
USBC2_SBU2 | Default | d | 0.650 | |
USBC2_USB_BOT_N | Default | d | 0.760 | |
USBC2_USB_BOT_P | Default | d | 0.765 | |
USBC2_USB_TOP_N | Default | d | 0.764 | |
USBC2_USB_TOP_P | Default | d | 0.764 | |
USBC2_VBIAS_PRT | Default | d | 0.625 | |
USBC5_CC1 | Default | d | 0.585 | |
USBC5_CC1_PIN | Default | d | 0.620 | |
USBC5_CC1_RD | Default | d | 0.465 | |
USBC5_CC2 | Default | d | 0.590 | |
USBC5_WPD | Default | d | 0.620 | |
USBC_ATC1_AUX_C_N | Default | d | 0.730 | |
USBC_ATC1_AUX_C_P | Default | d | 0.710 | |
USBC_ATC1_AUX_N | Default | d | 0.331 | |
USBC_ATC1_AUX_P | Default | d | 0.333 | |
USB_DBG_LS_MUX_N | Default | d | 0.676 | |
USB_DBG_LS_MUX_P | Default | d | 0.676 | |
USB_DBG_LS_N | Default | d | 0.676 | |
USB_DBG_LS_P | Default | d | 0.676 | |
VBUS_MID_B | Default | d | 0.900 | |
VBUS_USBC5_B | Default | d | OL | |
VBUS_USBC5_R | Default | d | 0.560 | |
VBUS_USBC5_UV | Default | d | OL | |
VDDBOOST_SE | Default | d | 0.570 | |
VDDC_SE | Default | d | 0.330 | |
VDDNV_SE | Default | d | 0.363 | |
VDDPLL_SE | Default | d | 0.356 | |
VHV_SE | Default | d | 0.338 | |
VITC_RESET_L | Default | d | OL | |
VREFB_ARDV01 | Default | d | OL | |
VREFB_EUSBLS0 | Default | d | 0.605 | |
VREFB_EUSBLS1 | Default | d | 0.606 | |
VREFB_EUSBLS2 | Default | d | 0.608 | |
VREF_SE | Default | d | 0.769 | |
VSNS_P0V575VDDQ0_SENSE | Default | d | 0.119 | |
VSNS_P0V575VSSQ0_SENSE | Default | d | 0.000 | |
VSNS_PVDDPCPU0AWAKESW_SENSE | Default | d | 0.153 | |
VSNS_PVSSPCPU0AWAKESW_SENSE | Default | d | 0.000 | |
VSS_ANA_MPMU | Default | d | 0.000 | |
VSS_ANA_SPMU | Default | d | 0.000 | |
VSS_HVSWITCH | Default | d | 1.000 | |
VUP_SE | Default | d | 0.570 | |
WING_R_THMSNS | Default | d | 0.775 | |
WLAN_JTAG_SEL | Default | d | 0.613 | |
WLBT_CLKREQ_L | Default | d | 0.290 | |
WLBT_CLKREQ_R_L | Default | d | 0.523 | |
WLBT_PWR_EN | Default | d | 0.473 | |
WLBT_RESET_L | Default | d | 0.300 | |