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This data released under the ODbL licence.
| Netname | Condition | Type | Value | Comment |
|---|---|---|---|---|
| AUD_DMIC0_CLK_CONN | Default | d | 0.490 | |
| AUD_DMIC0_DATA_CONN | Default | d | 0.640 | |
| AUD_DMIC1_CLK_CONN | Default | d | 0.500 | |
| AUD_DMIC1_DATA_CONN | Default | d | 0.640 | |
| CHGR_LL | Default | d | 0.480 | |
| CHGR_LL | Default | r | 270.000k | |
| CHGR_PHASE1 | Default | d | 0.480 | |
| CHGR_PHASE1 | Default | r | 270.000k | |
| CHGR_PHASE2 | Default | d | 0.480 | |
| CHGR_PHASE2 | Default | r | 270.000k | |
| I2C_KBD_SDA | Default | d | 0.669 | |
| IOXP_I2C_SCL | Default | d | 0.676 | |
| IOXP_I2C_SDA | Default | d | 0.652 | |
| KBDBKLT_SW2 | Default | d | 0.380 | |
| MPMU_BUCK10_LX0 | Default | d | 122.000 | |
| MPMU_BUCK10_LX1 | Default | d | 122.000 | |
| MPMU_BUCK5_LX0 | Default | d | 223.000 | |
| MPMU_BUCK5_LX1 | Default | d | 223.000 | |
| MPMU_BUCK5_LX2 | Default | d | 223.000 | |
| MPMU_BUCK5_LX3 | Default | d | 223.000 | |
| MPMU_BUCK6_LX0 | Default | d | 425.000 | |
| MPMU_BUCK9_LX0 | Default | d | 209.000 | |
| NAND0_JTAG_SEL | Default | d | 0.300 | |
| NAND0_JTAG_TRST_L | Default | d | 0.300 | |
| NAND0_OCARINA_TDEV1 | Default | d | 0.770 | |
| NAND0_S5E0_ZQ_0 | Default | d | 0.300 | |
| P0V9_LX0_NAND0 | Default | d | 0.270 | |
| P0V9_LX0_NAND1 | Default | d | 0.440 | |
| P0V9_LX0_NAND1 | Default | t | Only 1 of the 4 NANDS on this rail are present on measured board | |
| P0V9_LX1_NAND0 | Default | d | 0.220 | |
| P0V9_LX1_NAND1 | Default | d | 0.440 | |
| P0V9_LX1_NAND1 | Default | t | Only 1 of the 4 NANDS on this rail are present on measured board | |
| P1V2_LX0_NAND0 | Default | d | 0.220 | |
| P1V2_LX0_NAND1 | Default | d | 0.292 | |
| P1V2_LX0_NAND1 | Default | t | Only 1 of the 4 NANDS on this rail are present on measured board | |
| P2V5_NAND0_BST_R | Default | d | 0.590 | |
| P2V5_NAND0_PGOOD | Default | d | 0.550 | |
| P2V5_NAND0_SW | Default | d | 0.280 | |
| P2V5_NAND1_PGOOD | Default | d | 0.550 | |
| P2V5_NAND1_SW | Default | d | 0.297 | |
| P5VS2TPS_PHASE | Default | d | 0.380 | |
| P5VUSBC01_AGND | Default | d | 0.000 | |
| P5VUSBC01_SS | Default | d | 0.720 | |
| P5VUSBC01_SW | Default | d | 0.300 | |
| P5VUSBC23_FB | Default | d | 1.406 | |
| P5VUSBC23_FB_R | Default | d | 0.460 | |
| P5VUSBC23_RA | Default | d | OL | |
| P5VUSBC23_SS | Default | d | 0.540 | |
| P5VUSBC23_SW1 | Default | d | 0.450 | |
| P5VUSBC23_SW2 | Default | d | 0.450 | |
| PP0V575_S1_VDDQ1 | Default | d | 122.000 | |
| PP0V81_S1_SRAM | Default | d | 197.000 | |
| PP0V9_NAND0 | Default | d | 0.270 | |
| PP0V9_NAND0_S5E3_VDD_PLL | Default | d | 0.270 | |
| PP0V9_NAND1 | Default | d | 0.440 | |
| PP0V9_NAND1 | Default | t | Only 1 of the 4 NANDS on this rail are present on measured board | |
| PP0V9_NAND1_S5E1_VDD_PLL | Default | d | 0.440 | |
| PP0V9_NAND1_S5E3_VDD_PLL | Default | d | 0.440 | |
| PP0V9_NAND1_S5E3_VDD_PLL | Default | t | ||
| PP1V2_GL_LOOP_FL | Default | d | - | |
| PP1V2_NAND0 | Default | d | 0.220 | |
| PP1V2_NAND0_S5E3_AVDD1X_PLL | Default | d | 0.225 | |
| PP1V2_NAND1 | Default | d | 0.292 | |
| PP1V2_NAND1 | Default | t | Only 1 of the 4 NANDS on this rail are present on measured board | |
| PP1V2_NAND1_S5E1_PCI_AVDD_H | Default | d | 0.292 | |
| PP1V2_NAND1_S5E2_PCI_AVDD_H | Default | d | 0.292 | |
| PP1V2_NAND1_S5E3_PCI_AVDD_H | Default | d | 0.292 | |
| PP1V2_S2 | Default | d | 0.255 | |
| PP1V2_S2 | Default | r | 0.001R | |
| PP1V8_DMIC | Default | d | 0.250 | |
| PP1V8_S2 | Default | d | 0.260 | |
| PP1V8_S2 | Default | r | 2.200k | |
| PP1V8_S2SW | Default | d | 312.000 | |
| PP2V5_NAND0 | Default | d | 0.280 | |
| PP2V5_NAND1 | Default | d | 0.296 | |
| PP5V_KBDBKLT | Default | d | 0.380 | |
| PP5V_S2SW_USBC01 | Default | d | 0.300 | |
| PP5V_S2SW_USBC23 | Default | d | 0.450 | |
| PP5V_S2_MAIN | Default | d | 0.380 | |
| PPBUS_AON_LUXE | Default | d | 0.470 | |
| PPDCIN_AON_CHGR | Default | d | 0.620 | |
| PPDCIN_AON_CHGR_R | Default | d | 0.620 | |
| PPLUXE_INPUT_R_V | Default | d | 0.470 | |
| PPLUXE_LX1 | Default | d | 0.430 | |
| PPLUXE_LX2 | Default | d | 0.430 | |
| PPVBUS_USBC5 | Default | d | 0.170 | |
| PPVDD2H1_S2SW | Default | d | 65.000 | |
| PPVDD_AMPH1_S2SW | Default | d | 425.000 | |
| PPVDD_AVEMSR_AWAKESW | Default | d | 223.000 | |
| PPVDD_ECPU_AWAKE | Default | d | 205.000 | |
| PPVDD_ECPU_SRAM_AWAKE | Default | d | 404.000 | |
| PPVDD_FIXED_S1 | Default | d | 209.000 | |
| PPVDD_GPU_BMPR_S1 | Default | d | 283.000 | |
| PPVIN_5VUSBC01 | Default | d | 0.470 | |
| PPVIN_5VUSBC23 | Default | d | 0.470 | |
| PPVIN_P5VS2 | Default | d | 0.470 | |
| PPVOUT_KBDLED_CONN | Default | d | 0.580 | |
| PPVOUT_LUXE_XW | Default | d | 0.610 | |
| SPI_AOP_SENSOR_CLK | Default | d | 0.318 | |
| SPI_AOP_SENSOR_MOSI | Default | d | 0.317 | |
| SPI_AOP_SENSOR_MOSI_1V8_R | Default | d | 0.497 | |
| SPI_AOP_SENSOR_SCLK_1V8_R | Default | d | 0.505 | |
| USBC0_D2R_CR_N<1> | Default | d | OL | |
| USBC0_D2R_CR_N<2> | Default | d | OL | |
| USBC0_D2R_CR_P<1> | Default | d | OL | |
| USBC0_D2R_CR_P<2> | Default | d | OL | |
| USBC0_R2D_N<1> | Default | d | OL | |
| USBC0_R2D_N<2> | Default | d | OL | |
| USBC0_R2D_P<1> | Default | d | OL | |
| USBC0_R2D_P<2> | Default | d | OL | |
| USBC1_D2R_CR_N<1> | Default | d | OL | |
| USBC1_D2R_CR_N<2> | Default | d | OL | |
| USBC1_D2R_CR_P<1> | Default | d | OL | |
| USBC1_D2R_CR_P<2> | Default | d | OL | |
| USBC1_R2D_N<1> | Default | d | OL | |
| USBC1_R2D_N<2> | Default | d | OL | |
| USBC1_R2D_P<1> | Default | d | OL | |
| USBC1_R2D_P<2> | Default | d | OL | |
| USBC2_D2R_CR_N<1> | Default | d | OL | |
| USBC2_D2R_CR_N<2> | Default | d | OL | |
| USBC2_D2R_CR_P<1> | Default | d | OL | |
| USBC2_D2R_CR_P<2> | Default | d | OL | |
| USBC2_R2D_N<1> | Default | d | OL | |
| USBC2_R2D_N<2> | Default | d | OL | |
| USBC2_R2D_P<1> | Default | d | OL | |
| USBC2_R2D_P<2> | Default | d | OL | |
| USBC5_CC1_PIN | Default | d | 0.600 | |
| USBC5_CC1_RD | Default | d | 0.470 |
| Component | Type | Value |
|---|