Netname | Condition | Type | Value | Comment |
---|---|---|---|---|
CPUIMVP_PHASE1 | 1.7GHz i5 | d | 0.008 | |
CPUIMVP_VSWG | 1.7GHz i5 | d | 0.007 | |
PPVCORE_S0_AXG_R | 1.7GHz i5 | d | 0.007 | |
PPVCORE_S0_CPU_PH1 | 1.7GHz i5 | d | 0.008 | |
ALL_SYS_PWRGD | Default | d | 0.411 | |
AP_CLKREQ_Q_L | Default | d | 0.00 | |
AP_RESET_L | Default | d | 0.386 | |
AUD_SPKR_RWFR_OUT_P | Default | d | 0.00 | |
BCM57765_MISO | Default | d | 0.00 | |
BKLT_PLT_RST_L | Default | d | 0.382 | |
BKL_EN | Default | d | 0.513 | |
BKL_FLTR | Default | d | 0.505 | |
BKL_FSET | Default | d | 0.512 | |
BKL_ISEN1 | Default | d | 0.574 | |
BKL_ISEN2 | Default | d | 0.574 | |
BKL_ISEN3 | Default | d | 0.574 | |
BKL_ISEN4 | Default | d | 0.570 | |
BKL_ISEN5 | Default | d | 0.572 | |
BKL_ISEN6 | Default | d | 0.569 | |
BKL_ISET | Default | d | 0.509 | |
BKL_PWM | Default | d | 0.470 | |
BKL_SCL | Default | d | 0.420 | |
BKL_SDA | Default | d | 0.420 | |
BKL_VSYNC_R | Default | d | 0.506 | |
BMON_AMUX_OUT | Default | d | 0.690 | |
CHGR_ACIN | Default | d | 0.464 | |
CHGR_AGATE | Default | d | 0.573 | |
CHGR_AMON | Default | d | 0.668 | |
CHGR_BGATE | Default | d | 0.607 | |
CHGR_BMON | Default | d | 0.686 | |
CHGR_BOOT | Default | d | 0.548 | |
CHGR_CELL | Default | d | 0.033 | |
CHGR_CSI_N | Default | d | 0.534 | |
CHGR_CSI_P | Default | d | 0.533 | |
CHGR_CSO_N | Default | d | 0.440 | |
CHGR_CSO_P | Default | d | 0.440 | |
CHGR_CSO_R_N | Default | d | 0.440 | |
CHGR_CSO_R_P | Default | d | 0.440 | |
CHGR_DCIN | Default | d | 0.572 | |
CHGR_DCIN_D_R | Default | d | 0.578 | |
CHGR_ICOMP | Default | d | 0.688 | |
CHGR_LGATE | Default | d | 0.407 | |
CHGR_PHASE | Default | d | 0.439 | |
CHGR_RST_L | Default | d | 0.404 | |
CHGR_SGATE | Default | d | 0.572 | |
CHGR_UGATE | Default | d | 0.815 | |
CHGR_VCOMP | Default | d | 0.684 | |
CHGR_VCOMP_R | Default | d | OL | |
CHGR_VFRQ | Default | d | 0.467 | |
CHGR_VNEG | Default | d | 0.473 | |
CHGR_VNEG_R | Default | d | 0.518 | |
CPUIMVP_AXG_PGOOD | Default | d | 0.543 | |
CPUIMVP_BOOT1 | Default | d | 0.573 | |
CPUIMVP_BOOT1G | Default | d | 0.576 | |
CPUIMVP_BOOT1_RC | Default | d | 0.573 | |
CPUIMVP_FBA | Default | d | 0.592 | |
CPUIMVP_FBA_R | Default | d | 0.014 | |
CPUIMVP_FBB | Default | d | 0.601 | |
CPUIMVP_FBB_R | Default | d | 0.011 | |
CPUIMVP_IMAXA | Default | d | 0.556 | |
CPUIMVP_IMAXB | Default | d | 0.537 | |
CPUIMVP_ISNS1G_N | Default | d | 0.008 | |
CPUIMVP_ISNS1G_P | Default | d | 0.008 | |
CPUIMVP_ISNS1_N | Default | d | 0.010 | |
CPUIMVP_ISNS1_P | Default | d | 0.010 | |
CPUIMVP_ISUM | Default | d | 0.100 | |
CPUIMVP_ISUM1_P | Default | d | 0.023 | |
CPUIMVP_ISUMG_IOUT | Default | d | 0.521 | |
CPUIMVP_ISUMG_N | Default | d | 0.011 | |
CPUIMVP_ISUMG_P | Default | d | 0.023 | |
CPUIMVP_ISUMG_R_N | Default | d | 0.698 | |
CPUIMVP_ISUMG_R_P | Default | d | 0.698 | |
CPUIMVP_ISUM_IOUT | Default | d | 0.522 | |
CPUIMVP_ISUM_N | Default | d | 0.014 | |
CPUIMVP_ISUM_R | Default | d | 0.115 | |
CPUIMVP_ISUM_R_N | Default | d | 0.698 | |
CPUIMVP_ISUM_R_P | Default | d | 0.700 | |
CPUIMVP_LGATE1 | Default | d | 0.447 | |
CPUIMVP_LGATE1G | Default | d | 0.448 | |
CPUIMVP_NTC | Default | d | 0.536 | |
CPUIMVP_NTCG | Default | d | 0.620 | |
CPUIMVP_PGOOD | Default | d | 0.477 | |
CPUIMVP_PHASE1 | Default | d | 0.000 | |
CPUIMVP_PHASE1 | Default | r | 0.000R | |
CPUIMVP_PHASE1G | Default | d | 0.007 | |
CPUIMVP_SLEW | Default | d | 0.621 | |
CPUIMVP_TON | Default | d | 0.606 | |
CPUIMVP_UGATE1 | Default | d | 0.011 | |
CPUIMVP_UGATE1G | Default | d | 0.657 | |
CPUIMVP_UGATE1G_R | Default | d | 0.657 | |
CPUIMVP_UGATE1_R | Default | d | 0.011 | |
CPUIMVP_VR_ON | Default | d | 0.411 | |
CPUIMVP_VSWG | Default | d | 0.000 | |
CPUTHMSNS_ALERT_L | Default | d | 0.666 | |
CPUTHMSNS_D2_N | Default | d | 0.577 | |
CPUTHMSNS_D2_P | Default | d | 0.578 | |
CPUTHMSNS_THM_L | Default | d | 0.662 | |
CPUVCCIOS0_AGND | Default | d | 0.000 | |
CPUVCCIOS0_DRVH | Default | d | 0.441 | |
CPUVCCIOS0_DRVL | Default | d | 0.402 | |
CPUVCCIOS0_EN | Default | d | 0.465 | |
CPUVCCIOS0_FB | Default | d | 0.350 | |
CPUVCCIOS0_FSEL | Default | d | 0.000 | |
CPUVCCIOS0_LL | Default | d | 0.015 | |
CPUVCCIOS0_OCSET | Default | d | 0.442 | |
CPUVCCIOS0_PGOOD | Default | d | 0.422 | |
CPUVCCIOS0_RTN | Default | d | 0.349 | |
CPUVCCIOS0_SREF | Default | d | 0.470 | |
CPUVCCIOS0_VBST | Default | d | 0.478 | |
CPUVCCIOS0_VO | Default | d | 0.440 | |
CPU_AXG_SENSE_N | Default | d | 0.000 | |
CPU_AXG_SENSE_P | Default | d | 0.008 | |
CPU_AXG_SENSE_R | Default | d | 0.003 | |
CPU_PECI_R | Default | d | 0.462 | |
CPU_PROCHOT_BUF | Default | d | 0.743 | |
CPU_PROCHOT_L | Default | d | 0.032 | |
CPU_PROCHOT_L_R | Default | d | 0.610 | |
CPU_THERMD_N | Default | d | 0.600 | |
CPU_THERMD_P | Default | d | 0.610 | |
CPU_VCCSASENSE | Default | d | 0.036 | |
CPU_VCCSA_VID<1> | Default | d | 0.310 | |
CPU_VCCSENSE_N | Default | d | 0.000 | |
CPU_VCCSENSE_P | Default | d | 0.010 | |
CPU_VCCSENSE_R | Default | d | 0.003 | |
CPU_VIDALERT_L | Default | d | 0.041 | |
CPU_VIDSCLK | Default | d | 0.034 | |
CPU_VIDSOUT | Default | d | 0.037 | |
DP_AUXCH_ISOL | Default | d | 0.504 | |
DP_A_EXT_HPD | Default | d | 0.475 | |
DP_IG_D_HPD | Default | d | 0.708 | |
DP_INT_AUX_CH_C_N | Default | d | OL | |
DP_INT_AUX_CH_C_P | Default | d | OL | |
DP_INT_HPD_CONN | Default | d | OL | |
DP_INT_ML_F_N<0> | Default | d | OL | |
DP_INT_ML_F_N<1> | Default | d | OL | |
DP_INT_ML_F_P<0> | Default | d | OL | |
DP_INT_ML_F_P<1> | Default | d | OL | |
ENET_LOW_PWR | Default | d | 0.453 | |
G3_POWERON_L | Default | d | 0.543 | |
GFXVSENSE_IN | Default | d | 0.008 | |
GND_BKL_SGND | Default | d | - | |
GND_CPUIMVP_SGND | Default | d | 0.000 | |
GND_SMC_AVSS | Default | d | - | |
HISIDE_ISENSE_OC | Default | d | 0.486 | |
HS_ADDR_SEL | Default | d | 0.000 | |
HS_DUR_SEL | Default | d | 0.027 | |
HS_GPIO | Default | d | 0.687 | |
HS_TH_SEL | Default | d | 0.042 | |
I2C_TCON_SCL_R | Default | d | 0.483 | |
I2C_TCON_SDA_R | Default | d | 0.483 | |
INLET_THMSNS_D1_N | Default | d | 0.632 | |
INLET_THMSNS_D1_P | Default | d | 0.634 | |
ISNS_1V5S3_IOUT | Default | d | 0.618 | |
ISNS_HS_COMPUTING_IOUT | Default | d | 0.600 | |
ISNS_HS_COMPUTING_N | Default | d | 0.435 | |
ISNS_HS_COMPUTING_P | Default | d | 0.435 | |
ISNS_P5VHDD_IOUT | Default | d | - | |
JTAG_ISP_TCK | Default | d | 0.445 | |
KBDLED_SW | Default | d | 0.364 | |
LED_RETURN_1 | Default | d | 0.572 | |
LED_RETURN_2 | Default | d | 0.572 | |
LED_RETURN_3 | Default | d | 0.570 | |
LED_RETURN_4 | Default | d | 0.568 | |
LED_RETURN_5 | Default | d | 0.570 | |
LED_RETURN_6 | Default | d | 0.567 | |
LPCPLUS_GPIO | Default | d | 0.490 | |
LPCPLUS_RESET_L | Default | d | 0.393 | |
LPC_AD<0> | Default | d | 0.442 | |
LPC_AD<1> | Default | d | 0.441 | |
LPC_AD<2> | Default | d | 0.442 | |
LPC_AD<3> | Default | d | 0.441 | |
LPC_CLK33M_LPCPLUS | Default | d | 0.476 | |
LPC_CLK33M_SMC | Default | d | 0.450 | |
LPC_FRAME_L | Default | d | 0.441 | |
LPC_PWRDWN_L | Default | d | 0.460 | |
LPC_SERIRQ | Default | d | 0.465 | |
MEM_EVENT_L | Default | d | 0.482 | |
NC | Default | d | NA | |
P1V8S0_SW | Default | d | 0.135 | |
P3V3S5_COMP2 | Default | d | 0.626 | |
P3V3S5_CSN2 | Default | d | 0.300 | |
P3V3S5_CSP2 | Default | d | 0.521 | |
P3V3S5_CSP2_R | Default | d | 0.300 | |
P3V3S5_DRVH | Default | d | 0.758 | |
P3V3S5_DRVL | Default | d | 0.512 | |
P3V3S5_EN_R | Default | d | 0.415 | |
P3V3S5_LL | Default | d | 0.300 | |
P3V3S5_PGOOD | Default | d | 0.429 | |
P3V3S5_RF | Default | d | 0.503 | |
P3V3S5_VBST | Default | d | 0.550 | |
P3V3S5_VFB2 | Default | d | 0.482 | |
P5V3V3_REG_EN | Default | d | 0.401 | |
P5VP3V3_VREF2 | Default | d | 0.483 | |
P5VP3V3_VREG3 | Default | d | 0.448 | |
P5VS3_COMP1 | Default | d | 0.626 | |
P5VS3_CSN1 | Default | d | 0.417 | |
P5VS3_CSP1 | Default | d | 0.592 | |
P5VS3_DRVH | Default | d | 0.863 | |
P5VS3_DRVL | Default | d | 0.512 | |
P5VS3_EN_R | Default | d | 0.429 | |
P5VS3_FUNC | Default | d | 0.000 | |
P5VS3_LL | Default | d | 0.416 | |
P5VS3_PGOOD | Default | d | 0.426 | |
P5VS3_VBST | Default | d | 0.551 | |
P5VS3_VFB1 | Default | d | 0.487 | |
P5V_S0_CPUIMVP_VDD | Default | d | 0.360 | |
PBUS_S0_VSENSE | Default | d | OL | |
PCA9557D_RESET_L | Default | d | 0.386 | |
PCH_GPIO10_OC6_L | Default | d | 0.517 | |
PCH_GPIO14_OC7_L | Default | d | 0.514 | |
PCH_GPIO15 | Default | d | 0.468 | |
PCH_GPIO35 | Default | d | 0.465 | |
PCH_GPIO36_SATA2GP | Default | d | 0.454 | |
PCH_GPIO43_OC4_L | Default | d | 0.516 | |
PLT_RESET_L | Default | d | 0.386 | |
PM_BATLOW_L | Default | d | 0.457 | |
PM_CLKRUN_L | Default | d | 0.476 | |
PM_DSW_PWRGD | Default | d | 0.523 | |
PM_PECI_PWRGD_R | Default | d | 0.428 | |
PM_PWRBTN_L | Default | d | 0.435 | |
PM_SLP_S3_L | Default | d | 0.451 | |
PM_SLP_S3_R_L | Default | d | 0.474 | |
PM_SLP_S5_L | Default | d | 0.457 | |
PM_SLP_SUS_L | Default | d | 0.478 | |
PM_SUS_EN | Default | d | 0.575 | |
PM_SYSRST_L | Default | d | 0.466 | |
PM_THRMTRIP_L_R | Default | d | 0.376 | |
PP1V05_S0 | Default | d | 0.012 | |
PP1V05_SUS | Default | d | 0.411 | |
PP1V5_S3 | Default | d | 0.145 | |
PP1V5_S3 | Default | t | 0.145 Hynix. 0.063 Samsung. | |
PP1V5_S3RS0 | Default | d | 0.051 | |
PP1V5_S3RS0_FET_R | Default | d | 0.051 | |
PP1V8_S0 | Default | d | 0.135 | |
PP3V3_S0 | Default | d | 0.301 | |
PP3V3_S0_CPUTHMSNS_R | Default | d | 0.310 | |
PP3V3_S3 | Default | d | 0.342 | |
PP3V3_S5 | Default | d | 0.290 | |
PP3V3_S5_AVREF_SMC | Default | d | 0.470 | |
PP3V3_S5_SMC_AVCC | Default | d | 0.288 | |
PP3V3_SUS | Default | d | 0.373 | |
PP3V3_SW_LCD | Default | d | 0.504 | |
PP3V42_G3H | Default | d | 0.00 | |
PP5V1_CHGR_VDD | Default | d | 0.414 | |
PP5V1_CHGR_VDDP | Default | d | 0.414 | |
PP5V_S0 | Default | d | 0.358 | |
PP5V_S0_CPUVCCIOS0_VCC | Default | d | 0.357 | |
PP5V_S0_VCCSAS0_VCC | Default | d | 0.357 | |
PP5V_S3 | Default | d | 0.418 | |
PP5V_S5 | Default | d | 0.438 | |
PPBUS_G3H | Default | d | 0.435 | |
PPBUS_S5_HS_COMPUTING_ISNS | Default | d | 0.444 | |
PPBUS_SW_LCDBKLT_PWR_SW | Default | d | 0.398 | |
PPDCIN_G3H | Default | d | 0.652 | |
PPDCIN_G3H | Default | t | OL when LIO is disconnected. | |
PPVBAT_G3H_CHGR_REG | Default | d | 0.435 | |
PPVCORE_S0_AXG_R | Default | d | 0.000 | |
PPVCORE_S0_CPU_PH1 | Default | d | 0.000 | |
PPVOUT_SW_LCDBKLT | Default | d | 0.530 | |
PPVOUT_SW_LCDBKLT_FB | Default | d | 0.534 | |
PVCCIO_S0_SMC_R | Default | d | 0.012 | |
PVCCSA_EN | Default | d | 0.474 | |
PVCCSA_PGOOD | Default | d | 0.422 | |
S5PGOOD_DLY | Default | d | 0.400 | |
S5_PWRGD | Default | d | 0.402 | |
SATARDRVR_EN | Default | d | 0.464 | |
SMBUS_PCH_CLK | Default | d | 0.437 | |
SMBUS_PCH_DATA | Default | d | 0.437 | |
SMBUS_SMC_0_S0_SCL | Default | d | 0.473 | |
SMBUS_SMC_0_S0_SDA | Default | d | 0.473 | |
SMBUS_SMC_A_S3_SCL | Default | d | 0.451 | |
SMBUS_SMC_A_S3_SDA | Default | d | 0.450 | |
SMBUS_SMC_BSA_SCL | Default | d | 0.439 | |
SMBUS_SMC_BSA_SDA | Default | d | 0.439 | |
SMBUS_SMC_B_S0_SCL | Default | d | 0.439 | |
SMBUS_SMC_B_S0_SDA | Default | d | 0.441 | |
SMBUS_SMC_MGMT_SCL | Default | d | 0.462 | |
SMBUS_SMC_MGMT_SDA | Default | d | 0.464 | |
SMC_1V5S3_ISENSE | Default | d | 0.723 | |
SMC_ADAPTER_EN | Default | d | 0.446 | |
SMC_BATLOW_L | Default | d | 0.484 | |
SMC_BC_ACOK | Default | d | 0.466 | |
SMC_BIL_BUTTON_L | Default | d | 0.543 | |
SMC_BMON_ISENSE | Default | d | 0.535 | |
SMC_BMON_MUX_SEL | Default | d | 0.542 | |
SMC_CASE_OPEN | Default | d | 0.475 | |
SMC_CLK32K | Default | d | 0.454 | |
SMC_CPUVCCIO_ISENSE | Default | d | 0.733 | |
SMC_CPU_ISENSE | Default | d | 0.718 | |
SMC_CPU_VSENSE | Default | d | 0.650 | |
SMC_DCIN_ISENSE | Default | d | 0.727 | |
SMC_DCIN_VSENSE | Default | d | 0.676 | |
SMC_DELAYED_PWRGD | Default | d | 0.530 | |
SMC_DP_HPD_L | Default | d | 0.507 | |
SMC_EXTAL | Default | d | 0.731 | |
SMC_FAN_0_CTL | Default | d | 0.533 | |
SMC_FAN_0_TACH | Default | d | 0.527 | |
SMC_GFX_ISENSE | Default | d | 0.718 | |
SMC_GFX_OVERTEMP_L | Default | d | 0.542 | |
SMC_GFX_VSENSE | Default | d | 0.650 | |
SMC_HDD_ISENSE | Default | d | 0.545 | |
SMC_HDD_OOB_TEMP | Default | d | 0.525 | |
SMC_HDD_TEMP_CTL | Default | d | 0.533 | |
SMC_HS_COMPUTING_ISENSE | Default | d | 0.532 | |
SMC_IG_THROTTLE_L | Default | d | 0.501 | |
SMC_KBC_MDE | Default | d | 0.730 | |
SMC_LCDBKLT_ISENSE | Default | d | 0.540 | |
SMC_LID | Default | d | 0.555 | |
SMC_LRESET_L | Default | d | 0.392 | |
SMC_MANUAL_RST_L | Default | d | 0.525 | |
SMC_MD1 | Default | d | 0.718 | |
SMC_NMI | Default | d | 0.718 | |
SMC_ONOFF_L | Default | d | 0.503 | |
SMC_PB4 | Default | d | 0.508 | |
SMC_PBUS_VSENSE | Default | d | 0.493 | |
SMC_PME_S4_WAKE_L | Default | d | 0.530 | |
SMC_PM_G2_EN | Default | d | 0.400 | |
SMC_PROCHOT | Default | d | 0.532 | |
SMC_PROCHOT_3_3_L | Default | d | 0.486 | |
SMC_RESET_L | Default | d | 0.405 | |
SMC_RUNTIME_SCI_L | Default | d | 0.474 | |
SMC_RX_L | Default | d | 0.484 | |
SMC_S4_WAKESRC_EN | Default | d | 0.535 | |
SMC_SCI_L | Default | d | 0.455 | |
SMC_SYS_KBDLED | Default | d | 0.529 | |
SMC_TCK | Default | d | 0.482 | |
SMC_TDI | Default | d | 0.483 | |
SMC_TDO | Default | d | 0.546 | |
SMC_THRMTRIP | Default | d | 0.535 | |
SMC_TMS | Default | d | 0.481 | |
SMC_TPAD_RST_L | Default | d | 0.545 | |
SMC_TRST_L | Default | d | 0.728 | |
SMC_TX_L | Default | d | 0.487 | |
SMC_VCL | Default | d | 0.355 | |
SMC_WLAN_ISENSE | Default | d | 0.540 | |
SMC_XTAL | Default | d | 0.711 | |
SMS_INT_L | Default | d | 0.484 | |
SPIROM_USE_MLB | Default | d | 0.460 | |
SPI_ALT_CLK | Default | d | 0.474 | |
SPI_ALT_CS_L | Default | d | 0.468 | |
SPI_ALT_MISO | Default | d | 0.00 | |
SPI_ALT_MOSI | Default | d | 0.445 | |
SPI_DESCRIPTOR_OVERRIDE_L | Default | d | 0.488 | |
SPI_MISO | Default | d | 0.439 | |
SPI_MLB_CLK | Default | d | 0.476 | |
SPI_MLB_CS_L | Default | d | 0.470 | |
SPI_MLB_MISO | Default | d | 0.437 | |
SPI_MLB_MOSI | Default | d | 0.450 | |
SPI_MOSI | Default | d | 0.445 | |
SPI_WP_L | Default | d | 0.575 | |
SYS_ONEWIRE | Default | d | 0.483 | |
SYS_ONEWIRE | Default | t | 0.483 LIO connected. 0.488 LIO disconnected. ONE_WIRE circuit on LIO board. | |
SYS_ONEWIRE | Default | v | 3.000 | |
T29THMSNS_ALERT_L | Default | d | 0.666 | |
T29_MLBBOT_THMSNS_N | Default | d | 0.631 | |
T29_MLBBOT_THMSNS_P | Default | d | 0.634 | |
TP_BKL_FAULT | Default | d | NA | |
TP_SMC_ADC13 | Default | d | NA | |
TP_SMC_ADC15 | Default | d | NA | |
TP_SMC_GFX_THROTTLE_L | Default | d | NA | |
TP_SMC_P10 | Default | d | NA | |
TP_SMC_P20 | Default | d | NA | |
TP_SMC_P24 | Default | d | NA | |
TP_SMC_P43 | Default | d | NA | |
TP_SMC_PF5 | Default | d | NA | |
TP_SMC_RSTGATE_L | Default | d | NA | |
TP_XDP_PCH_TRST_L | Default | d | OL | |
UNCONNECTED_181 | Default | d | 0.570 | |
UNCONNECTED_182 | Default | d | OL | |
UNCONNECTED_183 | Default | d | 0.447 | |
UNCONNECTED_184 | Default | d | 0.543 | |
UNCONNECTED_185 | Default | d | 0.996 | |
UNCONNECTED_192 | Default | d | NA | |
UNCONNECTED_318 | Default | d | NA | |
UNCONNECTED_319 | Default | d | NA | |
UNCONNECTED_320 | Default | d | NA | |
UNCONNECTED_321 | Default | d | NA | |
UNCONNECTED_322 | Default | d | NA | |
UNCONNECTED_323 | Default | d | NA | |
UNCONNECTED_324 | Default | d | NA | |
UNCONNECTED_325 | Default | d | NA | |
UNCONNECTED_326 | Default | d | NA | |
UNCONNECTED_327 | Default | d | NA | |
UNCONNECTED_328 | Default | d | NA | |
UNCONNECTED_329 | Default | d | NA | |
UNCONNECTED_330 | Default | d | NA | |
UNCONNECTED_331 | Default | d | NA | |
UNCONNECTED_332 | Default | d | NA | |
UNCONNECTED_333 | Default | d | NA | |
UNCONNECTED_334 | Default | d | NA | |
UNCONNECTED_335 | Default | d | NA | |
UNCONNECTED_336 | Default | d | NA | |
UNCONNECTED_337 | Default | d | NA | |
UNCONNECTED_338 | Default | d | NA | |
UNCONNECTED_339 | Default | d | NA | |
UNCONNECTED_340 | Default | d | NA | |
UNCONNECTED_341 | Default | d | NA | |
UNCONNECTED_401 | Default | d | - | |
UNCONNECTED_404 | Default | d | - | |
UNCONNECTED_408 | Default | d | 0.404 | |
USB_DEBUGPRT_EN_L | Default | d | 0.461 | |
VCCSAS0_AGND | Default | d | 0.000 | |
VCCSAS0_DRVH | Default | d | 0.456 | |
VCCSAS0_DRVL | Default | d | 0.405 | |
VCCSAS0_FSEL | Default | d | 0.000 | |
VCCSAS0_LL | Default | d | 0.035 | |
VCCSAS0_OCSET | Default | d | 0.289 | |
VCCSAS0_RTN | Default | d | 0.000 | |
VCCSAS0_SET0 | Default | d | 0.474 | |
VCCSAS0_SET1 | Default | d | 0.471 | |
VCCSAS0_SREF | Default | d | 0.473 | |
VCCSAS0_VBST | Default | d | 0.490 | |
VCCSAS0_VO | Default | d | 0.289 | |
WIFI_EVENT_L | Default | d | 0.486 | |
XDPPCH_PLTRST_L | Default | d | 0.566 | |
XDP_CPU_TDI | Default | d | 0.033 | |
XDP_DBRESET_L | Default | d | 0.466 | |
XDP_PCH_AUD_IPHS_SWITCH_EN | Default | d | 0.459 | |
XDP_PCH_ENET_PWR_EN | Default | d | 0.517 | |
XDP_PCH_GPIO59_OC0_L | Default | d | 0.397 | |
XDP_PCH_ISOLATE_CPU_MEM_L | Default | d | 0.471 | |
XDP_PCH_PWRBTN_L | Default | d | 0.435 | |
XDP_PCH_S5_PWRGD | Default | d | 0.627 | |
XDP_PCH_SDCONN_DET_L | Default | d | 0.462 | |
XDP_PCH_SDCONN_STATE_RST_L | Default | d | 0.455 | |
XDP_PCH_TCK | Default | d | 0.019 | |
XDP_PCH_TDI | Default | d | 0.423 | |
XDP_PCH_TDO | Default | d | 0.411 | |
XDP_PCH_TMS | Default | d | 0.422 | |
XDP_PCH_USB_HUB_SOFT_RST_L | Default | d | 0.514 |
Component | Type | Value |
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