Netname | Condition | Type | Value | Comment |
1V05_S0_RMC_DIV | Default | d | OL | |
1V0_GPU_IOUT | Default | d | OL | |
1V5_S0_FB | Default | d | 0.776 | |
1V5_S0_SW | Default | d | 0.376 | |
4V5_NR | Default | d | 0.658 | |
4V5_REG_EN | Default | d | 0.711 | |
4V5_REG_IN | Default | d | 0.427 | |
ADAPTER_SENSE | Default | d | 0.63 | |
ALL_SYS_PWRGD | Default | d | 0.465 | |
ALL_SYS_PWRGD_R | Default | d | OL | |
AP_CLKREQ_L | Default | d | 0.463 | |
AP_CLKREQ_Q_L | Default | d | 0.470 | |
AP_PWR_EN | Default | d | 0.460 | |
AP_RESET_CONN_L | Default | d | 0.471 | |
AP_RESET_L | Default | d | 0.434 | |
AUDIO_SCL | Default | d | 0.475 | |
AUDIO_SDA | Default | d | 0.479 | |
AUD_CONN_HP_LEFT | Default | d | 0.782 | |
AUD_CONN_HP_RIGHT | Default | d | 0.745 | |
AUD_CONN_MIC | Default | d | 0.538 | |
AUD_CONN_MIC_XW | Default | d | 0.391 | |
AUD_CONN_SLEEVE | Default | d | 0.528 | |
AUD_CONN_SLEEVE_XW | Default | d | 0.390 | |
AUD_CONN_TIPDET_INV | Default | d | OL | |
AUD_CONN_TYPEDET | Default | d | OL | |
AUD_DMIC_CLK | Default | d | 0.705 | |
AUD_DMIC_CLK_R | Default | d | 0.702 | |
AUD_DMIC_SDA1 | Default | d | 0.740 | |
AUD_DMIC_SDA2 | Default | d | 0.703 | |
AUD_GPIO_3 | Default | d | 0.520 | |
AUD_HP_PORT_L | Default | d | 0.765 | |
AUD_HP_PORT_R | Default | d | 0.765 | |
AUD_HP_PORT_REF | Default | d | 0.454 | |
AUD_HP_ZOBEL_L | Default | d | 0.042 | |
AUD_HP_ZOBEL_R | Default | d | 0.041 | |
AUD_I2C_INT_L | Default | d | 0.529 | |
AUD_IPHS_SWITCH_EN | Default | d | 0.565 | |
AUD_IPHS_SWITCH_EN_PCH | Default | d | 0.572 | |
AUD_IP_PERIPHERAL_DET | Default | d | 0.429 | |
AUD_LO1_L_N | Default | d | 0.704 | |
AUD_LO1_L_P | Default | d | 0.707 | |
AUD_LO1_R_N | Default | d | 0.705 | |
AUD_LO1_R_P | Default | d | 0.705 | |
AUD_LO2_L_N | Default | d | 0.700 | |
AUD_LO2_L_P | Default | d | OL | |
AUD_LO2_R_N | Default | d | 0.703 | |
AUD_LO2_R_P | Default | d | 0.709 | |
AUD_MIC_INL_N | Default | d | 0.750 | |
AUD_MIC_INL_P | Default | d | 0.740 | |
AUD_OUTJACK_INSERT_L | Default | d | 0.445 | |
AUD_PORTA_DET_L | Default | d | 0.822 | |
AUD_PORTB_DET_L | Default | d | 0.690 | |
AUD_PORTC_DET_L | Default | d | 0.420 | |
AUD_SDI_R | Default | d | 0.466 | |
AUD_SENSE_A | Default | d | 0.753 | |
AUD_SPDIF_OUT | Default | d | 0.702 | |
AUD_SPDIF_OUT_JACK | Default | d | 0.737 | |
AUD_SPKRAMP_SHUTDOWN_L | Default | d | 0.520 | |
AUD_TIPDET_FET1 | Default | d | 0.429 | |
AUD_TIPDET_FET2 | Default | d | 0.660 | |
AUD_TIPDET_INV | Default | d | OL | |
AUD_TYPEDET | Default | d | OL | |
AUD_TYPEDET_OD | Default | d | OL | |
AUD_TYPEDET_OD_INV | Default | d | 0.470 | |
BKLT_EN | Default | d | 0.576 | |
BKLT_PLT_RST_L | Default | d | 0.437 | |
BKL_FB | Default | d | 0.713 | |
BKL_FET_CNTL | Default | d | 0.514 | |
BKL_FLT | Default | d | 0.575 | |
BKL_FSET | Default | d | 0.574 | |
BKL_ISEN1 | Default | d | 0.637 | |
BKL_ISEN2 | Default | d | 0.636 | |
BKL_ISEN3 | Default | d | 0.636 | |
BKL_ISEN4 | Default | d | 0.364 | |
BKL_ISEN5 | Default | d | 0.634 | |
BKL_ISEN6 | Default | d | 0.634 | |
BKL_ISET | Default | d | 0.574 | |
BKL_SCL | Default | d | 0.545 | |
BKL_SDA | Default | d | 0.547 | |
BKL_SGND | Default | d | 0.001 | |
BKL_SW | Default | d | 0.432 | |
BKL_VSYNC_R | Default | d | 0.575 | |
BLC_GPIO | Default | d | 0.576 | |
BLC_I2C_MUX_SEL | Default | d | 0.592 | |
BTMUX_SEL | Default | d | 0.517 | |
BUTTON_DISABLE | Default | d | 0.450 | |
CAP_COMP_H | Default | d | OL | |
CAP_COMP_L | Default | d | OL | |
CAP_COMP_L_INV | Default | d | OL | |
CAP_SINK | Default | d | OL | |
CAP_SOURCE | Default | d | OL | |
CAP_VREF_H | Default | d | OL | |
CAP_VREF_L | Default | d | OL | |
CHGR_ACIN | Default | d | 0.54 | |
CHGR_AGATE | Default | d | 0.66 | |
CHGR_AGATE_DIV | Default | d | OL | |
CHGR_AMON | Default | d | 0.73 | |
CHGR_BGATE | Default | d | 0.68 | |
CHGR_BMON | Default | d | 0.73 | |
CHGR_BOOT | Default | d | 0.60 | |
CHGR_CELL | Default | d | 0.72 | |
CHGR_CSI_N | Default | d | 0.66 | |
CHGR_CSI_N | Default | r | 22.500R | |
CHGR_CSI_P | Default | d | 0.64 | |
CHGR_CSI_P | Default | r | 22.500R | |
CHGR_CSI_R_N | Default | d | 0.642 | |
CHGR_CSI_R_P | Default | d | 0.642 | |
CHGR_CSO_N | Default | d | 0.45 | |
CHGR_CSO_N | Default | r | 4.900R | |
CHGR_CSO_P | Default | d | 0.45 | |
CHGR_CSO_P | Default | r | 4.900R | |
CHGR_CSO_R_N | Default | d | 0.450 | |
CHGR_CSO_R_P | Default | d | 0.450 | |
CHGR_DCIN | Default | d | 0.60 | |
CHGR_DCIN_D_R | Default | d | 0.601 | |
CHGR_DCIN_D_R | Default | v | 20.100 | |
CHGR_ICOMP | Default | d | 0.73 | |
CHGR_ICOMP_RC | Default | d | 0.731 | |
CHGR_LGATE | Default | d | 0.46 | |
CHGR_PHASE | Default | d | 0.45 | |
CHGR_RST_L | Default | d | 0.50 | |
CHGR_SGATE | Default | d | 0.654 | |
CHGR_SGATE_DIV | Default | d | OL | |
CHGR_UGATE | Default | d | 0.90 | |
CHGR_VCOMP | Default | d | 0.73 | |
CHGR_VCOMP_R | Default | d | OL | |
CHGR_VFRQ | Default | d | 0.52 | |
CHGR_VNEG | Default | d | 0.54 | |
CHGR_VNEG_R | Default | d | OL | |
CHS_CLAMPO | Default | d | 0.486 | |
CH_HS_MIC | Default | d | 0.529 | |
COMP_CPU_VCORE_RMC | Default | d | OL | |
CON_DMIC_CLK | Default | d | 0.711 | |
CON_DMIC_PWR | Default | d | 0.310 | |
CON_DMIC_SDA1 | Default | d | 0.711 | |
CON_DMIC_SDA2 | Default | d | 0.713 | |
CPUIMVP_AXG_PGOOD | Default | d | 0.604 | |
CPUIMVP_AXG_PWM2 | Default | d | 0.578 | |
CPUIMVP_BOOT1 | Default | d | 0.618 | |
CPUIMVP_BOOT1G | Default | d | 0.618 | |
CPUIMVP_BOOT1G_R | Default | d | 0.618 | |
CPUIMVP_BOOT1_RC | Default | d | 0.619 | |
CPUIMVP_BOOT2 | Default | d | 0.618 | |
CPUIMVP_BOOT2G | Default | d | 0.600 | |
CPUIMVP_BOOT2G_RC | Default | d | 0.600 | |
CPUIMVP_BOOT2_RC | Default | d | 0.617 | |
CPUIMVP_BOOT3 | Default | d | 0.596 | |
CPUIMVP_BOOT3_RC | Default | d | 0.609 | |
CPUIMVP_FBA | Default | d | 0.685 | |
CPUIMVP_FBA_R | Default | d | 0.013 | |
CPUIMVP_FBB | Default | d | 0.687 | |
CPUIMVP_FBB_R | Default | d | 0.013 | |
CPUIMVP_IMAXA | Default | d | 0.625 | |
CPUIMVP_IMAXB | Default | d | 0.600 | |
CPUIMVP_ISNS1G_N | Default | d | 0.002 | |
CPUIMVP_ISNS1G_P | Default | d | 0.002 | |
CPUIMVP_ISNS1G_R_N | Default | d | OL | |
CPUIMVP_ISNS1G_R_P | Default | d | OL | |
CPUIMVP_ISNS1_N | Default | d | 0.001 | |
CPUIMVP_ISNS1_P | Default | d | 0.001 | |
CPUIMVP_ISNS2G_N | Default | d | 0.002 | |
CPUIMVP_ISNS2G_P | Default | d | 0.002 | |
CPUIMVP_ISNS2_N | Default | d | 0.001 | |
CPUIMVP_ISNS2_P | Default | d | 0.001 | |
CPUIMVP_ISNS3_N | Default | d | 0.001 | |
CPUIMVP_ISNS3_P | Default | d | 0.001 | |
CPUIMVP_ISUM | Default | d | 0.103 | |
CPUIMVP_ISUM2P | Default | d | 0.049 | |
CPUIMVP_ISUM3P | Default | d | 0.026 | |
CPUIMVP_ISUMG1P | Default | d | 0.052 | |
CPUIMVP_ISUMG2P | Default | d | 0.050 | |
CPUIMVP_ISUMGN | Default | d | 0.008 | |
CPUIMVP_ISUMG_AVEP | Default | d | 0.104 | |
CPUIMVP_ISUMG_AVE_RP | Default | d | 0.104 | |
CPUIMVP_ISUMG_IOUT | Default | d | OL | |
CPUIMVP_ISUMG_R_N | Default | d | OL | |
CPUIMVP_ISUMG_R_P | Default | d | OL | |
CPUIMVP_ISUMN | Default | d | 0.005 | |
CPUIMVP_ISUM_R | Default | d | 0.104 | |
CPUIMVP_ISUM_R_P | Default | d | OL | |
CPUIMVP_LGATE1 | Default | d | 0.511 | |
CPUIMVP_LGATE2G | Default | d | 0.522 | |
CPUIMVP_LGATE3 | Default | d | 0.520 | |
CPUIMVP_NTC | Default | d | 0.604 | |
CPUIMVP_NTCG | Default | d | 0.696 | |
CPUIMVP_PGOOD | Default | d | 0.585 | |
CPUIMVP_PH2_SNUB | Default | d | OL | |
CPUIMVP_PHASE1 | Default | d | 0.001 | |
CPUIMVP_PHASE1 | Default | r | 2.000R | |
CPUIMVP_PHASE1G | Default | d | 0.002 | |
CPUIMVP_PHASE1G | Default | r | 2.000R | |
CPUIMVP_PHASE2 | Default | d | 0.001 | |
CPUIMVP_PHASE2 | Default | r | 2.000R | |
CPUIMVP_PHASE2G | Default | d | 0.002 | |
CPUIMVP_PHASE2G | Default | r | 2.000R | |
CPUIMVP_PHASE3 | Default | d | 0.002 | |
CPUIMVP_PHASE3_L | Default | d | 0.001 | |
CPUIMVP_PHASE3_L | Default | r | 2.000R | |
CPUIMVP_PWM3 | Default | d | 0.581 | |
CPUIMVP_SKIP | Default | d | 0.619 | |
CPUIMVP_SLEW | Default | d | 0.702 | |
CPUIMVP_TONA | Default | d | 0.684 | |
CPUIMVP_TONB | Default | d | 0.682 | |
CPUIMVP_UGATE1G | Default | d | 0.693 | |
CPUIMVP_UGATE2 | Default | d | 0.695 | |
CPUIMVP_UGATE2G | Default | d | 0.697 | |
CPUIMVP_UGATE3 | Default | d | 0.696 | |
CPUIMVP_VR_ON | Default | d | 0.466 | |
CPUTHMSNS_ALERT_L | Default | d | 0.770 | |
CPUTHMSNS_D2_N | Default | d | 0.768 | |
CPUTHMSNS_D2_P | Default | d | 0.767 | |
CPUTHMSNS_THM_L | Default | d | 0.777 | |
CPUVCCIOISNS_R_N | Default | d | OL | |
CPUVCCIOISNS_R_P | Default | d | OL | |
CPUVCCIOS0_AGND | Default | d | 0.002 | |
CPUVCCIOS0_BOOT_RC | Default | d | 0.536 | |
CPUVCCIOS0_CS_N | Default | d | 0.011 | |
CPUVCCIOS0_CS_P | Default | d | 0.011 | |
CPUVCCIOS0_DRVH | Default | d | 0.527 | |
CPUVCCIOS0_DRVL | Default | d | 0.440 | |
CPUVCCIOS0_EN | Default | d | 0.533 | |
CPUVCCIOS0_FB | Default | d | 0.517 | |
CPUVCCIOS0_FSEL | Default | d | 0.003 | |
CPUVCCIOS0_LL | Default | d | 0.011 | |
CPUVCCIOS0_LL | Default | r | 12.500R | |
CPUVCCIOS0_OCSET | Default | d | 0.520 | |
CPUVCCIOS0_PGOOD | Default | d | 0.500 | |
CPUVCCIOS0_RTN | Default | d | 0.512 | |
CPUVCCIOS0_SREF | Default | d | 0.530 | |
CPUVCCIOS0_VBST | Default | d | 0.542 | |
CPUVCCIOS0_VO | Default | d | 0.517 | |
CPUVSENSE_IN | Default | d | 0.016 | |
CPU_AXG_SENSE_N | Default | d | 0.001 | |
CPU_AXG_SENSE_P | Default | d | 0.005 | |
CPU_AXG_SENSE_R | Default | d | 0.012 | |
CPU_CATERR_L | Default | d | 0.386 | |
CPU_CFG<0> | Default | d | 0.387 | |
CPU_CFG<10> | Default | d | 0.380 | |
CPU_CFG<11> | Default | d | 0.376 | |
CPU_CFG<12> | Default | d | 0.383 | |
CPU_CFG<13> | Default | d | 0.381 | |
CPU_CFG<14> | Default | d | 0.379 | |
CPU_CFG<15> | Default | d | 0.378 | |
CPU_CFG<16> | Default | d | 0.381 | |
CPU_CFG<17> | Default | d | 0.383 | |
CPU_CFG<1> | Default | d | 0.385 | |
CPU_CFG<2> | Default | d | 0.385 | |
CPU_CFG<3> | Default | d | 0.382 | |
CPU_CFG<4> | Default | d | 0.371 | |
CPU_CFG<5> | Default | d | 0.361 | |
CPU_CFG<6> | Default | d | 0.371 | |
CPU_CFG<7> | Default | d | 0.381 | |
CPU_CFG<8> | Default | d | 0.377 | |
CPU_CFG<9> | Default | d | 0.400 | |
CPU_DDR_VREF | Default | d | 0.447 | |
CPU_EDP_COMP | Default | d | 0.037 | |
CPU_MEM_RESET_L | Default | d | 0.339 | |
CPU_PECI | Default | d | 0.377 | |
CPU_PECI_R | Default | d | 0.332 | |
CPU_PEG_COMP | Default | d | 0.036 | |
CPU_PROCHOT_L | Default | d | 0.082 | |
CPU_PROCHOT_R_L | Default | d | 0.138 | |
CPU_PROC_SEL_L | Default | d | 0.003 | |
CPU_PWRGD | Default | d | 0.476 | |
CPU_SM_RCOMP<0> | Default | d | 0.139 | |
CPU_SM_RCOMP<1> | Default | d | 0.027 | |
CPU_SM_RCOMP<2> | Default | d | 0.192 | |
CPU_THRMTRIP_3V3 | Default | d | 0.751 | |
CPU_VCCIOSENSE_N | Default | d | 0.002 | |
CPU_VCCIOSENSE_P | Default | d | 0.013 | |
CPU_VCCIO_SEL | Default | d | 0.001 | |
CPU_VCCSASENSE | Default | d | 0.008 | |
CPU_VCCSASENSE_DIV | Default | d | 0.517 | |
CPU_VCCSA_VID<1> | Default | d | 0.382 | |
CPU_VCCSENSE_P | Default | d | 0.002 | |
CPU_VCCSENSE_R | Default | d | 0.011 | |
CPU_VCORE_RMCN | Default | d | OL | |
CPU_VCORE_RMCP | Default | d | OL | |
CPU_VCORE_RMC_DIV | Default | d | OL | |
CPU_VIDALERT_L | Default | d | 0.089 | |
CPU_VIDALERT_L_R | Default | d | 0.133 | |
CPU_VIDSCLK | Default | d | 0.069 | |
CPU_VIDSCLK_R | Default | d | 0.067 | |
CPU_VIDSOUT | Default | d | 0.077 | |
CPU_VIDSOUT_R | Default | d | 0.078 | |
CS4206_FLYC | Default | d | 0.416 | |
CS4206_FLYN | Default | d | 1.575 | |
CS4206_FLYP | Default | d | 0.620 | |
CS4206_FN | Default | d | 1.575 | |
CS4206_FP | Default | d | 0.441 | |
CS4206_VCOM | Default | d | 0.594 | |
CS4206_VREF_ADC | Default | d | 0.759 | |
DAC_AVDD | Default | d | 0.613 | |
DCINVSENS_EN | Default | d | 0.750 | |
DCINVSENS_EN_L | Default | d | 0.466 | |
DCIN_ISOL_GATE | Default | d | 0.779 | |
DCIN_ISOL_GATE_R | Default | d | OL | |
DCIN_ISOL_GATE_R | Default | v | 6.700 | |
DCIN_S5_VSENSE | Default | d | OL | |
DC_TEST_B3_C2 | Default | d | OL | |
DC_TEST_B63_A64 | Default | d | OL | |
DC_TEST_B65_C64 | Default | d | OL | |
DC_TEST_BG64_BH65 | Default | d | OL | |
DC_TEST_BH1_BG2 | Default | d | OL | |
DC_TEST_BH3_BJ2 | Default | d | OL | |
DC_TEST_BJ64_BH63 | Default | d | OL | |
DDR3THMSNS_D1_N | Default | d | 0.779 | |
DDR3THMSNS_D1_P | Default | d | 0.785 | |
DDRREG_1V8_VREF | Default | d | 0.639 | |
DDRREG_DRVH | Default | d | 0.717 | |
DDRREG_DRVH_R | Default | d | 0.718 | |
DDRREG_DRVL | Default | d | 0.472 | |
DDRREG_EN | Default | d | 0.561 | |
DDRREG_FB | Default | d | 0.691 | |
DDRREG_LL | Default | d | 0.227 | |
DDRREG_MODE | Default | d | 0.546 | |
DDRREG_P1V35_L | Default | d | OL | |
DDRREG_TRIP | Default | d | 0.753 | |
DDRREG_VBST | Default | d | 0.631 | |
DDRREG_VDDQSNS | Default | d | 0.227 | |
DDRREG_VSW | Default | d | 0.224 | |
DDRREG_VTTSNS | Default | d | 0.165 | |
DMI_CLK100M_CPU_N | Default | d | 0.392 | |
DMI_CLK100M_CPU_P | Default | d | 0.390 | |
DPA_EG_DDC_CLK | Default | d | 0.652 | |
DPA_EG_DDC_DATA | Default | d | 0.653 | |
DPA_IG_AUX_CH_N | Default | d | 0.402 | |
DPA_IG_AUX_CH_P | Default | d | 0.406 | |
DPA_IG_DDC_CLK | Default | d | 0.577 | |
DPA_IG_DDC_DATA | Default | d | 0.584 | |
DPB_EG_DDC_CLK | Default | d | 0.654 | |
DPB_EG_DDC_DATA | Default | d | 0.654 | |
DPB_IG_AUX_CH_N | Default | d | 0.408 | |
DPB_IG_AUX_CH_P | Default | d | 0.409 | |
DPB_IG_DDC_CLK | Default | d | 0.580 | |
DPB_IG_DDC_DATA | Default | d | 0.585 | |
DPMUX_HPD_PD | Default | d | 0.760 | |
DPMUX_LRESET_L | Default | d | 0.52 | |
DPMUX_UC_CLK32K | Default | d | 0.63 | |
DPMUX_UC_EXTAL | Default | d | 0.61 | |
DPMUX_UC_IRQ | Default | d | 0.548 | |
DPMUX_UC_MD1 | Default | d | 0.61 | |
DPMUX_UC_MD2 | Default | d | 0.58 | |
DPMUX_UC_NMI | Default | d | 0.61 | |
DPMUX_UC_PECI | Default | d | 0.61 | |
DPMUX_UC_PEVREF | Default | d | 0.45 | |
DPMUX_UC_RESET_L | Default | d | 0.61 | |
DPMUX_UC_RX | Default | d | 0.59 | |
DPMUX_UC_TCK | Default | d | 0.63 | |
DPMUX_UC_TDI | Default | d | 0.63 | |
DPMUX_UC_TDO | Default | d | 0.63 | |
DPMUX_UC_TMS | Default | d | 0.63 | |
DPMUX_UC_TRST_L | Default | d | 0.63 | |
DPMUX_UC_TX | Default | d | 0.59 | |
DPMUX_UC_UNUSED | Default | d | 0.49 | |
DPMUX_UC_VCL | Default | d | 0.46 | |
DPMUX_UC_XTAL | Default | d | 0.61 | |
DPMUX_UC_XTAL_R | Default | d | OL | |
DP_AUXCH_ISOL | Default | d | 0.709 | |
DP_AUXIO_EN | Default | d | 0.617 | |
DP_A_AUXCH_DDC_N | Default | d | 0.718 | |
DP_A_AUXCH_DDC_P | Default | d | 0.717 | |
DP_A_CA_DET_BUF | Default | d | 0.641 | |
DP_A_LSX_ML_N<1> | Default | d | 0.714 | |
DP_B_AUXCH_DDC_N | Default | d | 0.705 | |
DP_B_AUXCH_DDC_P | Default | d | 0.725 | |
DP_B_CA_DET_BUF | Default | d | 0.639 | |
DP_B_LSX_ML_P<1> | Default | d | 0.740 | |
DP_DDC_MUX_CROSSBAR_L | Default | d | 0.51 | |
DP_EXTA_CA_DET_EG | Default | d | 0.633 | |
DP_EXTA_MUX_EN | Default | d | 0.51 | |
DP_EXTA_MUX_EN | Default | v | 3.30 | |
DP_EXTA_MUX_SEL_EG | Default | d | 0.51 | |
DP_EXTB_CA_DET_EG | Default | d | 0.62 | |
DP_EXTB_MUX_EN | Default | d | 0.51 | |
DP_EXTB_MUX_SEL_EG | Default | d | 0.520 | |
DP_INT_AUX_C_N | Default | d | 0.706 | |
DP_INT_AUX_C_P | Default | d | 0.692 | |
DP_INT_AUX_N | Default | d | OL | |
DP_INT_AUX_P | Default | d | OL | |
DP_INT_EG_AUX_N | Default | d | 0.729 | |
DP_INT_EG_AUX_P | Default | d | 0.726 | |
DP_INT_EG_HPD | Default | d | 0.63 | |
DP_INT_EG_ML_N<0> | Default | d | 0.405 | |
DP_INT_EG_ML_N<1> | Default | d | 0.392 | |
DP_INT_EG_ML_N<2> | Default | d | 0.393 | |
DP_INT_EG_ML_N<3> | Default | d | 0.394 | |
DP_INT_EG_ML_P<0> | Default | d | 0.410 | |
DP_INT_EG_ML_P<1> | Default | d | 0.394 | |
DP_INT_EG_ML_P<2> | Default | d | 0.394 | |
DP_INT_EG_ML_P<3> | Default | d | 0.394 | |
DP_INT_IG_AUX_N | Default | d | 0.335 | |
DP_INT_IG_AUX_P | Default | d | 0.335 | |
DP_INT_IG_HPD | Default | d | 0.643 | |
DP_INT_IG_ML_N<0> | Default | d | 0.311 | |
DP_INT_IG_ML_N<1> | Default | d | 0.326 | |
DP_INT_IG_ML_N<2> | Default | d | 0.314 | |
DP_INT_IG_ML_N<3> | Default | d | 0.318 | |
DP_INT_IG_ML_P<0> | Default | d | 0.315 | |
DP_INT_IG_ML_P<1> | Default | d | 0.314 | |
DP_INT_IG_ML_P<2> | Default | d | 0.319 | |
DP_INT_IG_ML_P<3> | Default | d | 0.318 | |
DP_INT_ML_C_N<0> | Default | d | 0.419 | |
DP_INT_ML_C_N<1> | Default | d | 0.414 | |
DP_INT_ML_C_P<0> | Default | d | 0.414 | |
DP_INT_ML_C_P<1> | Default | d | 0.414 | |
DP_INT_ML_N<0> | Default | d | OL | |
DP_INT_ML_N<1> | Default | d | OL | |
DP_INT_ML_N<2> | Default | d | OL | |
DP_INT_ML_N<3> | Default | d | OL | |
DP_INT_ML_P<0> | Default | d | OL | |
DP_INT_ML_P<1> | Default | d | OL | |
DP_INT_ML_P<2> | Default | d | OL | |
DP_INT_ML_P<3> | Default | d | OL | |
DP_TBTPA_AUXCH_C_N | Default | d | 0.542 | |
DP_TBTPA_AUXCH_C_P | Default | d | 0.557 | |
DP_TBTPA_AUXCH_N | Default | d | 0.735 | |
DP_TBTPA_AUXCH_P | Default | d | 0.739 | |
DP_TBTPA_DDC_CLK | Default | d | 0.625 | |
DP_TBTPA_DDC_DATA | Default | d | 0.630 | |
DP_TBTPA_HPD | Default | d | 0.565 | |
DP_TBTPA_HPD_BUF | Default | d | 0.640 | |
DP_TBTPA_HPD_BUF_EN | Default | d | OL | |
DP_TBTPA_ML_C_N<1> | Default | d | 0.335 | |
DP_TBTPA_ML_C_P<1> | Default | d | 0.333 | |
DP_TBTPA_ML_N<1> | Default | d | 0.697 | |
DP_TBTPA_ML_P<1> | Default | d | 0.707 | |
DP_TBTPB_AUXCH_N | Default | d | 0.734 | |
DP_TBTPB_DDC_CLK | Default | d | 0.633 | |
DP_TBTPB_DDC_DATA | Default | d | 0.626 | |
DP_TBTPB_HPD_BUF | Default | d | 0.640 | |
DP_TBTPB_ML_P<1> | Default | d | 0.710 | |
DP_TBTSNK0_AUXCH_C_N | Default | d | 0.584 | |
DP_TBTSNK0_AUXCH_C_P | Default | d | 0.586 | |
DP_TBTSNK0_EG_AUXCH_N | Default | d | 0.609 | |
DP_TBTSNK0_EG_AUXCH_P | Default | d | 0.609 | |
DP_TBTSNK0_HPD | Default | d | 0.543 | |
DP_TBTSNK0_HPD_EG | Default | d | 0.62 | |
DP_TBTSNK0_HPD_IG | Default | d | 0.63 | |
DP_TBTSNK0_ML_C_N<2> | Default | d | 0.416 | |
DP_TBTSNK0_ML_C_N<3> | Default | d | 0.419 | |
DP_TBTSNK0_ML_C_P<2> | Default | d | 0.416 | |
DP_TBTSNK0_ML_C_P<3> | Default | d | 0.420 | |
DP_TBTSNK1_AUXCH_C_N | Default | d | 0.582 | |
DP_TBTSNK1_AUXCH_C_P | Default | d | 0.579 | |
DP_TBTSNK1_EG_AUXCH_N | Default | d | 0.639 | |
DP_TBTSNK1_EG_AUXCH_P | Default | d | 0.612 | |
DP_TBTSNK1_HPD | Default | d | 0.540 | |
DP_TBTSNK1_HPD_EG | Default | d | 0.63 | |
DP_TBTSNK1_HPD_IG | Default | d | 0.63 | |
DP_TBTSNK1_ML_C_P<1> | Default | d | 0.412 | |
DP_TBTSRC_HPD | Default | d | 0.562 | |
EG_BKLT_EN | Default | d | 0.628 | |
EG_LCD_PWR_EN | Default | d | 0.62 | |
EG_RESET_L | Default | d | 0.63 | |
EG_RESET_L | Default | v | 3.30 | |
ENET_CLKREQ_L | Default | d | 0.556 | |
ENET_MEDIA_SENSE_RDIV | Default | d | 0.446 | |
ENET_RESET_L | Default | d | 0.435 | |
EXCARD_CLKREQ_L | Default | d | 0.565 | |
FAN_LT_PWM | Default | d | 1.148 | |
FAN_LT_TACH | Default | d | OL | |
FAN_RT_PWM | Default | d | 1.151 | |
FAN_RT_TACH | Default | d | OL | |
FBA0_CK_MID | Default | d | 0.570 | |
FBA1_CK_MID | Default | d | 0.574 | |
FBB0_CK_MID | Default | d | 0.570 | |
FBB1_CK_MID | Default | d | 0.571 | |
FBVDD_ALTVO | Default | d | 0.538 | |
FB_A0_MF | Default | d | 0.122 | |
FB_A0_RESET_L | Default | d | 0.408 | |
FB_A0_SEN | Default | d | 0.122 | |
FB_A0_VREFC | Default | d | 0.368 | |
FB_A0_VREFD | Default | d | 0.336 | |
FB_A0_ZQ | Default | d | 0.122 | |
FB_A1_MF | Default | d | 0.123 | |
FB_A1_RESET_L | Default | d | 0.408 | |
FB_A1_SEN | Default | d | 0.122 | |
FB_A1_VREFC | Default | d | 0.369 | |
FB_A1_VREFD | Default | d | 0.344 | |
FB_A1_ZQ | Default | d | 0.122 | |
FB_B0_DQ<0> | Default | d | 0.385 | |
FB_B0_MF | Default | d | 0.124 | |
FB_B0_SEN | Default | d | 0.123 | |
FB_B0_VREFC | Default | d | 0.368 | |
FB_B1_MF | Default | d | 0.125 | |
FB_B1_RESET_L | Default | d | 0.435 | |
FB_B1_SEN | Default | d | 0.123 | |
FB_B1_VREFC | Default | d | 0.371 | |
FB_B1_VREFD | Default | d | 0.354 | |
FB_B1_ZQ | Default | d | 0.123 | |
FB_CAL_PD_VDDQ | Default | d | 0.209 | |
FB_CAL_PU_GND | Default | d | 0.047 | |
FB_CAL_TERM_GND | Default | d | 0.067 | |
FB_CLAMP | Default | d | 0.526 | |
FB_CLAMP_TOGGLE_REQ_L | Default | d | 0.60 | |
FB_SW_LEG | Default | d | 0.255 | |
FB_VREF | Default | d | 0.697 | |
FDI_INT | Default | d | 0.363 | |
FW_PME_L | Default | d | 0.645 | |
FW_PWR_EN_PCH | Default | d | 0.605 | |
G3_POWERON_L | Default | d | 0.748 | |
GFXIMVP6_IMON | Default | d | 0.45 | |
GFXIMVP_BOOT1 | Default | d | 0.53 | |
GFXIMVP_BOOT1_R | Default | d | 0.556 | |
GFXIMVP_BOOT2 | Default | d | 0.558 | |
GFXIMVP_BOOT2_R | Default | d | 0.557 | |
GFXIMVP_COMP | Default | d | 0.52 | |
GFXIMVP_COMP_R | Default | d | OL | |
GFXIMVP_DPSLP_EN | Default | d | 0.53 | |
GFXIMVP_FB | Default | d | 0.30 | |
GFXIMVP_FB2 | Default | d | 0.52 | |
GFXIMVP_FB_GND_R | Default | d | OL | |
GFXIMVP_FB_SNS_R | Default | d | 0.399 | |
GFXIMVP_ISEN1 | Default | d | 0.52 | |
GFXIMVP_ISEN2 | Default | d | 0.52 | |
GFXIMVP_ISNS1_N | Default | d | 0.030 | |
GFXIMVP_ISNS1_P | Default | d | 0.030 | |
GFXIMVP_ISNS2_N | Default | d | 0.030 | |
GFXIMVP_ISNS2_P | Default | d | 0.030 | |
GFXIMVP_ISUMN | Default | d | 0.035 | |
GFXIMVP_ISUMN_R | Default | d | 0.49 | |
GFXIMVP_ISUMP | Default | d | 0.42 | |
GFXIMVP_ISUMP_C | Default | d | OL | |
GFXIMVP_LGATE1 | Default | d | 0.45 | |
GFXIMVP_LGATE2 | Default | d | 0.43 | |
GFXIMVP_NTC | Default | d | 0.52 | |
GFXIMVP_PHASE1 | Default | d | 0.03 | |
GFXIMVP_PHASE1 | Default | r | 35.000R | |
GFXIMVP_PHASE2 | Default | d | 0.03 | |
GFXIMVP_PHASE2 | Default | r | 35.000R | |
GFXIMVP_PSI_L | Default | d | 0.52 | |
GFXIMVP_PSI_R_L | Default | d | 0.550 | |
GFXIMVP_RBIAS | Default | d | 0.52 | |
GFXIMVP_UGATE1 | Default | d | 0.47 | |
GFXIMVP_UGATE2 | Default | d | 0.46 | |
GFXIMVP_VID<0> | Default | d | 0.52 | |
GFXIMVP_VID<1> | Default | d | 0.52 | |
GFXIMVP_VID<2> | Default | d | 0.52 | |
GFXIMVP_VID<3> | Default | d | 0.52 | |
GFXIMVP_VID<4> | Default | d | 0.52 | |
GFXIMVP_VID<5> | Default | d | 0.52 | |
GFXIMVP_VID<6> | Default | d | 0.52 | |
GFXIMVP_VR_TT_L | Default | d | 0.48 | |
GFXIMVP_VSSP1 | Default | d | 0.00 | |
GFXIMVP_VSSP2 | Default | d | 0.00 | |
GFXIMVP_VW | Default | d | 0.52 | |
GND | Default | d | - | |
GND_GFXIMVP_AGND | Default | d | 0.00 | |
GPUFB_AGND | Default | d | 0.007 | |
GPUFB_BOOT_RC | Default | d | 0.582 | |
GPUFB_CS_N | Default | d | 0.163 | |
GPUFB_CS_P | Default | d | 0.163 | |
GPUFB_DRVH | Default | d | 0.602 | |
GPUFB_DRVH_R | Default | d | 0.602 | |
GPUFB_DRVL | Default | d | 0.440 | |
GPUFB_FSEL | Default | d | 0.536 | |
GPUFB_GPU_OCSET_R | Default | d | 0.165 | |
GPUFB_GPU_VO_R | Default | d | 0.166 | |
GPUFB_LL | Default | d | 0.163 | |
GPUFB_LL | Default | r | 177.800R | |
GPUFB_OCSET | Default | d | 0.532 | |
GPUFB_PGOOD | Default | d | 0.52 | |
GPUFB_RTN_DIV | Default | d | 0.518 | |
GPUFB_SENSE_DIV | Default | d | 0.516 | |
GPUFB_SET0 | Default | d | 0.537 | |
GPUFB_SET1 | Default | d | 0.534 | |
GPUFB_SET_R | Default | d | 0.533 | |
GPUFB_SREF | Default | d | 0.534 | |
GPUFB_VBST | Default | d | 0.580 | |
GPUFB_VO | Default | d | 0.531 | |
GPUTHMSNS_ALERT_L | Default | d | 0.760 | |
GPUTHMSNS_D_N | Default | d | 0.763 | |
GPUTHMSNS_D_P | Default | d | 0.762 | |
GPUTHMSNS_THM_L | Default | d | 0.764 | |
GPUVCORE_EN | Default | d | 0.52 | |
GPUVCORE_EN | Default | v | 3.30 | |
GPUVCORE_INV | Default | d | OL | |
GPUVCORE_IOUT | Default | d | OL | |
GPUVCORE_PGOOD | Default | d | 0.51 | |
GPUVCORE_SENSE_N | Default | d | 0.00 | |
GPUVCORE_SENSE_P | Default | d | 0.03 | |
GPUVSENSE_IN | Default | d | 0.031 | |
GPU_ALT_VREF | Default | d | 0.730 | |
GPU_BUFRSTN | Default | d | 0.716 | |
GPU_FBA_DEBUG0 | Default | d | 0.235 | |
GPU_FBA_DEBUG1 | Default | d | 0.226 | |
GPU_FBB_DEBUG1 | Default | d | 0.228 | |
GPU_FBGND_SENSE | Default | d | 0.004 | |
GPU_FBVDDQ_SENSE | Default | d | 0.167 | |
GPU_JTAG_TMS | Default | d | 0.734 | |
GPU_MLS_STRAP0 | Default | d | 0.718 | |
GPU_MLS_STRAP1 | Default | d | 0.717 | |
GPU_MLS_STRAP2 | Default | d | 0.716 | |
GPU_MLS_STRAP3 | Default | d | 0.716 | |
GPU_MLS_STRAP4 | Default | d | 0.718 | |
GPU_OSC_27M_SSIN | Default | d | 0.733 | |
GPU_OSC_27M_XTALIN | Default | d | 0.832 | |
GPU_OSC_27M_XTALOUT | Default | d | 0.817 | |
GPU_OSC_27M_XTAL_BUFFOUT_R | Default | d | 0.735 | |
GPU_PEX_TERMP | Default | d | 0.829 | |
GPU_RESET_R_L | Default | d | 0.633 | |
GPU_ROM_CS_L | Default | d | 0.733 | |
GPU_ROM_CS_L_R | Default | d | OL | |
GPU_ROM_SCLK_R | Default | d | OL | |
GPU_ROM_SI | Default | d | 0.733 | |
GPU_ROM_SI_R | Default | d | OL | |
GPU_ROM_SO | Default | d | 0.724 | |
GPU_ROM_SO_R | Default | d | OL | |
GPU_ROM_WP_L | Default | d | OL | |
GPU_SMB_CLK | Default | d | 0.720 | |
GPU_SMB_DAT | Default | d | 0.722 | |
GPU_SSC_SMB_CLK | Default | d | 0.709 | |
GPU_SSC_SMB_DAT | Default | d | 0.707 | |
GPU_TDIODE_N | Default | d | 0.502 | |
GPU_TDIODE_P | Default | d | 0.779 | |
GPU_TESTMODE | Default | d | 0.831 | |
GYRO_CS | Default | d | OL | |
HDA_BIT_CLK | Default | d | 0.483 | |
HDA_BIT_CLK_R | Default | d | 0.449 | |
HDA_RST_L | Default | d | 0.481 | |
HDA_RST_R_L | Default | d | 0.449 | |
HDA_SDIN0 | Default | d | 0.446 | |
HDA_SDOUT | Default | d | 0.482 | |
HDA_SDOUT_R | Default | d | 0.448 | |
HDA_SYNC | Default | d | 0.487 | |
HDA_SYNC_R | Default | d | 0.449 | |
HDMI_EG_CLK_C_N | Default | d | 0.412 | |
HDMI_EG_CLK_C_P | Default | d | 0.410 | |
HDMI_EG_DATA_C_N<0> | Default | d | 0.410 | |
HDMI_EG_DATA_C_N<1> | Default | d | 0.419 | |
HDMI_EG_DATA_C_N<2> | Default | d | 0.421 | |
HDMI_EG_DATA_C_P<0> | Default | d | 0.414 | |
HDMI_EG_DATA_C_P<1> | Default | d | 0.430 | |
HDMI_EG_DATA_C_P<2> | Default | d | 0.421 | |
HDMI_EG_DDC_CLK | Default | d | 1.057 | |
HDMI_EG_DDC_CLK_Q | Default | d | 0.792 | |
HDMI_EG_DDC_DATA | Default | d | 1.056 | |
HDMI_EG_DDC_DATA_Q | Default | d | 0.792 | |
HDMI_EG_HPD | Default | d | 0.63 | |
HDMI_HPD_BUF | Default | d | 0.60 | |
HDMI_HPD_L | Default | d | 0.689 | |
HS_COMPUTING_IOUT | Default | d | 0.712 | |
HS_GPU_IOUT | Default | d | 0.718 | |
HS_MIC_BIAS | Default | d | 0.476 | |
HS_MIC_HI | Default | d | 0.479 | |
HS_OTHER_IOUT | Default | d | 0.717 | |
HS_RX_BP | Default | d | 0.587 | |
HS_SW_DET | Default | d | 0.572 | |
I2C_DPMUX_A_SCL | Default | d | 0.60 | |
I2C_DPMUX_A_SDA | Default | d | 0.607 | |
I2C_DPMUX_UC_SCL | Default | d | 0.545 | |
I2C_DPMUX_UC_SDA | Default | d | 0.548 | |
I2C_SMC_GYRO_SCL_R | Default | d | OL | |
I2C_SMC_GYRO_SDA_R | Default | d | OL | |
I2C_SMC_SMS_SCL_R | Default | d | OL | |
I2C_SMC_SMS_SDA_R | Default | d | OL | |
IFPD_RSET | Default | d | 0.795 | |
IFPEF_RSET | Default | d | 0.795 | |
ISENSE_CPUVCCIO_IOUT | Default | d | OL | |
ISENSE_P1V5MEM_IOUT | Default | d | 0.655 | |
ISENSE_SA_IOUT | Default | d | 0.662 | |
ISNS_1V5_MEM_N | Default | d | 0.224 | |
ISNS_1V5_MEM_P | Default | d | 0.224 | |
ISNS_1V5_MEM_R_N | Default | d | 0.800 | |
ISNS_1V5_MEM_R_P | Default | d | 0.800 | |
ISNS_AIRPORT_IOUT | Default | d | OL | |
ISNS_AIRPORT_R_N | Default | d | OL | |
ISNS_AIRPORT_R_P | Default | d | OL | |
ISNS_CPU_DDR_IOUT | Default | d | OL | |
ISNS_CPU_DDR_R_N | Default | d | OL | |
ISNS_CPU_DDR_R_P | Default | d | OL | |
ISNS_HS_COMPUTING_N | Default | d | 0.445 | |
ISNS_HS_COMPUTING_P | Default | d | 0.445 | |
ISNS_HS_GPU_N | Default | d | 0.445 | |
ISNS_HS_GPU_P | Default | d | 0.445 | |
ISNS_HS_OTHER_N | Default | d | 0.445 | |
ISNS_HS_OTHER_P | Default | d | 0.445 | |
ISNS_PP1V0_S0GPU_R_N | Default | d | OL | |
ISNS_PP1V0_S0GPU_R_P | Default | d | OL | |
ISNS_PP1V5_S0GPU_R_N | Default | d | 0.792 | |
ISNS_PP1V5_S0GPU_R_P | Default | d | 0.789 | |
ISNS_SSD_IOUT | Default | d | 0.656 | |
ISNS_SSD_N | Default | d | 0.307 | |
ISNS_SSD_P | Default | d | 0.307 | |
ISNS_SSD_R_N | Default | d | 0.793 | |
ISNS_SSD_R_P | Default | d | 0.793 | |
ISNS_TBT_IOUT | Default | d | 0.649 | |
ISNS_TBT_N | Default | d | 0.046 | |
ISNS_TBT_P | Default | d | 0.047 | |
ISNS_TBT_R_N | Default | d | 0.747 | |
ISNS_TBT_R_P | Default | d | 0.747 | |
ISOLATE_CPU_MEM_L | Default | d | 0.597 | |
ITPCPU_CLK100M_N | Default | d | OL | |
ITPCPU_CLK100M_P | Default | d | OL | |
ITPXDP_CLK100M_N | Default | d | 0.399 | |
ITPXDP_CLK100M_P | Default | d | 0.391 | |
JTAG_DPMUXUC_TRST_L | Default | d | 0.567 | |
JTAG_GMUX_TMS | Default | d | 0.579 | |
JTAG_ISP_TCK | Default | d | 0.641 | |
JTAG_ISP_TDI | Default | d | 0.606 | |
JTAG_ISP_TDO | Default | d | 0.617 | |
JTAG_ISP_TMS | Default | d | 0.610 | |
JTAG_TBT_TCK | Default | d | 0.554 | |
JTAG_TBT_TDI | Default | d | 0.642 | |
JTAG_TBT_TDO | Default | d | 0.650 | |
JTAG_TBT_TMS | Default | d | 0.642 | |
KBDLED_ANODE1 | Default | d | 0.605 | |
KBDLED_ANODE2 | Default | d | 0.607 | |
KBDLED_CAP1 | Default | d | 0.591 | |
KBDLED_CAP2 | Default | d | 0.592 | |
KBDLED_SW1 | Default | d | 0.390 | |
KBDLED_SW2 | Default | d | 0.390 | |
LCDBKLT_DISABLE | Default | d | 0.433 | |
LCDBKLT_EN_DIV | Default | d | OL | |
LCDBKLT_EN_L | Default | d | 0.670 | |
LCDBKLT_IOUT | Default | d | OL | |
LCD_BKLT_EN | Default | d | 0.63 | |
LCD_BKLT_EN | Default | v | 3.30 | |
LCD_BKLT_PWM | Default | d | 0.55 | |
LCD_DRV_IOUT | Default | d | OL | |
LCD_FSS | Default | d | 0.64 | |
LCD_HPD | Default | d | 0.616 | |
LCD_HPD_CONN | Default | d | 0.61 | |
LCD_MUX_EN | Default | d | 0.640 | |
LCD_MUX_SEL | Default | d | 0.63 | |
LCD_PWR_EN | Default | d | 0.62 | |
LCD_PWR_EN | Default | v | 3.30 | |
LED_RETURN_1 | Default | d | 0.63 | |
LED_RETURN_2 | Default | d | 0.63 | |
LED_RETURN_3 | Default | d | 0.63 | |
LED_RETURN_4 | Default | d | 0.63 | |
LED_RETURN_5 | Default | d | 0.63 | |
LED_RETURN_6 | Default | d | 0.63 | |
LPCPLUS_GPIO | Default | d | 0.600 | |
LPCPLUS_RESET_L | Default | d | 0.565 | |
LPC_AD<0> | Default | d | 0.54 | |
LPC_AD<1> | Default | d | 0.554 | |
LPC_AD<2> | Default | d | 0.554 | |
LPC_AD<3> | Default | d | 0.54 | |
LPC_AD_R<1> | Default | d | 0.539 | |
LPC_AD_R<2> | Default | d | 0.539 | |
LPC_AD_R<3> | Default | d | 0.540 | |
LPC_CLK33M_DPMUX_UC | Default | d | 0.601 | |
LPC_CLK33M_DPMUX_UC_R | Default | d | 0.602 | |
LPC_CLK33M_LPCPLUS | Default | d | 0.676 | |
LPC_CLK33M_LPCPLUS_R | Default | d | 0.653 | |
LPC_CLK33M_SMC | Default | d | 0.660 | |
LPC_CLK33M_SMC_R | Default | d | 0.644 | |
LPC_FRAME_L | Default | d | 0.54 | |
LPC_FRAME_R_L | Default | d | 0.537 | |
LPC_PWRDWN_L | Default | d | 0.593 | |
LPC_SERIRQ | Default | d | 0.622 | |
LSUBIN_N | Default | d | 0.580 | |
LSUBIN_P | Default | d | 0.580 | |
LVDS_BKL_PWM_RC | Default | d | 0.556 | |
LVDS_IG_BKL_ON | Default | d | 0.564 | |
LVDS_IG_PANEL_PWR | Default | d | 0.563 | |
MCP6514_NEG | Default | d | 0.672 | |
MCP6514_OUT | Default | d | 0.635 | |
MCP6514_POS | Default | d | 0.675 | |
MEMRESET_ISOL_LS5V_L | Default | d | 0.699 | |
MEMVTT_EN | Default | d | 0.415 | |
MEMVTT_EN_L | Default | d | 0.430 | |
MEM_A_A<11> | Default | d | 0.200 | |
MEM_A_A<15> | Default | d | 0.196 | |
MEM_A_A<1> | Default | d | 0.196 | |
MEM_A_BA<1> | Default | d | 0.212 | |
MEM_A_BA<2> | Default | d | 0.200 | |
MEM_A_CKE<0> | Default | d | 0.202 | |
MEM_A_CLK0_TERM_R | Default | d | 0.316 | |
MEM_A_CLK_N<0> | Default | d | 0.311 | |
MEM_A_CLK_P<0> | Default | d | 0.322 | |
MEM_A_RAS_L | Default | d | 0.196 | |
MEM_A_ZQ<15> | Default | d | 0.246 | |
MEM_B_A<12> | Default | d | 0.196 | |
MEM_B_A<14> | Default | d | 0.198 | |
MEM_B_A<5> | Default | d | 0.199 | |
MEM_B_A<8> | Default | d | 0.196 | |
MEM_B_BA<0> | Default | d | 0.198 | |
MEM_B_CLK0_TERM_R | Default | d | 0.309 | |
MEM_B_CLK1_TERM_R | Default | d | 0.319 | |
MEM_B_CLK_N<0> | Default | d | 0.309 | |
MEM_B_CLK_N<1> | Default | d | 0.311 | |
MEM_B_CLK_P<0> | Default | d | 0.309 | |
MEM_B_CLK_P<1> | Default | d | 0.310 | |
MEM_B_DQS_N<0> | Default | d | 0.330 | |
MEM_B_DQS_P<0> | Default | d | 0.327 | |
MEM_B_ODT<1> | Default | d | 0.196 | |
MEM_B_WE_L | Default | d | 0.197 | |
MEM_RESET_L | Default | d | 0.451 | |
MEM_VDD_SEL_1V5_L | Default | d | 0.592 | |
MLB_RAMCFG0 | Default | d | 0.641 | |
MLB_RAMCFG1 | Default | d | 0.644 | |
MLB_RAMCFG2 | Default | d | 0.640 | |
MLB_RAMCFG3 | Default | d | 0.525 | |
MULTI_STRAP_REF | Default | d | 0.834 | |
ODD_PWR_EN_L | Default | d | 0.559 | |
P1V05_GPU_AGND | Default | d | 0.004 | |
P1V05_GPU_BOOT_RC | Default | d | 0.592 | |
P1V05_GPU_CS_N | Default | d | 0.133 | |
P1V05_GPU_CS_P | Default | d | 0.133 | |
P1V05_GPU_DRVH | Default | d | 0.582 | |
P1V05_GPU_DRVH_R | Default | d | 0.579 | |
P1V05_GPU_DRVL | Default | d | 0.445 | |
P1V05_GPU_FB | Default | d | 0.512 | |
P1V05_GPU_FSEL | Default | d | 0.537 | |
P1V05_GPU_LL | Default | d | 0.137 | |
P1V05_GPU_LL_FET | Default | d | 0.133 | |
P1V05_GPU_OCSET | Default | d | 0.526 | |
P1V05_GPU_PEX_IOVDD_SNS_N | Default | d | 0.002 | |
P1V05_GPU_PEX_IOVDD_SNS_P | Default | d | 0.140 | |
P1V05_GPU_RTN | Default | d | 0.513 | |
P1V05_GPU_SREF | Default | d | 0.531 | |
P1V05_GPU_VBST | Default | d | 0.589 | |
P1V05_GPU_VO | Default | d | 0.525 | |
P1V05_GPU_VO_R | Default | d | 0.139 | |
P1V05_S0GPU_EN | Default | d | 0.52 | |
P1V05_S0GPU_EN | Default | v | 3.30 | |
P1V05_S0GPU_PGOOD | Default | d | 0.52 | |
P1V05_S0GPU_REG_R | Default | d | 0.133 | |
P1V05_VID_VMON | Default | d | OL | |
P1V35GPUFB_EN | Default | d | 0.52 | |
P1V5CPU_EN | Default | d | 0.434 | |
P1V5CPU_EN_L | Default | d | 0.414 | |
P1V5S0_EN | Default | d | 0.761 | |
P1V5S0_LDO_FB | Default | d | 0.619 | |
P1V5S0_LDO_PGOOD | Default | d | 0.714 | |
P1V5S0_LDO_SS | Default | d | 0.648 | |
P1V5S0_PGOOD | Default | d | 0.562 | |
P1V5S3RS0FET_GATE | Default | d | 0.676 | |
P1V5S3RS0FET_GATE_R | Default | d | 0.676 | |
P1V5_DIV_VMON | Default | d | OL | |
P1V5_S0GPU_IOUT | Default | d | 0.649 | |
P1V5_S0_DIV | Default | d | OL | |
P1V8GPU_EN | Default | d | 0.63 | |
P1V8GPU_EN | Default | v | 3.30 | |
P1V8S0_EN | Default | d | 0.755 | |
P1V8S0_FB | Default | d | 0.773 | |
P1V8S0_PGOOD | Default | d | 0.562 | |
P1V8S0_SW | Default | d | 0.117 | |
P1V8S0_SW | Default | r | 308.500R | |
P3V3GPU_EN | Default | d | 0.63 | |
P3V3GPU_EN | Default | v | 3.30 | |
P3V3GPU_EN_L | Default | d | 0.578 | |
P3V3GPU_MISC_EN_L | Default | d | 0.579 | |
P3V3GPU_MISC_SS | Default | d | 1.584 | |
P3V3GPU_SS | Default | d | 1.576 | |
P3V3S0_EN_L | Default | d | 0.437 | |
P3V3S0_SS | Default | d | OL | |
P3V3S3_EN | Default | d | 0.519 | |
P3V3S3_EN_L | Default | d | 0.438 | |
P3V3S3_S4 | Default | d | OL | |
P3V3S3_SS | Default | d | OL | |
P3V3S4_EN_L | Default | d | 0.436 | |
P3V3S5_COMP2 | Default | d | 0.739 | |
P3V3S5_COMP2_R | Default | d | OL | |
P3V3S5_CSN2 | Default | d | 0.144 | |
P3V3S5_CSP2 | Default | d | 1.117 | |
P3V3S5_CSP2_R | Default | d | 0.144 | |
P3V3S5_DRVH | Default | d | 0.706 | |
P3V3S5_DRVL | Default | d | 0.546 | |
P3V3S5_EN | Default | d | 0.534 | |
P3V3S5_LL | Default | d | 0.142 | |
P3V3S5_RF | Default | d | 0.585 | |
P3V3S5_SNUBR | Default | d | OL | |
P3V3S5_TG | Default | d | 0.706 | |
P3V3S5_VBST | Default | d | 0.565 | |
P3V3S5_VFB2 | Default | d | 0.580 | |
P3V3S5_VFB2_R | Default | d | 0.144 | |
P3V3SUS_EN_L | Default | d | 0.440 | |
P3V3SUS_SS | Default | d | OL | |
P3V3WLAN_SS | Default | d | OL | |
P3V3WLAN_VMON | Default | d | 0.470 | |
P3V42G3H_BOOST | Default | d | 0.625 | |
P3V42G3H_FB | Default | d | 0.717 | |
P3V42G3H_SW | Default | d | 0.330 | |
P3V42G3H_SW | Default | v | 3.400 | |
P5V0S0_EN_L | Default | d | 0.585 | |
P5V0S0_SS | Default | d | OL | |
P5V1_BIAS | Default | d | 0.332 | |
P5V1_FB | Default | d | 0.719 | |
P5V1_SW | Default | d | 0.332 | |
P5V1_VIN | Default | d | 0.601 | |
P5V3V3_S4_EN | Default | d | 0.451 | |
P5VCUMULUS_SS | Default | d | OL | |
P5VP3V3_SKIPSEL | Default | d | 0.483 | |
P5VP3V3_VREF2 | Default | d | 0.483 | |
P5VP3V3_VREG3 | Default | d | 0.567 | |
P5VS3_EN | Default | d | 0.520 | |
P5VS3_EN_L | Default | d | 0.440 | |
P5VS3_SS | Default | d | OL | |
P5VS4_COMP1 | Default | d | 0.739 | |
P5VS4_COMP1_R | Default | d | OL | |
P5VS4_CSN1 | Default | d | 0.421 | |
P5VS4_CSP1 | Default | d | 1.393 | |
P5VS4_CSP1_R | Default | d | 0.422 | |
P5VS4_DRVH | Default | d | 0.971 | |
P5VS4_DRVL | Default | d | 0.546 | |
P5VS4_EN | Default | d | 0.451 | |
P5VS4_LL | Default | d | 0.422 | |
P5VS4_PGOOD | Default | d | 0.503 | |
P5VS4_SNUBR | Default | d | OL | |
P5VS4_TG | Default | d | 0.973 | |
P5VS4_VBST | Default | d | 0.632 | |
P5VS4_VFB1 | Default | d | 0.579 | |
P5VS4_VFB1_R | Default | d | 0.422 | |
P5VS4_VSW | Default | d | 0.425 | |
P5VSUS_EN_L | Default | d | 0.581 | |
P5VSUS_SS | Default | d | OL | |
P5V_DIV_VMON | Default | d | OL | |
PBUSVSENS_EN_L | Default | d | 0.483 | |
PBUSVSENS_EN_L_DIV | Default | d | OL | |
PBUS_S0_VSENSE | Default | d | OL | |
PCA9557D_RESET_L | Default | d | 0.530 | |
PCHVCCIOS0_AGND | Default | d | 0.001 | |
PCHVCCIOS0_BOOT_RC | Default | d | 0.551 | |
PCHVCCIOS0_CS_N | Default | d | 0.040 | |
PCHVCCIOS0_CS_P | Default | d | 0.040 | |
PCHVCCIOS0_DRVH | Default | d | 0.506 | |
PCHVCCIOS0_DRVL | Default | d | 0.435 | |
PCHVCCIOS0_EN | Default | d | 0.528 | |
PCHVCCIOS0_FB | Default | d | 0.508 | |
PCHVCCIOS0_FSEL | Default | d | 0.001 | |
PCHVCCIOS0_LL | Default | d | 0.040 | |
PCHVCCIOS0_OCSET | Default | d | 0.518 | |
PCHVCCIOS0_PGOOD | Default | d | 0.496 | |
PCHVCCIOS0_RTN | Default | d | 0.508 | |
PCHVCCIOS0_SREF | Default | d | 0.526 | |
PCHVCCIOS0_VBST | Default | d | 0.550 | |
PCHVCCIOS0_VO | Default | d | 0.514 | |
PCH_A20GATE | Default | d | 0.702 | |
PCH_CLK100M_SATA_N | Default | d | 0.776 | |
PCH_CLK100M_SATA_P | Default | d | OL | |
PCH_CLK14P3M_REFCLK | Default | d | 0.514 | |
PCH_CLK33M_PCIIN | Default | d | 0.679 | |
PCH_CLK33M_PCIOUT | Default | d | 0.657 | |
PCH_CLK96M_DOT_N | Default | d | 0.778 | |
PCH_CLK96M_DOT_P | Default | d | 0.777 | |
PCH_CLKIN_GNDN1 | Default | d | 0.778 | |
PCH_CLKIN_GNDP1 | Default | d | 0.778 | |
PCH_CORE_IOUT | Default | d | OL | |
PCH_DAC_IREF | Default | d | 0.699 | |
PCH_DF_TVS | Default | d | 0.413 | |
PCH_DMI2RBIAS | Default | d | 0.668 | |
PCH_DMI_COMP | Default | d | 0.091 | |
PCH_DSWVRMEN | Default | d | 0.780 | |
PCH_INIT3V3_L | Default | d | 0.570 | |
PCH_INTRUDER_L | Default | d | 0.781 | |
PCH_INTVRMEN_L | Default | d | 0.781 | |
PCH_LVDS_IBG | Default | d | 0.770 | |
PCH_PECI | Default | d | 0.661 | |
PCH_PROCPWRGD | Default | d | 0.472 | |
PCH_RCIN_L | Default | d | 0.777 | |
PCH_RI_L | Default | d | 0.654 | |
PCH_SATA3COMP | Default | d | 0.091 | |
PCH_SATA3RBIAS | Default | d | 0.670 | |
PCH_SATAICOMP | Default | d | 0.077 | |
PCH_SATALED_L | Default | d | 0.651 | |
PCH_SPKR | Default | d | 0.701 | |
PCH_SRTCRST_L | Default | d | 0.778 | |
PCH_STRP_TOPBLK_SWP_L | Default | d | 0.555 | |
PCH_SUSACK_L | Default | d | 0.596 | |
PCH_SUSWARN_L | Default | d | 0.596 | |
PCH_USB_RBIAS | Default | d | 0.024 | |
PCH_VCCIOSENSE_N | Default | d | 0.002 | |
PCH_VCCIOSENSE_P | Default | d | 0.042 | |
PCH_XCLK_RCOMP | Default | d | 0.133 | |
PCIE_AP_D2R_PI_N | Default | d | 0.369 | |
PCIE_AP_D2R_PI_P | Default | d | 0.370 | |
PCIE_AP_R2D_N | Default | d | OL | |
PCIE_AP_R2D_P | Default | d | OL | |
PCIE_CLK100M_AP_CONN_N | Default | d | 0.388 | |
PCIE_CLK100M_AP_CONN_P | Default | d | 0.389 | |
PCIE_CLK100M_AP_N | Default | d | 0.388 | |
PCIE_CLK100M_AP_P | Default | d | 0.389 | |
PCIE_CLK100M_ENET_N | Default | d | 0.390 | |
PCIE_CLK100M_ENET_P | Default | d | 0.388 | |
PCIE_CLK100M_PCH_N | Default | d | 0.774 | |
PCIE_CLK100M_PCH_P | Default | d | 0.776 | |
PCIE_CLK100M_SSD_N | Default | d | 0.389 | |
PCIE_CLK100M_SSD_P | Default | d | 0.386 | |
PCIE_CLK100M_TBT_N | Default | d | 0.391 | |
PCIE_CLK100M_TBT_P | Default | d | 0.390 | |
PCIE_ENET_D2R_N | Default | d | 0.372 | |
PCIE_ENET_D2R_P | Default | d | 0.370 | |
PCIE_ENET_R2D_C_N | Default | d | 0.355 | |
PCIE_ENET_R2D_C_P | Default | d | 0.354 | |
PCIE_SSD_D2R_C_N<1> | Default | d | 0.325 | |
PCIE_SSD_D2R_C_P<1> | Default | d | 0.322 | |
PCIE_SSD_D2R_MUX_OUT_N | Default | d | 0.324 | |
PCIE_SSD_D2R_MUX_OUT_P | Default | d | 0.321 | |
PCIE_SSD_D2R_N<0> | Default | d | 0.323 | |
PCIE_SSD_D2R_N<1> | Default | d | 0.324 | |
PCIE_SSD_D2R_P<0> | Default | d | 0.320 | |
PCIE_SSD_R2D_C_N<0> | Default | d | 0.319 | |
PCIE_SSD_R2D_C_N<1> | Default | d | 0.318 | |
PCIE_SSD_R2D_C_P<0> | Default | d | 0.322 | |
PCIE_SSD_R2D_C_P<1> | Default | d | 0.322 | |
PCIE_SSD_R2D_N<1> | Default | d | OL | |
PCIE_SSD_R2D_P<1> | Default | d | OL | |
PCIE_TBT_D2R_N<1> | Default | d | 0.325 | |
PCIE_TBT_D2R_N<2> | Default | d | 0.327 | |
PCIE_TBT_D2R_P<2> | Default | d | 0.324 | |
PCIE_TBT_R2D_C_N<0> | Default | d | 0.318 | |
PCIE_TBT_R2D_C_N<1> | Default | d | 0.319 | |
PCIE_TBT_R2D_C_P<1> | Default | d | 0.320 | |
PCIE_WAKE_L | Default | d | 0.630 | |
PCI_INTA_L | Default | d | 0.576 | |
PCI_INTB_L | Default | d | 0.582 | |
PCI_INTC_L | Default | d | 0.579 | |
PCI_INTD_L | Default | d | 0.580 | |
PDCINVSENS_EN_L_DIV | Default | d | OL | |
PEGCLKRQA_L_GPIO47 | Default | d | 0.620 | |
PEGCLKRQB_L_GPIO56 | Default | d | 0.552 | |
PEG_CLK100M_N | Default | d | 0.387 | |
PEG_CLK100M_P | Default | d | 0.387 | |
PEG_CLKREQ_L | Default | d | 0.52 | |
PEG_D2R_C_P<5> | Default | d | 0.350 | |
PEG_D2R_N<3> | Default | d | 0.320 | |
PEG_D2R_P<2> | Default | d | 0.319 | |
PEG_D2R_P<3> | Default | d | 0.317 | |
PEG_R2D_C_N<1> | Default | d | 0.316 | |
PEG_R2D_C_N<2> | Default | d | 0.312 | |
PEG_R2D_C_N<3> | Default | d | 0.314 | |
PEG_R2D_C_N<4> | Default | d | 0.315 | |
PEG_R2D_C_N<5> | Default | d | 0.316 | |
PEG_R2D_C_N<6> | Default | d | 0.315 | |
PEG_R2D_C_N<7> | Default | d | 0.316 | |
PEG_R2D_N<4> | Default | d | 0.382 | |
PEG_R2D_P<0> | Default | d | 0.378 | |
PEG_R2D_P<1> | Default | d | 0.380 | |
PEG_R2D_P<2> | Default | d | 0.381 | |
PEG_R2D_P<6> | Default | d | 0.381 | |
PEX_CLKREQ_L | Default | d | 0.62 | |
PEX_CLKREQ_L_R | Default | d | 0.633 | |
PEX_TSTCLK_O_N | Default | d | 0.451 | |
PEX_TSTCLK_O_P | Default | d | 0.453 | |
PICKB_L | Default | d | 0.686 | |
PLLFILT_GYRO | Default | d | OL | |
PLLFILT_GYRO1 | Default | d | OL | |
PLT_RESET_L | Default | d | 0.530 | |
PLT_RESET_LS1V1_L | Default | d | 0.132 | |
PLT_RST_BUF_L | Default | d | 0.435 | |
PLT_RST_CPU_BUF_L | Default | d | 0.091 | |
PM_BATLOW_L | Default | d | 0.573 | |
PM_CLK32K_SUSCLK_R | Default | d | 0.602 | |
PM_CLKRUN_L | Default | d | 0.636 | |
PM_DSW_PWRGD | Default | d | 0.738 | |
PM_MEM_PWRGD | Default | d | 0.306 | |
PM_MEM_PWRGD_L | Default | d | OL | |
PM_MEM_PWRGD_R | Default | d | 0.437 | |
PM_PCH_PWROK | Default | d | 0.656 | |
PM_PCH_SYS_PWROK | Default | d | 0.740 | |
PM_PWRBTN_L | Default | d | 0.573 | |
PM_PWRBTN_L | Default | v | 3.400 | |
PM_RSMRST_L | Default | d | 0.632 | |
PM_S0_PGOOD | Default | d | 0.671 | |
PM_SLP_S3_L | Default | d | 0.510 | |
PM_SLP_S3_R_L | Default | d | 0.459 | |
PM_SLP_S4_L | Default | d | 0.518 | |
PM_SLP_S5_L | Default | d | 0.588 | |
PM_SLP_SUS_L | Default | d | 0.597 | |
PM_SUS_EN | Default | d | 0.752 | |
PM_SYNC | Default | d | 0.470 | |
PM_SYSRST_L | Default | d | 0.638 | |
PM_THRMTRIP_B_L | Default | d | OL | |
PM_THRMTRIP_L | Default | d | 0.383 | |
PM_THRMTRIP_L_R | Default | d | 0.414 | |
PM_WLAN_EN_L | Default | d | 0.936 | |
PP0V75_S0_DDRVTT | Default | d | 0.165 | |
PP0V75_S3_MEM_VREFCA_A | Default | d | 0.424 | |
PP0V75_S3_MEM_VREFCA_B | Default | d | 0.423 | |
PP0V75_S3_MEM_VREFDQ_A | Default | d | 0.412 | |
PP0V75_S3_MEM_VREFDQ_B | Default | d | 0.407 | |
PP15V_TBT | Default | d | 0.566 | |
PP18V5_DCIN_CONN_R | Default | d | OL | |
PP18V5_DCIN_FUSE | Default | d | OL | |
PP18V5_DCIN_FUSE | Default | v | 19.000 | |
PP1V05_GPU_FB_DLL_AVDD | Default | d | 0.140 | |
PP1V05_GPU_FB_PLL_AVDD | Default | d | 0.139 | |
PP1V05_GPU_IFPAB_PLLVDD | Default | d | 0.267 | |
PP1V05_GPU_IFPCD_IOVDD | Default | d | 0.139 | |
PP1V05_GPU_IFPEF_IOVDD | Default | d | 0.138 | |
PP1V05_GPU_PEX_PLLVDD | Default | d | 0.139 | |
PP1V05_GPU_PLLVDD | Default | d | 0.138 | |
PP1V05_GPU_SP_PLLVDD | Default | d | 0.138 | |
PP1V05_PCHVCCIO_S0 | Default | d | 0.046 | |
PP1V05_S0 | Default | d | 0.011 | |
PP1V05_S0_CPU_VCCPQE | Default | d | 0.012 | |
PP1V05_S0_P1V05TBTFET | Default | d | 0.046 | |
PP1V05_S0_PCH_VCCADPLLA_F | Default | d | 0.041 | |
PP1V05_S0_PCH_VCCADPLLA_R | Default | d | 0.041 | |
PP1V05_S0_PCH_VCCADPLLB_F | Default | d | 0.044 | |
PP1V05_S0_PCH_VCCADPLLB_R | Default | d | 0.044 | |
PP1V05_S0_PCH_VCCCLKDMI_F | Default | d | 0.040 | |
PP1V05_S0_PCH_VCCCLKDMI_R | Default | d | 0.046 | |
PP1V05_SUS | Default | d | 0.494 | |
PP1V05_TBTCIO | Default | d | 0.192 | |
PP1V05_TBTLC | Default | d | 0.154 | |
PP1V0_S0GPU_ISNS | Default | d | 0.138 | |
PP1V2_S5_SMC_VDDC | Default | d | 0.516 | |
PP1V5R1V35_GPU_REG_R | Default | d | 0.163 | |
PP1V5R1V35_GPU_REG_R | Default | r | 177.800R | |
PP1V5R1V35_MEM | Default | d | 0.224 | |
PP1V5R1V35_S0GPU | Default | d | 0.163 | |
PP1V5R1V35_S3 | Default | d | 0.224 | |
PP1V5_S0 | Default | d | 0.376 | |
PP1V5_S0_AUDIO_DIG | Default | d | 0.377 | |
PP1V5_S0_LDO | Default | d | 0.565 | |
PP1V5_S0_RIO | Default | d | 0.565 | |
PP1V5_S3RS0_CPUDDR | Default | d | 0.102 | |
PP1V5_S3RS0_FET | Default | d | 0.106 | |
PP1V5_S3_CPU_VCCDQ | Default | d | 0.106 | |
PP1V8_GPU_IFPA_IOVDD | Default | d | 0.550 | |
PP1V8_S0 | Default | d | 0.117 | |
PP1V8_S0 | Default | r | 308.500R | |
PP1V8_S0_CPU_VCCPLL_R | Default | d | 0.121 | |
PP1V8_S0_P1V5_LDO | Default | d | 0.118 | |
PP3V3RHV_SW_TBTAPWR | Default | d | 0.562 | |
PP3V3RHV_SW_TBTBPWR | Default | d | 0.576 | |
PP3V3_GPU_IFPB_IOVDD | Default | d | 0.560 | |
PP3V3_GPU_IFPX_PLLVDD | Default | d | 0.492 | |
PP3V3_GPU_OVERTEMP | Default | d | 0.328 | |
PP3V3_GPU_PEX_PLL_HVDD | Default | d | 0.494 | |
PP3V3_S0 | Default | d | 0.307 | |
PP3V3_S0GPU | Default | d | 0.492 | |
PP3V3_S0GPU_MISC | Default | d | 0.530 | |
PP3V3_S0_CPUTHMSNS_R | Default | d | 0.370 | |
PP3V3_S0_DPMUX_UC_R | Default | d | 0.30 | |
PP3V3_S0_GPUTHMSNS_R | Default | d | 0.357 | |
PP3V3_S0_PCH_VCC3_3_CLK_F | Default | d | 0.309 | |
PP3V3_S0_PCH_VCC3_3_CLK_R | Default | d | 0.308 | |
PP3V3_S0_PCH_VCCA_DAC_F | Default | d | 0.307 | |
PP3V3_S0_SSD_FLT | Default | d | 0.306 | |
PP3V3_S0_SSD_R | Default | d | 0.307 | |
PP3V3_S3 | Default | d | 0.396 | |
PP3V3_S3RS4_BT_F | Default | d | 0.429 | |
PP3V3_S3_DPMUX_UC_R | Default | d | 0.39 | |
PP3V3_S3_PSOC | Default | d | 0.427 | |
PP3V3_S3_VREFMRGN_CTRL | Default | d | OL | |
PP3V3_S3_VREFMRGN_DAC | Default | d | 0.396 | |
PP3V3_S4 | Default | d | 0.423 | |
PP3V3_S4_TBT | Default | d | 0.426 | |
PP3V3_S5 | Default | d | 0.142 | |
PP3V3_S5_AVREF_SMC | Default | d | 0.609 | |
PP3V3_S5_SMC_VDDA | Default | d | 0.324 | |
PP3V3_SUS | Default | d | 0.343 | |
PP3V3_SW_TBTAPWR | Default | d | 0.379 | |
PP3V3_SW_TBTBPWR | Default | d | 0.384 | |
PP3V3_TBTLC | Default | d | 0.409 | |
PP3V3_TPAD_CONN | Default | d | OL | |
PP3V3_WLAN | Default | d | OL | |
PP3V3_WLAN_F | Default | d | OL | |
PP3V3_WLAN_R | Default | d | OL | |
PP3V42_G3H | Default | d | 0.33 | |
PP3V42_G3H | Default | v | 3.400 | |
PP3V42_GH3_AUDIO_LC | Default | d | 0.322 | |
PP4V5_AUDIO_ANALOG | Default | d | 0.517 | |
PP5V1_CHGR_VDD | Default | d | 0.34 | |
PP5V1_CHGR_VDDP | Default | d | 0.33 | |
PP5VR3V3_SW_LCD | Default | d | 0.60 | |
PP5VR3V3_SW_LCD | Default | v | 5.00 | |
PP5VR3V3_SW_LCD_ISNS | Default | d | 0.635 | |
PP5VR3V3_SW_LCD_UF | Default | d | 0.613 | |
PP5V_AUDIO_HPAMP | Default | d | 0.421 | |
PP5V_S0 | Default | d | 0.39 | |
PP5V_S0 | Default | v | 0.399 | |
PP5V_S0GPU_P1V05_GPU | Default | d | 0.400 | |
PP5V_S0GPU_P1V35_GPU | Default | d | 0.402 | |
PP5V_S0_AUDIO_AMP_L | Default | d | 0.399 | |
PP5V_S0_AUDIO_AMP_R | Default | d | 0.400 | |
PP5V_S0_CPUIMVP_VCC | Default | d | 0.408 | |
PP5V_S0_CPUVCCIOS0_VCC | Default | d | 0.400 | |
PP5V_S0_GFXIMVP_VDD | Default | d | 0.39 | |
PP5V_S0_P1V5_LDO_BIAS | Default | d | 0.492 | |
PP5V_S0_PCHVCCIOS0_VCC | Default | d | 0.398 | |
PP5V_S0_PCH_V5REF | Default | d | 0.377 | |
PP5V_S0_RMC_FLT | Default | d | OL | |
PP5V_S0_VCCSAS0_VCC | Default | d | 0.399 | |
PP5V_S3 | Default | d | 0.452 | |
PP5V_S3_ALSCAMERA_F | Default | d | 0.448 | |
PP5V_S3_DEBUG_ADC_AVDD_FILT | Default | d | OL | |
PP5V_S3_LTUSB_A_F | Default | d | 0.490 | |
PP5V_S3_LTUSB_A_ILIM | Default | d | 0.482 | |
PP5V_S4 | Default | d | 0.425 | |
PP5V_S4_AUDIO_XW | Default | d | 0.421 | |
PP5V_S4_CUMULUS | Default | d | 0.457 | |
PP5V_S5 | Default | d | 0.460 | |
PP5V_S5 | Default | v | 5.000 | |
PP5V_S5RS4_CUMULUS | Default | d | 0.457 | |
PP5V_S5_P5VSUSFET_R | Default | d | 0.459 | |
PP5V_SUS | Default | d | 0.407 | |
PP5V_SUS_PCH_V5REFSUS | Default | d | 0.398 | |
PPBUS_G3H | Default | d | 0.445 | |
PPBUS_G3H_R | Default | d | 0.453 | |
PPBUS_S0_LCDBKLT_FUSED | Default | d | 0.445 | |
PPBUS_S0_LCDBKLT_PWR_SW | Default | d | 0.906 | |
PPBUS_SW_BKL | Default | d | 0.909 | |
PPBUS_SW_LCDBKLT_PWR | Default | d | 0.909 | |
PPCPUVCCIO_S0_REG_R | Default | d | 0.011 | |
PPCPUVCCIO_S0_REG_R | Default | r | 12.500R | |
PPCPU_MEM_VREFDQ_A | Default | d | 0.793 | |
PPCPU_MEM_VREFDQ_B | Default | d | 0.802 | |
PPDCIN_G3H | Default | d | OL | |
PPDCIN_G3H | Default | v | 20.000 | |
PPDCIN_G3H_CHGR | Default | d | 0.642 | |
PPDCIN_G3H_INRUSH | Default | d | 0.642 | |
PPDCIN_G3H_ISOL | Default | d | OL | |
PPDCIN_G3H_ISOL | Default | v | 20.320 | |
PPHV_SW_TBTAPWR | Default | d | 0.562 | |
PPHV_SW_TBTBPWR | Default | d | 0.574 | |
PPPCHVCCIO_S0_REG_R | Default | d | 0.040 | |
PPUSB_HUB2_VDD1V8 | Default | d | 0.532 | |
PPUSB_HUB2_VDD1V8PLL | Default | d | 0.603 | |
PPVBAT_G3H_CHGR_R | Default | d | 0.450 | |
PPVBAT_G3H_CHGR_REG | Default | d | 0.450 | |
PPVBAT_G3H_CONN | Default | d | OL | |
PPVCCSA_S0_REG | Default | d | 0.008 | |
PPVCCSA_S0_REG_R | Default | d | 0.008 | |
PPVCCSA_S0_REG_R | Default | r | 8.800R | |
PPVCORE_GPU | Default | d | 0.030 | |
PPVCORE_S0_AXG | Default | d | 0.002 | |
PPVCORE_S0_AXG1_L | Default | d | 0.002 | |
PPVCORE_S0_AXG1_L | Default | r | 2.000R | |
PPVCORE_S0_AXG2_L | Default | d | 0.002 | |
PPVCORE_S0_AXG2_L | Default | r | 2.000R | |
PPVCORE_S0_CPU | Default | d | 0.001 | |
PPVCORE_S0_CPU_PH1 | Default | d | 0.001 | |
PPVCORE_S0_CPU_PH1 | Default | r | 2.000R | |
PPVCORE_S0_CPU_PH2 | Default | d | 0.001 | |
PPVCORE_S0_CPU_PH2 | Default | r | 2.000R | |
PPVCORE_S0_CPU_PH3 | Default | d | 0.001 | |
PPVCORE_S0_CPU_PH3 | Default | r | 2.000R | |
PPVCORE_S0_GFX_PH1 | Default | d | 0.030 | |
PPVCORE_S0_GFX_PH1 | Default | r | 35.000R | |
PPVCORE_S0_GFX_PH2 | Default | d | 0.030 | |
PPVCORE_S0_GFX_PH2 | Default | r | 35.000R | |
PPVIN_G3H_P3V42G3H | Default | d | 0.599 | |
PPVIN_S0_GFXIMVP_R | Default | d | 0.45 | |
PPVIN_S5_HS_COMPUTING_ISNS | Default | d | 0.443 | |
PPVIN_S5_HS_GPU_ISNS | Default | d | 0.445 | |
PPVIN_S5_HS_OTHER_ISNS | Default | d | 0.445 | |
PPVIN_SW_TBTBST | Default | d | 0.522 | |
PPVOUT_G3_PCH_DCPRTC | Default | d | 0.635 | |
PPVOUT_S0_LCDBKLT | Default | d | 1.22 | |
PPVOUT_S0_PCH_DCPSST | Default | d | 0.531 | |
PPVRTC_G3H | Default | d | 0.459 | |
PPVTTDDR_S3 | Default | d | OL | |
PSOC_F_CS_L | Default | d | 0.712 | |
PSOC_MISO | Default | d | 0.712 | |
PSOC_MOSI | Default | d | 0.712 | |
PSOC_SCLK | Default | d | 0.712 | |
PU_USBHUB_DN4N | Default | d | OL | |
PU_USBHUB_DN4P | Default | d | OL | |
PVCCSA_EN | Default | d | 0.547 | |
PVCCSA_PGOOD | Default | d | 0.506 | |
RSUBIN_N | Default | d | 0.580 | |
RSUBIN_P | Default | d | 0.580 | |
RTC_RESET_L | Default | d | 0.780 | |
S0PGD_BJT_GND_R | Default | d | 0.104 | |
S0PGD_C | Default | d | 1.985 | |
S5_PWRGD | Default | d | 0.577 | |
SATAMUX_EN_L | Default | d | 0.790 | |
SATARDRVR_EN | Default | d | 0.699 | |
SATA_HDD_D2R_P | Default | d | 0.380 | |
SATA_PCIE_SEL | Default | d | 0.792 | |
SATA_SSD_D2R_N | Default | d | 0.409 | |
SATA_SSD_D2R_P | Default | d | 0.750 | |
SATA_SSD_R2D_N | Default | d | 0.787 | |
SATA_SSD_R2D_P | Default | d | 0.787 | |
SDCONN_STATE_CHANGE | Default | d | 0.536 | |
SDCONN_STATE_CHANGE_INV | Default | d | 0.504 | |
SDCONN_STATE_CHANGE_RIO | Default | d | 0.547 | |
SD_PWR_EN | Default | d | 0.689 | |
SD_PWR_EN_PCH | Default | d | 0.562 | |
SMBUS_PCH_ALERT_L | Default | d | 0.651 | |
SMBUS_PCH_CLK | Default | d | 0.482 | |
SMBUS_PCH_DATA | Default | d | 0.485 | |
SMBUS_SMC_0_S0_SCL | Default | d | 0.724 | |
SMBUS_SMC_0_S0_SDA | Default | d | 0.726 | |
SMBUS_SMC_1_S0_SCL | Default | d | 0.542 | |
SMBUS_SMC_1_S0_SDA | Default | d | 0.541 | |
SMBUS_SMC_2_S3_SCL | Default | d | 0.734 | |
SMBUS_SMC_2_S3_SDA | Default | d | 0.734 | |
SMBUS_SMC_3_SCL | Default | d | 0.746 | |
SMBUS_SMC_3_SDA | Default | d | 0.746 | |
SMBUS_SMC_5_G3_SCL | Default | d | 0.53 | |
SMBUS_SMC_5_G3_SDA | Default | d | 0.53 | |
SMC_ADAPTER_EN | Default | d | 0.588 | |
SMC_BATLOW_L | Default | d | 0.737 | |
SMC_BC_ACOK | Default | d | 0.50 | |
SMC_BC_ACOK_VCC | Default | d | 0.573 | |
SMC_BIL_BUTTON_L | Default | d | 0.751 | |
SMC_CHGR_BMON_INSENSE_R | Default | d | 0.748 | |
SMC_CHGR_BMON_ISENSE | Default | d | 0.748 | |
SMC_CLK32K | Default | d | 0.623 | |
SMC_CPUVCCIO_ISENSE | Default | d | 0.747 | |
SMC_CPU_GFX_ISENSE | Default | d | 0.747 | |
SMC_CPU_HI_ISENSE | Default | d | 0.746 | |
SMC_CPU_ISENSE | Default | d | 0.746 | |
SMC_CPU_SA_ISENSE | Default | d | 0.745 | |
SMC_CPU_SA_VSENSE | Default | d | 0.749 | |
SMC_CPU_VSENSE | Default | d | 0.740 | |
SMC_DCIN_ISENSE | Default | d | 0.748 | |
SMC_DCIN_VSENSE | Default | d | 0.740 | |
SMC_DEBUGPRT_EN_L | Default | d | 0.555 | |
SMC_DEBUGPRT_RX_L | Default | d | 0.612 | |
SMC_DEBUGPRT_TX_L | Default | d | 0.614 | |
SMC_DELAYED_PWRGD | Default | d | 0.657 | |
SMC_DP_HPD_L | Default | d | 0.746 | |
SMC_EXTAL | Default | d | 0.770 | |
SMC_FAN_0_CTL | Default | d | 0.748 | |
SMC_FAN_0_TACH | Default | d | 0.753 | |
SMC_FAN_1_CTL | Default | d | 0.750 | |
SMC_FAN_1_TACH | Default | d | 0.751 | |
SMC_GFX_OVERTEMP | Default | d | 0.695 | |
SMC_GFX_OVERTEMP_Q | Default | d | 0.643 | |
SMC_GFX_OVERTEMP_R_L | Default | d | 0.719 | |
SMC_GFX_THROTTLE_R_L | Default | d | 0.705 | |
SMC_GFX_VSENSE | Default | d | 0.742 | |
SMC_GPU_CORE_ISENSE | Default | d | 0.747 | |
SMC_GPU_CORE_VSENSE | Default | d | 0.742 | |
SMC_GPU_HI_ISENSE | Default | d | 0.745 | |
SMC_GPU_P1V35_ISENSE | Default | d | 0.745 | |
SMC_KBDLED_PRESENT_L | Default | d | OL | |
SMC_LCDBKLT_ISENSE | Default | d | 0.747 | |
SMC_LCDBKLT_VSENSE | Default | d | 0.743 | |
SMC_LID | Default | d | 0.476 | |
SMC_LID_R | Default | d | 0.470 | |
SMC_LRESET_L | Default | d | 0.560 | |
SMC_MANUAL_RST_L | Default | d | 0.679 | |
SMC_ONOFF_L | Default | d | 0.671 | |
SMC_OOB1_RX_L | Default | d | 0.749 | |
SMC_OOB1_TX_L | Default | d | 0.749 | |
SMC_OTHER_HI_ISENSE | Default | d | 0.746 | |
SMC_P1V5MEM_ISENSE | Default | d | 0.746 | |
SMC_PBUS_VSENSE | Default | d | 0.741 | |
SMC_PCH_CORE_ISENSE | Default | d | 0.748 | |
SMC_PECI_L | Default | d | 0.749 | |
SMC_PECI_L_R | Default | d | 0.749 | |
SMC_PME_S4_DARK_L | Default | d | 0.519 | |
SMC_PME_S4_WAKE_L | Default | d | 0.579 | |
SMC_PM_G2_EN | Default | d | 0.533 | |
SMC_PROCHOT | Default | d | 0.750 | |
SMC_RESET_L | Default | d | 0.499 | |
SMC_ROMBOOT | Default | d | 1.745 | |
SMC_RUNTIME_SCI_L | Default | d | 0.629 | |
SMC_RX_L | Default | d | 0.754 | |
SMC_S4_WAKESRC_EN | Default | d | 0.706 | |
SMC_S5_PWRGD_VIN | Default | d | 0.751 | |
SMC_SSD_ISENSE | Default | d | 0.747 | |
SMC_SYS_KBDLED | Default | d | 0.642 | |
SMC_SYS_KBDLED_ANALOG | Default | d | OL | |
SMC_SYS_KBDLED_FILTER | Default | d | OL | |
SMC_SYS_KBDLED_R | Default | d | 0.647 | |
SMC_TBT_ISENSE | Default | d | 0.746 | |
SMC_TBT_ISENSE_R | Default | d | 0.745 | |
SMC_TCK | Default | d | 0.753 | |
SMC_TDI | Default | d | 0.752 | |
SMC_TDO | Default | d | 0.751 | |
SMC_THRMTRIP | Default | d | 0.747 | |
SMC_TMS | Default | d | 0.751 | |
SMC_TPAD_RST_L | Default | d | 0.468 | |
SMC_TX_L | Default | d | 0.752 | |
SMC_WAKE_L | Default | d | 0.750 | |
SMC_WAKE_SCI_L | Default | d | 0.580 | |
SMC_X29_ISENSE | Default | d | 0.749 | |
SMC_XTAL | Default | d | 0.770 | |
SMC_XTAL_R | Default | d | OL | |
SML_PCH_0_CLK | Default | d | 0.590 | |
SML_PCH_0_DATA | Default | d | 0.589 | |
SML_PCH_1_CLK | Default | d | 0.543 | |
SML_PCH_1_DATA | Default | d | 0.541 | |
SMS_ADDR_SELECT | Default | d | OL | |
SMS_I2C_SEL | Default | d | OL | |
SMS_INT_L | Default | d | 0.747 | |
SPIROM_USE_MLB | Default | d | 0.538 | |
SPI_ALT_CLK | Default | d | 0.637 | |
SPI_ALT_CS_L | Default | d | 0.630 | |
SPI_ALT_MISO | Default | d | 0.535 | |
SPI_ALT_MOSI | Default | d | 0.559 | |
SPI_CLK | Default | d | 0.596 | |
SPI_CLK_R | Default | d | 0.570 | |
SPI_CS0_L | Default | d | 0.587 | |
SPI_CS0_R_L | Default | d | 0.563 | |
SPI_DESCRIPTOR_OVERRIDE | Default | d | 0.770 | |
SPI_DESCRIPTOR_OVERRIDE_L | Default | d | 0.748 | |
SPI_DESCRIPTOR_OVERRIDE_LS5V | Default | d | 0.450 | |
SPI_MISO | Default | d | 0.523 | |
SPI_MLB_CLK | Default | d | 0.647 | |
SPI_MLB_CS_L | Default | d | 0.629 | |
SPI_MLB_MISO | Default | d | 0.524 | |
SPI_MLB_MOSI | Default | d | 0.524 | |
SPI_MLB_MOSI | Default | t | - | |
SPI_MOSI | Default | d | 0.527 | |
SPI_MOSI_R | Default | d | 0.525 | |
SPI_SMC_CLK | Default | d | 0.665 | |
SPI_SMC_CS_L | Default | d | 0.654 | |
SPI_SMC_MISO | Default | d | 0.537 | |
SPI_SMC_MOSI | Default | d | 0.554 | |
SPI_WP_L | Default | d | 0.646 | |
SPKRAMP_LIN_N | Default | d | 0.596 | |
SPKRAMP_LIN_P | Default | d | 0.596 | |
SPKRAMP_RIN_N | Default | d | 0.597 | |
SPKRAMP_RIN_P | Default | d | 0.597 | |
SPKRCONN_L_ID | Default | d | OL | |
SPKRCONN_L_OUT_N | Default | d | 0.505 | |
SPKRCONN_L_OUT_P | Default | d | 0.500 | |
SPKRCONN_R_ID | Default | d | OL | |
SPKRCONN_R_OUT_N | Default | d | 0.502 | |
SPKRCONN_R_OUT_P | Default | d | 0.502 | |
SPKRCONN_SL_OUT_N | Default | d | 0.619 | |
SPKRCONN_SL_OUT_P | Default | d | 0.618 | |
SPKRCONN_SR_OUT_N | Default | d | 0.623 | |
SPKRCONN_SR_OUT_P | Default | d | 0.622 | |
SPKR_L_GAIN | Default | d | 0.596 | |
SPKR_MATCH_DRV | Default | d | 0.677 | |
SPKR_MATCH_DRV_R | Default | d | 0.637 | |
SPKR_R_GAIN | Default | d | 0.601 | |
SSD_CLKREQ_L | Default | d | 0.566 | |
SSD_P3V3S0_EN | Default | d | 0.460 | |
SSD_RESET_L | Default | d | 0.433 | |
SUS_PGOOD_CT | Default | d | 0.639 | |
SUS_PGOOD_MR_L | Default | d | 0.693 | |
SYSCLK_25M_B_GND | Default | d | 0.001 | |
SYSCLK_CLK25M_SB | Default | d | 0.444 | |
SYSCLK_CLK25M_SB_R | Default | d | 0.610 | |
SYSCLK_CLK25M_TBT_R | Default | d | 0.676 | |
SYSCLK_CLK25M_X1 | Default | d | 0.455 | |
SYSCLK_CLK25M_X2 | Default | d | 0.457 | |
SYSCLK_CLK25M_X2_R | Default | d | 0.458 | |
SYSCLK_CLK32K_RTC | Default | d | 0.464 | |
SYS_DETECT_L | Default | d | OL | |
SYS_ONEWIRE | Default | d | 0.678 | |
SYS_PWROK_R | Default | d | 0.684 | |
SYS_TDM_ONEWIRE | Default | d | 0.747 | |
TBTACONN_1_C | Default | d | OL | |
TBTACONN_20_RC | Default | d | 0.579 | |
TBTACONN_7_C | Default | d | OL | |
TBTAPWRSW_ISET_S0 | Default | d | 0.490 | |
TBTAPWRSW_ISET_S0_R | Default | d | OL | |
TBTAPWRSW_ISET_S3 | Default | d | 0.490 | |
TBTAPWRSW_ISET_S3_R | Default | d | OL | |
TBTAPWRSW_ISET_V3P3 | Default | d | 0.490 | |
TBTBCONN_1_C | Default | d | OL | |
TBTBCONN_20_RC | Default | d | 0.586 | |
TBTBCONN_7_C | Default | d | OL | |
TBTBPWRSW_ISET_S0 | Default | d | 0.490 | |
TBTBPWRSW_ISET_S0_R | Default | d | OL | |
TBTBPWRSW_ISET_S3 | Default | d | 0.490 | |
TBTBPWRSW_ISET_S3_R | Default | d | OL | |
TBTBPWRSW_ISET_V3P3 | Default | d | 0.490 | |
TBTBST_BOOST | Default | d | 0.522 | |
TBTBST_EN_UVLO | Default | d | 0.514 | |
TBTBST_FBX | Default | d | OL | |
TBTBST_INTVCC | Default | d | 0.575 | |
TBTBST_PWREN_DIV_L | Default | d | OL | |
TBTBST_PWREN_L | Default | d | 0.440 | |
TBTBST_RT | Default | d | 0.690 | |
TBTBST_SHDN_DIV | Default | d | 0.443 | |
TBTBST_SNS1 | Default | d | 0.002 | |
TBTBST_SNS2 | Default | d | 0.002 | |
TBTBST_SS | Default | d | 0.681 | |
TBTBST_VC | Default | d | 0.696 | |
TBTPOCRST_CT | Default | d | 0.637 | |
TBTPOCRST_MR_L | Default | d | 0.667 | |
TBTROM_HOLD_L | Default | d | 0.744 | |
TBTROM_WP_L | Default | d | 0.747 | |
TBT_A_BIAS | Default | d | 0.768 | |
TBT_A_CONFIG1_BUF | Default | d | 0.561 | |
TBT_A_CONFIG1_RC | Default | d | 0.834 | |
TBT_A_CONFIG2_RC | Default | d | 0.551 | |
TBT_A_D2R1_AUXDDC_N | Default | d | 0.716 | |
TBT_A_D2R1_AUXDDC_P | Default | d | 0.720 | |
TBT_A_D2R_N<1> | Default | d | 0.393 | |
TBT_A_D2R_P<1> | Default | d | 0.397 | |
TBT_A_DP_PWRDN | Default | d | 0.656 | |
TBT_A_HPD | Default | d | 0.834 | |
TBT_A_HV_EN | Default | d | 0.475 | |
TBT_A_LSRX | Default | d | 0.555 | |
TBT_A_LSRX_UNBUF | Default | d | 0.687 | |
TBT_A_LSTX | Default | d | 0.539 | |
TBT_A_R2D_C_P<1> | Default | d | 0.230 | |
TBT_B_BIAS | Default | d | 0.780 | |
TBT_B_CIO_SEL | Default | d | 0.555 | |
TBT_B_CONFIG1_BUF | Default | d | 0.552 | |
TBT_B_CONFIG1_RC | Default | d | 0.846 | |
TBT_B_CONFIG2_RC | Default | d | 0.552 | |
TBT_B_D2R1_AUXDDC_P | Default | d | 0.706 | |
TBT_B_DP_PWRDN | Default | d | 0.662 | |
TBT_B_HPD | Default | d | 0.848 | |
TBT_B_HV_EN | Default | d | 0.475 | |
TBT_B_LSRX_UNBUF | Default | d | 0.694 | |
TBT_B_LSTX | Default | d | 0.541 | |
TBT_B_R2D_C_P<0> | Default | d | 0.228 | |
TBT_B_R2D_C_P<1> | Default | d | 0.231 | |
TBT_CIO_PLUG_EVENT | Default | d | 0.553 | |
TBT_CIO_PLUG_EVENT_ISOL | Default | d | 0.687 | |
TBT_CLKREQ_ISOL_L | Default | d | 0.465 | |
TBT_CLKREQ_L | Default | d | 0.456 | |
TBT_DDC_XBAR_EN_L | Default | d | 0.580 | |
TBT_EN_CIO_PWR | Default | d | 0.455 | |
TBT_EN_CIO_PWR_L | Default | d | 0.522 | |
TBT_EN_LC_1V05 | Default | d | 0.466 | |
TBT_EN_LC_3V3 | Default | d | 0.693 | |
TBT_EN_LC_ISOL | Default | d | 0.466 | |
TBT_GO2SX_BIDIR | Default | d | 0.514 | |
TBT_GPIO_14 | Default | d | 0.550 | |
TBT_GPIO_9 | Default | d | 0.509 | |
TBT_MONOBSN | Default | d | 0.205 | |
TBT_MONOBSP | Default | d | 0.208 | |
TBT_PCIE_RESET_L | Default | d | 0.464 | |
TBT_PWR_EN | Default | d | 0.555 | |
TBT_PWR_EN_PCH | Default | d | 0.565 | |
TBT_PWR_ON_POC_RST_L | Default | d | 0.588 | |
TBT_RBIAS | Default | d | 0.799 | |
TBT_RSENSE | Default | d | 0.004 | |
TBT_SPI_CLK | Default | d | 0.564 | |
TBT_SPI_CS_L | Default | d | 0.662 | |
TBT_SPI_MISO | Default | d | 0.633 | |
TBT_SPI_MOSI | Default | d | 0.556 | |
TBT_SW_RESET_L | Default | d | 0.610 | |
TBT_SW_RESET_R_L | Default | d | 0.602 | |
TBT_TEST_EN | Default | d | 0.002 | |
TBT_TEST_PWR_GOOD | Default | d | 0.001 | |
TBT_TMU_CLK_IN | Default | d | 0.640 | |
TBT_TMU_CLK_OUT | Default | d | 0.557 | |
TDM_ONEWIRE_MLB | Default | d | OL | |
TDM_ONEWIRE_MPM | Default | d | OL | |
TDM_PD_BASE | Default | d | OL | |
TDM_PD_BASE_R | Default | d | OL | |
TDM_PD_DS | Default | d | OL | |
TDM_RX | Default | d | OL | |
TPAD_VBUS_EN | Default | d | 0.707 | |
TP_DPMUX_UC_P10 | Default | d | 0.64 | |
TP_DPMUX_UC_P11 | Default | d | 0.63 | |
TP_DPMUX_UC_P12 | Default | d | 0.64 | |
TP_DPMUX_UC_P13 | Default | d | 0.63 | |
TP_DPMUX_UC_P47 | Default | d | 0.63 | |
TP_GPU_JTAG_TCK | Default | d | 0.734 | |
TP_GPU_JTAG_TDI | Default | d | 0.734 | |
TP_GPU_JTAG_TDO | Default | d | 0.733 | |
TP_GPU_PGOOD2 | Default | d | 0.63 | |
TP_ISSP_SCLK_P1_1 | Default | d | 0.710 | |
TP_ISSP_SDATA_P1_0 | Default | d | 0.708 | |
TP_PCIE_CLK100M_FW_N | Default | d | 0.390 | |
TP_PCIE_CLK100M_FW_P | Default | d | 0.390 | |
TP_SMC_MD1 | Default | d | OL | |
TP_SMC_MPM5_LED_CHG | Default | d | 0.752 | |
TP_SMC_MPM5_LED_PWR | Default | d | 0.748 | |
TP_SMC_TRST_L | Default | d | OL | |
TP_TBT_MONDC1 | Default | d | 0.377 | |
TP_XCVR_ADC_RSTN | Default | d | 0.702 | |
USB3_EXTA_RX_RC_N | Default | d | 0.392 | |
USB3_EXTA_RX_RC_P | Default | d | 0.392 | |
USB3_EXTA_TX_C_N | Default | d | OL | |
USB3_EXTA_TX_C_P | Default | d | OL | |
USB3_EXTA_TX_N | Default | d | 0.358 | |
USB3_EXTA_TX_P | Default | d | 0.358 | |
USB3_EXTB_RX_RC_N | Default | d | 0.385 | |
USB3_EXTB_RX_RC_P | Default | d | 0.385 | |
USB3_EXTB_TX_C_N | Default | d | OL | |
USB3_EXTB_TX_C_P | Default | d | OL | |
USB3_EXTB_TX_N | Default | d | OL | |
USB3_EXTB_TX_P | Default | d | 0.355 | |
USB_BT_CONN_N | Default | d | 0.711 | |
USB_BT_CONN_P | Default | d | 0.718 | |
USB_BT_N | Default | d | 0.708 | |
USB_BT_P | Default | d | 0.711 | |
USB_BT_WAKE_N | Default | d | 0.720 | |
USB_BT_WAKE_P | Default | d | 0.730 | |
USB_CAMERA_CONN_N | Default | d | 0.564 | |
USB_CAMERA_CONN_P | Default | d | 0.565 | |
USB_CAMERA_N | Default | d | 0.561 | |
USB_CAMERA_P | Default | d | 0.562 | |
USB_EXTA_MUXED_N | Default | d | 0.588 | |
USB_EXTA_MUXED_P | Default | d | 0.588 | |
USB_EXTA_N | Default | d | 0.559 | |
USB_EXTA_OC_L | Default | d | 0.492 | |
USB_EXTA_P | Default | d | 0.566 | |
USB_EXTB_EHCI_N | Default | d | 0.520 | |
USB_EXTB_EHCI_P | Default | d | 0.520 | |
USB_EXTB_N | Default | d | 0.527 | |
USB_EXTB_OC_L | Default | d | 0.671 | |
USB_EXTB_P | Default | d | 0.527 | |
USB_EXTB_SEL_XHCI | Default | d | 0.539 | |
USB_EXTB_XHCI_N | Default | d | 0.522 | |
USB_EXTB_XHCI_P | Default | d | 0.522 | |
USB_EXTD_SEL_XHCI | Default | d | 0.653 | |
USB_EXTD_XHCI_N | Default | d | 0.555 | |
USB_EXTD_XHCI_P | Default | d | 0.555 | |
USB_HUB_CFG_SEL0 | Default | d | 0.770 | |
USB_HUB_CFG_SEL1 | Default | d | 0.770 | |
USB_HUB_NONREM0 | Default | d | 0.768 | |
USB_HUB_NONREM1 | Default | d | 0.771 | |
USB_HUB_RBIAS | Default | d | 0.787 | |
USB_HUB_RESET_L | Default | d | 0.771 | |
USB_HUB_TEST | Default | d | 0.102 | |
USB_HUB_UP_N | Default | d | 0.554 | |
USB_HUB_UP_P | Default | d | 0.554 | |
USB_HUB_VBUS_DET | Default | d | 0.771 | |
USB_HUB_XTAL1 | Default | d | 0.785 | |
USB_HUB_XTAL2 | Default | d | 0.748 | |
USB_ILIM | Default | d | 0.513 | |
USB_ILIM_R | Default | d | OL | |
USB_LT1_N | Default | d | 0.591 | |
USB_LT1_P | Default | d | 0.591 | |
USB_PWR_EN | Default | d | 0.479 | |
USB_SMC_N | Default | d | 0.697 | |
USB_SMC_P | Default | d | 0.698 | |
USB_TPAD_N | Default | d | 0.703 | |
USB_TPAD_P | Default | d | 0.704 | |
USB_TPAD_R_P | Default | d | 0.696 | |
USE_HDD_OOB_L | Default | d | 0.592 | |
US_HS_MIC | Default | d | 0.540 | |
VBIAS_DAC | Default | d | 0.739 | |
VCCSAISNS_R_N | Default | d | OL | |
VCCSAISNS_R_P | Default | d | 0.785 | |
VCCSAS0_AGND | Default | d | 0.003 | |
VCCSAS0_BOOT_RC | Default | d | 0.544 | |
VCCSAS0_CS_N | Default | d | 0.008 | |
VCCSAS0_CS_P | Default | d | 0.008 | |
VCCSAS0_DRVH | Default | d | 0.585 | |
VCCSAS0_DRVL | Default | d | 0.446 | |
VCCSAS0_FSEL | Default | d | 0.002 | |
VCCSAS0_LL | Default | d | 0.008 | |
VCCSAS0_LL | Default | r | 8.800R | |
VCCSAS0_OCSET | Default | d | 0.527 | |
VCCSAS0_RTN | Default | d | 0.001 | |
VCCSAS0_RTN_DIV | Default | d | 0.520 | |
VCCSAS0_SET0 | Default | d | 0.547 | |
VCCSAS0_SET1 | Default | d | 0.548 | |
VCCSAS0_SET_R | Default | d | OL | |
VCCSAS0_SREF | Default | d | 0.544 | |
VCCSAS0_VBST | Default | d | 0.544 | |
VCCSAS0_VO | Default | d | 0.526 | |
VCCSA_VSENSE_IN | Default | d | 0.009 | |
VMON_3V3_DIV | Default | d | OL | |
VMON_Q2_BASE | Default | d | OL | |
VMON_Q3_BASE | Default | d | 1.108 | |
VMON_Q4_BASE | Default | d | 1.010 | |
VOUT_S0_LCDBKLT_DIV | Default | d | OL | |
VOUT_S0_LCDBKLT_XW | Default | d | 1.253 | |
VREFMRGN_CA_SODIMMA_BUF | Default | d | OL | |
VREFMRGN_CA_SODIMMA_EN | Default | d | OL | |
VREFMRGN_CA_SODIMMB_BUF | Default | d | OL | |
VREFMRGN_CA_SODIMMB_EN | Default | d | OL | |
VREFMRGN_DQ_SODIMMA_BUF | Default | d | OL | |
VREFMRGN_DQ_SODIMMA_EN | Default | d | OL | |
VREFMRGN_DQ_SODIMMB_BUF | Default | d | OL | |
VREFMRGN_DQ_SODIMMB_EN | Default | d | OL | |
VREFMRGN_FRAMEBUF_BUF | Default | d | OL | |
VREFMRGN_FRAMEBUF_BUF_R | Default | d | OL | |
VREFMRGN_FRAMEBUF_EN | Default | d | OL | |
VREFMRGN_MEMVREG_BUF | Default | d | OL | |
VREFMRGN_MEMVREG_EN | Default | d | OL | |
VREFMRGN_MEMVREG_FBVREF | Default | d | OL | |
VREFMRGN_MEMVREG_FBVREF_R | Default | d | OL | |
VREFMRGN_SODIMMA_DQ | Default | d | OL | |
VREFMRGN_SODIMMB_DQ | Default | d | OL | |
VREFMRGN_SODIMMS_CA | Default | d | OL | |
VSNS_CPU_VCORE_RMC_OUT | Default | d | OL | |
VTTCLAMP_EN | Default | d | 0.443 | |
VTTCLAMP_L | Default | d | 0.175 | |
WIFI_EVENT_L | Default | d | 0.748 | |
WOL_EN | Default | d | 0.563 | |
WS_CONTROL_KBD | Default | d | 0.468 | |
WS_CONTROL_KEY | Default | d | 0.468 | |
WS_KBD1 | Default | d | 0.707 | |
WS_KBD10 | Default | d | 0.708 | |
WS_KBD11 | Default | d | 0.708 | |
WS_KBD12 | Default | d | 0.708 | |
WS_KBD13 | Default | d | 0.708 | |
WS_KBD14 | Default | d | 0.708 | |
WS_KBD15_C | Default | d | 0.717 | |
WS_KBD15_CAP | Default | d | 0.766 | |
WS_KBD16N | Default | d | 0.715 | |
WS_KBD16_NUM | Default | d | OL | |
WS_KBD17 | Default | d | 0.708 | |
WS_KBD18 | Default | d | 0.703 | |
WS_KBD19 | Default | d | 0.708 | |
WS_KBD2 | Default | d | 0.708 | |
WS_KBD20 | Default | d | 0.710 | |
WS_KBD21 | Default | d | 0.710 | |
WS_KBD22 | Default | d | 0.710 | |
WS_KBD23 | Default | d | 0.710 | |
WS_KBD3 | Default | d | 0.707 | |
WS_KBD4 | Default | d | 0.708 | |
WS_KBD5 | Default | d | 0.707 | |
WS_KBD6 | Default | d | 0.708 | |
WS_KBD7 | Default | d | 0.707 | |
WS_KBD8 | Default | d | 0.708 | |
WS_KBD9 | Default | d | 0.708 | |
WS_KBD_ONOFF_L | Default | d | 1.669 | |
WS_LEFT_OPTION_KBD | Default | d | 0.467 | |
WS_LEFT_OPTION_KEY | Default | d | 0.474 | |
WS_LEFT_SHIFT_KBD | Default | d | 0.468 | |
WS_LEFT_SHIFT_KEY | Default | d | 0.467 | |
X29THMSNS_A0 | Default | d | 0.672 | |
XDPPCH_PLTRST_L | Default | d | 1.520 | |
XDP_BPM_L<0> | Default | d | 0.387 | |
XDP_BPM_L<1> | Default | d | 0.385 | |
XDP_BPM_L<2> | Default | d | 0.387 | |
XDP_BPM_L<3> | Default | d | 0.385 | |
XDP_BPM_L<4> | Default | d | 0.385 | |
XDP_BPM_L<5> | Default | d | 0.385 | |
XDP_BPM_L<6> | Default | d | 0.389 | |
XDP_BPM_L<7> | Default | d | 0.385 | |
XDP_CPURST_L | Default | d | 1.092 | |
XDP_CPU_CFG<0> | Default | d | 1.382 | |
XDP_CPU_CLK100M_N | Default | d | 0.393 | |
XDP_CPU_CLK100M_P | Default | d | 0.398 | |
XDP_CPU_PRDY_L | Default | d | 0.387 | |
XDP_CPU_PREQ_L | Default | d | 0.386 | |
XDP_CPU_PWRBTN_L | Default | d | 0.577 | |
XDP_CPU_PWRGD | Default | d | 1.474 | |
XDP_CPU_TCK | Default | d | 0.060 | |
XDP_CPU_TDI | Default | d | 0.066 | |
XDP_CPU_TDO | Default | d | 0.066 | |
XDP_CPU_TMS | Default | d | 0.063 | |
XDP_CPU_TRST_L | Default | d | 0.055 | |
XDP_DA0_PCH_GPIO59_USB_EXTA_OC_ | Default | d | 0.500 | |
XDP_DA0_USB_EXTA_OC_L | Default | d | 0.529 | |
XDP_DA1_PCH_GPIO40_USB_EXTB_OC_ | Default | d | 0.669 | |
XDP_DA1_USB_EXTB_OC_L | Default | d | 0.703 | |
XDP_DA2_PCH_GPIO41_USB_EXTC_OC_ | Default | d | 0.709 | |
XDP_DA2_USB_EXTC_OC_L | Default | d | 0.736 | |
XDP_DA3_PCH_GPIO42_USB_EXTD_OC_ | Default | d | 0.650 | |
XDP_DA3_USB_EXTD_OC_L | Default | d | 0.678 | |
XDP_DB0_USB_EXTB_OC_EHCI_L | Default | d | 0.710 | |
XDP_DB1_PCH_GPIO9_USB_EXTD_OC_E | Default | d | 0.668 | |
XDP_DB1_USB_EXTD_OC_EHCI_L | Default | d | 0.701 | |
XDP_DB2_AP_PWR_EN | Default | d | 0.494 | |
XDP_DB2_PCH_GPIO10_AP_PWR_EN | Default | d | 0.462 | |
XDP_DB3_PCH_GPIO14_SDCONN_STATE | Default | d | 0.535 | |
XDP_DB3_SDCONN_STATE_CHANGE | Default | d | 0.569 | |
XDP_DBRESET_L | Default | d | 0.650 | |
XDP_DC0_ISOLATE_CPU_MEM_L | Default | d | 0.630 | |
XDP_DC0_PCH_GPIO28_ISOLATE_CPU_ | Default | d | 0.596 | |
XDP_DC1_MXM_GOOD | Default | d | 0.615 | |
XDP_DC1_PCH_GPIO35_MXM_GOOD | Default | d | 0.582 | |
XDP_DC2_DP_AUXCH_ISOL | Default | d | 0.737 | |
XDP_DC2_PCH_GPIO21_DP_AUXCH_ISO | Default | d | 0.708 | |
XDP_DC3_PCH_GPIO19_SATARDRVR_EN | Default | d | 0.692 | |
XDP_DC3_SATARDRVR_EN | Default | d | 0.725 | |
XDP_DD0_DP_GPU_TBT_SEL | Default | d | 0.608 | |
XDP_DD0_PCH_GPIO36_DP_GPU_TBT_S | Default | d | 0.577 | |
XDP_DD1_JTAG_ISP_TCK | Default | d | 0.669 | |
XDP_DD1_PCH_GPIO37_JTAG_ISP_TCK | Default | d | 0.641 | |
XDP_DD2_AUD_IPHS_SWITCH_EN | Default | d | 0.603 | |
XDP_DD2_PCH_GPIO16_AUD_IPHS_SWI | Default | d | 0.570 | |
XDP_DD3_ENET_LOW_PWR | Default | d | 0.591 | |
XDP_DD3_PCH_GPIO49_ENET_LOW_PWR | Default | d | 0.559 | |
XDP_FC0 | Default | d | 0.612 | |
XDP_FC0_PCH_GPIO15 | Default | d | 0.579 | |
XDP_FC1 | Default | d | 0.604 | |
XDP_FC1_PCH_GPIO0 | Default | d | 0.572 | |
XDP_OBSDATA_B<0> | Default | d | 0.380 | |
XDP_OBSDATA_B<1> | Default | d | 0.380 | |
XDP_OBSDATA_B<2> | Default | d | 0.386 | |
XDP_OBSDATA_B<3> | Default | d | 0.383 | |
XDP_PCH_PWRBTN_L | Default | d | 0.575 | |
XDP_PCH_S5_PWRGD | Default | d | 1.474 | |
XDP_PCH_TCK | Default | d | 0.053 | |
XDP_PCH_TDI | Default | d | 0.502 | |
XDP_PCH_TDO | Default | d | 0.503 | |
XDP_PCH_TMS | Default | d | 0.502 | |
XDP_VR_READY | Default | d | 1.072 | |
Z2_CLKIN | Default | d | 0.718 | |
Z2_CS_L | Default | d | 0.715 | |
Z2_HOST_INTN | Default | d | 0.713 | |
Z2_KEY_ACT_L | Default | d | 0.711 | |
Z2_MISO | Default | d | 0.713 | |
Z2_MOSI | Default | d | 0.714 | |
Z2_SCLK | Default | d | 0.713 | |