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This data released under the ODbL licence.
| Netname | Condition | Type | Value | Comment |
|---|---|---|---|---|
| CHGR_PHASE | Default | v | 8.670 | |
| CPUVR_PHASE1 | Default | v | 1.800 | |
| CPUVR_PHASE2 | Default | v | 1.800 | |
| P3V3_S5_REG_L | Default | v | 3.300 | |
| P5V_S4RS3_REG_L | Default | v | 5.000 | |
| PDDR_S3_REG_L | Default | v | 1.200 | |
| PP1V2_S3 | Default | v | 1.200 | |
| PP3V3_S5 | Default | v | 3.300 | |
| PP3V3_S5_REG_R | Default | v | 3.300 | |
| PP5V1_CHGR_VDD | Default | v | 5.000 | |
| PP5V1_CHGR_VDDP | Default | v | 5.000 | |
| PP5V_S0 | Default | v | 5.000 | |
| PP5V_S4RS3 | Default | v | 5.000 | |
| PPBUS_G3H | Default | v | 8.600 | |
| PPBUS_S5_HS_COMPUTING_ISNS | Default | v | 8.600 | |
| PPBUS_S5_HS_OTHER_ISNS | Default | v | 8.600 | |
| PPDDR_S3_REG_R | Default | v | 1.200 | |
| PPVBAT_G3H_CHGR_REG | Default | v | 8.600 | |
| PPVCC_S0_CPU | Default | v | 1.800 | |
| PPVCC_S0_CPU_PH1 | Default | v | 1.800 | |
| PPVCC_S0_CPU_PH2 | Default | v | 1.800 | |
| PPVMEMIO_S0_CPU | Default | v | 1.200 | |
| S0PGD_C | Default | v | 0.130 | |
| VMON_3V3_DIV | Default | v | 0.720 | |
| VMON_5V_DIV | Default | v | 0.670 | |
| VMON_Q2_BASE | Default | v | 0.635 | |
| VMON_Q3_BASE | Default | v | 0.656 |
| Component | Type | Value |
|---|