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This data released under the ODbL licence.
| Netname | Condition | Type | Value | Comment |
|---|---|---|---|---|
| BKLT_GATE | Default | d | 0.00 | |
| CPUVR_PH1_SNUB | Default | d | 0.00 | |
| CPUVR_PHASE1_K | Default | d | 0.00 | |
| FET_EN_P12V_S5 | Default | v | 23.050 | |
| P3V42G3H_BOOST | Default | v | 7.130 | |
| P3V42G3H_FB | Default | v | 1.200 | |
| P3V42G3H_SHDN_L | Default | v | 2.900 | |
| P3V42G3H_SHDN_R_L | Default | v | 2.900 | |
| P3V42G3H_SW | Default | v | 3.400 | |
| PP12V_ACDC | Default | v | 12.150 | |
| PP12V_G3H | Default | v | 12.150 | |
| PP12V_S5 | Default | v | 12.150 | |
| PP3V3_G3 | Default | v | 3.300 | |
| PP3V3_G3H_AVREF_SMC | Default | v | 3.280 | |
| PP3V42_G3H | Default | v | 3.400 | |
| PP3V42_G3H_REG_R | Default | v | 3.400 | |
| PP3V42_G3H_SMC_SPVSR | Default | v | 3.400 | |
| PP5VR3V3_SW_LCD_UF | Default | d | 0.00 | |
| PP5V_S5 | Default | v | 4.900 | |
| PWR_BTN_R | Default | v | 3.400 | |
| REG_BOOT_P5VS4 | Default | v | 4.600 | |
| REG_BOOT_P5VS4_RC | Default | v | 4.600 | |
| REG_VIN_U7600 | Default | v | 12.090 | |
| SMC_MANUAL_RST_L | Default | v | 2.800 | |
| SMC_PM_G2_EN | Default | v | 3.400 | |
| SMC_RESET_L | Default | v | 3.300 |
| Component | Type | Value |
|---|